Abstract: The invention concerns a process and a connecting arrangement for producing a chip card, wherein a semiconductor chip on a module is fitted in an opening in a card carrier with the attainment of an electrical and mechanical connection. In accordance with the invention, in place of connections which were hitherto necessary involving a force-locking relationship and/or involving the materials being bonded together, recourse is made to inductive and/or capacitive coupling between the module and the IC-card. For that purpose the module and the card correspondingly have coils and/or capacitive coupling surfaces for signal transmission purposes.

Abstract: A flash memory. An oxide layer is on a substrate. A stacked gate is formed on the substrate. A tunnel diffusion region is formed in the substrate next to a first side of the stacked gate. The tunnel diffusion region extends to a portion of the substrate under the stacked gate. A doped region is formed in the substrate next to a second side of the stacked gate. The doped region is distant away from the stacked gate by a lateral distance. An inter-poly dielectric layer covers the tunnel diffusion region, the doped region, and the stacked gate. A polysilicon layer is on the inter-poly dielectric layer and extends perpendicular to the stacked gate.