Patents Examined by Ramamohan Kao Paladugu
  • Patent number: 5316958
    Abstract: An in-situ doped n-type silicon layer is provided by a low temperature, low pressure chemical vapor deposition process employing a germanium-containing gas in combination with the n-type dopant containing gas to thereby enhance the in-situ incorporation of the n-type dopant into the silicon layer as an electronically active dopant. Also provided are a silicon layer including a P-N junction wherein the layer contains an n-type dopant and germanium, and devices such as transistors incorporating an in-situ n-doped silicon layer.
    Type: Grant
    Filed: May 31, 1990
    Date of Patent: May 31, 1994
    Assignee: International Business Machines Corporation
    Inventor: Bernard S. Meyerson
  • Patent number: 5234534
    Abstract: A liquid-phase growth process of a compound semiconductor which is capable of effectively controlling the generation of a surface defect and improve the product quality and production yield is disclosed in which before the start of liquid-phase growth, a substrate and a solution are held in a 100% hydrogen atmosphere or a mixed gas atmosphere consisting of more than 80% of hydrogen and the rest of an inert gas, and immediately before the start of the liquid-phase growth, the atmosphere is changed to a mixed gas atmosphere consisting of not more than 60% of hydrogen and the rest of the inert gas.
    Type: Grant
    Filed: July 27, 1992
    Date of Patent: August 10, 1993
    Assignee: Shin-Etsu Handotai Co., Ltd.
    Inventors: Munehisa Yanagisawa, Akio Nakamura, Toshio Otaki, Susumu Higuchi