Patents Examined by Ratisha Mehta
  • Patent number: 12294044
    Abstract: A display device may include a display panel including a pad disposed on a substrate and a driving unit including a bump electrically connected to the pad. The pad may include a first layer disposed on the substrate and including a conductive material, a second layer disposed on the first layer and including patterns arranged in a first direction and spaced apart from each other, and a third layer disposed on the second layer and including a conductive material. The first layer may include portions protruding toward the substrate and respectively corresponding to the patterns.
    Type: Grant
    Filed: January 30, 2024
    Date of Patent: May 6, 2025
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Dae Geun Lee, Joon Sam Kim, Suk Ho Choi
  • Patent number: 12294038
    Abstract: A method for manufacturing an electronic device is provided. The method for manufacturing the electronic device includes: providing a substrate with elements disposed thereon and transferring a portion of the elements from the substrate to a driving substrate, wherein transferring the portion of the elements from the substrate to the driving substrate includes: transferring the portion of the elements from the substrate to the driving substrate, which comprises illuminating regions of the substrate overlapped with the portion of the elements by an energy beam, wherein when the substrate is illuminated by the energy beam, the substrate and the driving substrate are separated by a gap.
    Type: Grant
    Filed: April 10, 2023
    Date of Patent: May 6, 2025
    Assignee: Innolux Corporation
    Inventors: Kai Cheng, Tsau-Hua Hsieh, Jian-Jung Shih, Fang-Ying Lin, Hui-Chieh Wang, Wan-Ling Huang
  • Patent number: 12289878
    Abstract: A semiconductor device that can be miniaturized or highly integrated can be provided. The semiconductor device includes a first conductor positioned over a substrate; an oxide positioned in contact with atop surface of the first conductor; a second conductor, a third conductor, and a fourth conductor positioned over the oxide; a first insulator in which a first opening and a second opening are formed, the first insulator being positioned over the second conductor to the fourth conductor; a second insulator positioned in the first opening; a fifth conductor positioned over the second insulator; a third insulator positioned in the second opening; and a sixth conductor positioned over the third insulator. The third conductor is positioned to overlap with the first conductor. The first opening is formed to overlap with a region between the second conductor and the third conductor. The second opening is formed to overlap with a region between the third conductor and the fourth conductor.
    Type: Grant
    Filed: June 30, 2020
    Date of Patent: April 29, 2025
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Tatsuya Onuki, Takanori Matsuzaki, Shunpei Yamazaki
  • Patent number: 12288765
    Abstract: Provided are a hybrid bonding structure, a solder paste composition, a semiconductor device, and a method of manufacturing the semiconductor device. The hybrid bonding structure includes a solder ball and a solder paste bonded to the solder ball. The solder paste includes a transient liquid phase. The transient liquid phase includes a core and a shell on a surface of the core. A melting point of the shell may be lower than a melting point of the core. The core and the shell are configured to form an intermetallic compound in response to the transient liquid phase at least partially being at a temperature that is within a temperature range of about 20° C. to about 190° C.
    Type: Grant
    Filed: September 17, 2021
    Date of Patent: April 29, 2025
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kunmo Chu, Byonggwon Song, Junghoon Lee
  • Patent number: 12289969
    Abstract: A display substrate has a screen area, the screen area includes at least one sensing area and a display area surrounding each sensing area, the sensing area includes a light-transmitting area and a routing area. The display substrate includes: a plurality of first gate lines, each of which includes a gate line main body part in the display area and a gate line connecting part; and a plurality of first data lines, each of which includes a data line main body part in the display area and a data line connecting part. For any one of the routing areas, the plurality of data line connecting parts are respectively in at least two metal layers insulated and spaced from each other, and/or, the plurality of gate line connecting parts are respectively arranged in at least two metal layers insulated and spaced from each other.
    Type: Grant
    Filed: May 19, 2021
    Date of Patent: April 29, 2025
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Hao Zhang, Libin Liu, Zhongji Jin
  • Patent number: 12288831
    Abstract: A manufacturing method for a LED is disclosed. The method includes: providing a substrate with an upper surface; preparing a plurality of LEDs on the upper surface; wherein the upper surface is divided into a plurality of zones, the plurality of LEDs composes a plurality of LED groups, and each of the LED group is disposed in one of the plurality of zones; preparing a testing circuit to electrically connecting the plurality of LEDs in one of the plurality of LED groups; testing the plurality of LEDs in the one of the plurality of LED groups by the testing circuit to obtain photoelectrical characteristics of the plurality of LEDs in the one of the plurality of LED groups; and presenting the photoelectric characteristics in an image.
    Type: Grant
    Filed: December 11, 2023
    Date of Patent: April 29, 2025
    Assignee: EPISTAR CORPORATION
    Inventors: Chia-Chen Tsai, Jia-Liang Tu, Chi-Ling Lee
  • Patent number: 12284833
    Abstract: A semiconductor device includes a first wiring; a first circuit region provided with a first power supply wiring and a first ground wiring; a second circuit region provided with a second power supply wiring and a second ground wiring; and a bidirectional diode connected between the first and second ground wirings, and provided with first and second diodes. The first diode includes a first impurity region of a first conductive type, connected to the second ground wiring, and a second impurity region of a second conductive type, connected to the first ground wiring. The second diode includes a third impurity region of the second conductive type connected to the second ground wiring, and a fourth impurity region of the first conductive type connected to the first ground wiring. Any of the first to fourth impurity regions, or any combination of the impurity regions is connected to the first wiring.
    Type: Grant
    Filed: November 18, 2021
    Date of Patent: April 22, 2025
    Assignee: SOCIONEXT INC.
    Inventor: Kazuya Okubo
  • Patent number: 12279468
    Abstract: Solid-state transducers (“SSTs”) and vertical high voltage SSTs having buried contacts are disclosed herein. An SST die in accordance with a particular embodiment can include a transducer structure having a first semiconductor material at a first side of the transducer structure, and a second semiconductor material at a second side of the transducer structure. The SST can further include a plurality of first contacts at the first side and electrically coupled to the first semiconductor material, and a plurality of second contacts extending from the first side to the second semiconductor material and electrically coupled to the second semiconductor material. An interconnect can be formed between at least one first contact and one second contact. The interconnects can be covered with a plurality of package materials.
    Type: Grant
    Filed: December 11, 2023
    Date of Patent: April 15, 2025
    Assignee: Micron Technology, Inc.
    Inventors: Vladimir Odnoblyudov, Martin F. Schubert
  • Patent number: 12272772
    Abstract: A red-light emitting device comprising: a blue LED chip; and a photoluminescence material comprising a narrowband red fluoride phosphor and a broadband red phosphor. The narrowband red phosphor may comprise a manganese-activated fluoride phosphor of composition K2SiF6:Mn4+, K2GeF6:Mn4+, and K2TiF6:Mn4+.
    Type: Grant
    Filed: December 8, 2023
    Date of Patent: April 8, 2025
    Assignee: Bridgelux, Inc.
    Inventors: Jingqiong Zhang, Yi-Qun Li, Jungang Zhao
  • Patent number: 12272565
    Abstract: The present disclosure provides a method for preparing a semiconductor structure using the hardmask structure. The method includes forming a conductive layer on a substrate; forming a first ashable hardmask layer on the conductive layer; forming a first anti-reflection coating on the first ashable hardmask layer; forming a second ashable hardmask layer on the first anti-reflection coating, wherein a modulus of the first ashable hardmask layer is greater than a modulus of the second ashable hardmask layer; etching the first ashable hardmask layer, the first anti-reflection coating, and the second ashable hardmask layer to transfer a first pattern to at least the first ashable hardmask layer; and etching the conductive layer according to the first ashable hardmask layer to form a patterned conductive layer.
    Type: Grant
    Filed: December 10, 2021
    Date of Patent: April 8, 2025
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventor: Wei-Chuan Fang
  • Patent number: 12266724
    Abstract: An Ill-nitride semiconductor based heterojunction power device is disclosed and includes a first and second heterojunction transistors formed on a substrate. The first and second heterojunction transistors include first and second Ill-nitride semiconductor regions formed over the substrate. The first Ill-nitride semiconductor region includes a first heterojunction, a first terminal connected to the first Ill-nitride semiconductor region, a second terminal laterally spaced from the first terminal and connected to the first Ill-nitride semiconductor region, and a first gate region over the first Ill-nitride semiconductor region between the first and second terminals.
    Type: Grant
    Filed: May 7, 2020
    Date of Patent: April 1, 2025
    Assignee: CAMBRIDGE GAN DEVICES LIMITED
    Inventors: Florin Udrea, Loizos Efthymiou, Giorgia Longobardi, Martin Arnold
  • Patent number: 12266750
    Abstract: A display device may include a display panel including a pad disposed on a substrate and a driving unit including a bump electrically connected to the pad. The pad may include a first layer disposed on the substrate and including a conductive material, a second layer disposed on the first layer and including patterns arranged in a first direction and spaced apart from each other, and a third layer disposed on the second layer and including a conductive material. The first layer may include portions protruding toward the substrate and respectively corresponding to the patterns.
    Type: Grant
    Filed: January 30, 2024
    Date of Patent: April 1, 2025
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Dae Geun Lee, Joon Sam Kim, Suk Ho Choi
  • Patent number: 12261239
    Abstract: A device for mass transfer of Mini-LEDs based on array water jet-based ejection, including a planar motion platform, a vision camera, an array water jet-type ejection unit, a Z-axis motion platform, a blue membrane, an operation platform and a transfer substrate. The vision camera and the array water jet-type ejection unit are provided on a side of the planar motion platform. The array water jet-type ejection unit includes a water jet channel and a through-hole array. The Z-axis motion platform is provided at a side of the planar motion platform near the vision camera, and is configured for placement of the blue membrane. Multiple Mini-LED chips are bonded to the blue membrane. The operation platform is spacedly provided at a side of the Z-axis motion platform away from the planar motion platform.
    Type: Grant
    Filed: July 11, 2024
    Date of Patent: March 25, 2025
    Assignee: Guangdong University of Technology
    Inventors: Yun Chen, Yanhui Chen, Li Ma, Pengwei Lv, Hao Zhang, Maoxiang Hou, Xin Chen
  • Patent number: 12261154
    Abstract: A display device includes a substrate, an organic insulating layer over the substrate, a metal layer over the organic insulating layer, and a light emitting element over the metal layer. The organic insulating layer includes a convex portion that overlaps the light emitting element. The metal layer covers the convex portion and includes a step portion along a side surface of the convex portion.
    Type: Grant
    Filed: February 9, 2022
    Date of Patent: March 25, 2025
    Assignee: JAPAN DISPLAY INC.
    Inventor: Yasuhiro Kanaya
  • Patent number: 12262575
    Abstract: Provided is a display substrate including a base substrate, an anode layer, a light-emitting layer, an electron diffusion layer, a hole block layer and a cathode layer which are sequentially stacked along a direction away from the base substrate, wherein a material of the electron diffusion layer comprises a first luminescent material, and a transport speed of holes generated by the anode layer in the electron diffusion layer is less than a transport speed of the holes in the light-emitting layer.
    Type: Grant
    Filed: August 7, 2020
    Date of Patent: March 25, 2025
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Haiyan Sun, Xiaojin Zhang, Dan Wang, Changho Lee
  • Patent number: 12255273
    Abstract: A display device includes a substrate and a light emitting layer on the substrate. The display device further includes a sealing portion on the light emitting layer. The sealing portion comprises a first inorganic layer. The first inorganic layer comprises at least one layer including silicon, oxygen, nitrogen and hydrogen. The at least one layer of the first inorganic layer includes a content of silicon of about 30-40 (at %), a content of oxygen of about 15-35 at %, a content of nitrogen of about 10-20 at %, a content of hydrogen of about 20-30 at %.
    Type: Grant
    Filed: February 4, 2020
    Date of Patent: March 18, 2025
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Shogo Nishizaki, Jaehyun Kim, Seokhoon Seo, Soyoung Lee, Seungjae Lee
  • Patent number: 12250866
    Abstract: A display motherboard and a manufacturing method of a display substrate are provided. The display motherboard includes: a substrate including a valid area and an edge area, the valid area including a plurality of panel areas and a to-be-cut area, and the panel area including a display area and a frame area; multiple first power lines in each display area and the edge area and extending along a first direction; multiple first display electrodes in each display area and multiple virtual electrodes in the edge area, the first display electrodes and the virtual electrodes being in the same layer; wherein an orthographic projection of each first display electrode on the substrate overlaps an orthographic projection of at most one first power line on the substrate, and an orthographic projection of each virtual electrode on the substrate overlaps orthographic projections of at least two first power lines on the substrate.
    Type: Grant
    Filed: April 9, 2021
    Date of Patent: March 11, 2025
    Assignees: CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Yongjie Song, Siyu Wang, Shun Zhang, Yi Zhang, Fengli Ji, Yuanqi Zhang, Yi Qu, Yan Huang
  • Patent number: 12249278
    Abstract: A microdisplay comprising a light emitting OLED stack on top of a silicon-based backplane with individually addressable pixels and control circuitry wherein the light emitting OLED stack has three or more OLED units between a top electrode and a bottom electrode; and the control circuitry of the silicon-based backplane comprises at least two transistors with their channels connected in series between an external power source VDD, and the bottom electrode of the OLED stack. The light-emitting OLED stack preferably has a Vth of at least 7.5V or more. The control circuit can include a protection circuit comprised of a p-n diode, preferably a bipolar junction transistor.
    Type: Grant
    Filed: January 26, 2021
    Date of Patent: March 11, 2025
    Assignees: OLEDWorks LLC, Fraunhofer-Gesellschaft e.V.
    Inventors: John Hamer, Marina Kondakova, Jeffrey Spindler, Bernd Richter, Philipp Wartenberg, Gerd Bunk, Uwe Vogel
  • Patent number: 12243859
    Abstract: An image display element includes pixels, a driving circuit substrate, a microlens, and an inter-pixel partition. The pixels are disposed in an array, each including a micro light emitting element. The driving circuit substrate includes a driving circuit configured to supply a current to the micro light emitting element and cause the micro light emitting element to emit light. The microlens is disposed for each of the pixels. The inter-pixel partition is disposed between the pixels and extends from a light emitting surface of the micro light emitting element to the microlens.
    Type: Grant
    Filed: December 1, 2021
    Date of Patent: March 4, 2025
    Assignee: Sharp Fukuyama Laser Co., Ltd.
    Inventors: Katsuji Iguchi, Hiroaki Onuma, Shin Itoh, Shinsuke Anzai
  • Patent number: 12243485
    Abstract: According to an aspect of the present disclosure, an organic light emitting display apparatus includes an organic light emitting diode; a driving transistor which supplies a driving current to the organic light emitting diode; and a plurality of switching transistors to transmit a reference voltage and a data voltage to a gate electrode of the driving transistor, respectively. According to the present disclosure, one frame is divided into a refresh period in which a data voltage is written and a hold period in which the data voltage written in the refresh period is held. The refresh period includes an initialization period, a sampling period, a programming period, and an emission period, and the sampling period and the programming period may be separate from each other.
    Type: Grant
    Filed: November 17, 2021
    Date of Patent: March 4, 2025
    Assignee: LG Display Co., Ltd.
    Inventors: Jaesung Kim, JuhnSuk Yoo, HoYoung Lee