Patents Examined by Ratisha Mehta
  • Patent number: 11776987
    Abstract: A display apparatus includes a display substrate, first micro LED modules arranged on the display substrate, and at least one second micro LED module disposed between the first micro LED modules. Each of the first micro LED modules includes a first substrate and micro LEDs disposed on the first substrate. The second micro LED module includes a second substrate and micro LEDs disposed on the second substrate. The second substrate bridges two adjacent first substrates.
    Type: Grant
    Filed: January 19, 2021
    Date of Patent: October 3, 2023
    Assignee: Seoul Viosys Co., Ltd.
    Inventors: Dae Sung Cho, So Ra Lee
  • Patent number: 11777052
    Abstract: A method of repairing a light emitting device, comprises: providing a light emitting device comprising a carrier board and a first light emitting unit; destroying the first light emitting unit and forming a removal surface on the light emitting device; planarizing the removal surface; providing a bonding structure on the removal surface; and fixing a second light emitting unit on the planarized removal surface through the bonding material.
    Type: Grant
    Filed: December 22, 2020
    Date of Patent: October 3, 2023
    Assignee: EPISTAR CORPORATION
    Inventor: Min-Hsun Hsieh
  • Patent number: 11749777
    Abstract: A method for manufacturing a light-emitting module, includes placing a light-emitting element on a support member with an electrode formation surface of the light-emitting element facing upward; forming a pair of first conductive members respectively on the element electrodes; forming a first light-reflective resin layer on the support member and around the light-emitting element and the first conductive members; forming a pair of second conductive members on the first light-reflective resin layer and respectively on the first conductive members, the second conductive member being wider than the first conductive member; forming a second light-reflective resin layer on the first light-reflective resin layer and around the second conductive members; forming wiring electrodes over the second light-reflective resin layer from the second conductive members; and removing the support member.
    Type: Grant
    Filed: April 27, 2020
    Date of Patent: September 5, 2023
    Assignee: NICHIA CORPORATION
    Inventor: So Sakamaki
  • Patent number: 11742468
    Abstract: An LED display module and an LED displayer are disclosed. The LED display module comprises a module bottom shell and a circuit board installed in the module bottom shell. The module bottom shell comprises a shell body and a first heat-dissipation cover disposed over a first open region of the shell body. The LED display module further comprises a power supply and a receiving card which are electrically connected to the circuit board. The power supply is located between the first heat-dissipation cover and the circuit board. The receiving card is located between the shell body and the circuit board. The LED display module is ultra-thin, and the LED displayer is made ultra-thin, accordingly.
    Type: Grant
    Filed: January 5, 2018
    Date of Patent: August 29, 2023
    Assignee: Ledman Optoelectronic Co., Ltd.
    Inventors: Mantie Li, Junxue Zhu, Yuanting Xue, Daohua Huang
  • Patent number: 11742456
    Abstract: A chip-detecting method, a chip-detecting structure and a chip-carrying structure are provided. The chip-detecting method includes providing a chip-detecting structure including a plurality of micro heater groups, a chip-carrying structure for carrying a plurality of chips, and a plurality of soldering material groups disposed between the chip-carrying structure and the chip-detecting structure; placing the chip-carrying structure and the chip-detecting structure adjacent to each other, so that each of the soldering material groups simultaneously contact the chip-carrying structure and the chip-detecting structure; respectively curing the low-temperature soldering material groups by heating of the micro heater groups, so that the chips are electrically connected to the chip-detecting structure respectively through the low-temperature soldering material groups that have been cured; and then detecting the chips so as to divide the chips into a plurality of good chips and a plurality of bad chips.
    Type: Grant
    Filed: June 8, 2021
    Date of Patent: August 29, 2023
    Assignee: ASTI GLOBAL INC., TAIWAN
    Inventors: Chien-Shou Liao, Cheng-Chieh Chang
  • Patent number: 11742455
    Abstract: What is disclosed are structures and methods for testing and repairing emissive display systems. Systems are tested with use of temporary electrodes which allow operation of the system during testing and are removed afterward. Systems are repaired after identification of defective devices with use of redundant switching from defective devices to functional devices provided on repair contact pads. Time varying signals coupled to a capacitor are used as well.
    Type: Grant
    Filed: November 27, 2020
    Date of Patent: August 29, 2023
    Assignee: VueReal Inc.
    Inventor: Gholamreza Chaji
  • Patent number: 11735700
    Abstract: A display device includes: a transparent circuit board and a plurality of light-emitting elements arrayed in matrix on the transparent circuit board, the light-emitting elements each including a pair of terminals which drive voltage for light emission is applied, the circuit board including a plurality of row wires each connecting ones of the pairs of terminals of ones of the light-emitting elements to each other, the ones of the light-emitting elements belonging to a same one of rows in the matrix array, and a plurality of column wires each connecting other ones of the pairs of terminals of ones of the light-emitting elements to each other, the ones of the light-emitting elements belonging to a same one of columns in the matrix array, the plurality of row wires and the plurality of column wires being formed on different surfaces of the circuit board.
    Type: Grant
    Filed: April 26, 2019
    Date of Patent: August 22, 2023
    Assignee: JUTAKU KANKYO SETSUBI CO., LTD
    Inventor: Katsuhiko Makino
  • Patent number: 11728382
    Abstract: Semiconductor devices and methods are provided. A semiconductor device according to the present disclosure includes a first gate-all-around (GAA) transistor having a first plurality of channel members, and a second GAA transistor having a second plurality of channel members. A pitch of the first plurality of channel members is substantially identical to a pitch of the second plurality of channel members. The first plurality of channel members has a first channel member thickness (MT1) and the second plurality of channel members has a second channel member thickness (MT2) greater than the first channel member thickness (MT1).
    Type: Grant
    Filed: July 26, 2022
    Date of Patent: August 15, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventor: Jhon Jhy Liaw
  • Patent number: 11728432
    Abstract: A semiconductor device comprises a memory macro including a well pick-up (WPU) area oriented lengthwise along a first direction, and memory bit areas adjacent to the WPU area. In the WPU area, the memory macro includes n-type and p-type wells arranged alternately along the first direction with well boundaries between adjacent wells; gate structures over the wells and oriented lengthwise along the first direction; a first dielectric layer disposed at each of the well boundaries; first contact features disposed over one of the p-type wells; and second contact features disposed over one of the n-type wells. From a top view, the first dielectric layer extends along a second direction perpendicular to the first direction and separates all the gate structures in the first WPU area, the first contact features are disposed between the gate structures, and the second contact features are disposed between the gate structures.
    Type: Grant
    Filed: June 21, 2021
    Date of Patent: August 15, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Hsin-Wen Su, Yu-Kuan Lin, Chih-Chuan Yang, Chang-Ta Yang, Shih-Hao Lin
  • Patent number: 11715812
    Abstract: A display device includes a plurality of semiconductor light emitting diodes, first and second electrodes respectively extending from the plurality of semiconductor light emitting diodes to supply an electrical signal to the plurality of semiconductor light emitting diodes, a plurality of pair electrodes disposed on a substrate and having a first electrode and a second electrode, a dielectric layer disposed on the plurality of pair electrodes, and a chemical bond layer disposed between the dielectric layer and the plurality of semiconductor light emitting diodes and forming a covalent bond with the dielectric layer and each of the plurality of semiconductor light emitting diodes. The chemical bond layer bonds the semiconductor light emitting diodes to the dielectric layer when a voltage applied to the plurality of pair electrodes is cut off after the plurality of semiconductor light emitting diodes are assembled on the dielectric layer.
    Type: Grant
    Filed: June 3, 2022
    Date of Patent: August 1, 2023
    Assignee: LG ELECTRONICS INC.
    Inventors: Junghoon Kim, Hyunwoo Cho, Mihee Heo
  • Patent number: 11707803
    Abstract: A semiconductor fabrication apparatus includes a source chamber being operable to generate charged particles; and a processing chamber integrated with the source chamber and configured to receive the charged particles from the source chamber. The processing chamber includes a wafer stage being operable to secure and move a wafer, and a laser-charged particles interaction module that further includes a laser source to generate a first laser beam; a beam splitter configured to split the first laser beam into a second laser beam and a third laser beam; and a mirror configured to reflect the third laser beam such that the third laser beam is redirected to intersect with the second laser beam to form a laser interference pattern at a path of the charged particles, and wherein the laser interference pattern modulates the charged particles by in a micron-zone mode for processing the wafer using the modulated charged particles.
    Type: Grant
    Filed: June 6, 2022
    Date of Patent: July 25, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD
    Inventors: Chansyun David Yang, Li-Te Lin, Pinyen Lin
  • Patent number: 11705540
    Abstract: A display device includes a substrate, a first electrode disposed on the substrate, a second electrode disposed on the substrate and spaced apart from the first electrode, a plurality of first protruding electrodes disposed on the first electrode, a plurality of second protruding electrodes disposed on the second electrode, and a plurality of light emitting elements electrically connected to the plurality of first protruding electrodes and the plurality of second protruding electrodes.
    Type: Grant
    Filed: October 14, 2022
    Date of Patent: July 18, 2023
    Assignee: Samsung Display Co., Ltd.
    Inventors: Chongsup Chang, Youngdae Kim, Hyunae Kim, Euikang Heo
  • Patent number: 11705541
    Abstract: A light-emitting device includes a mounting substrate having a first surface and a second surface opposite to the first surface, the mounting substrate having a first end portion at an end of the mounting substrate; light-emitting elements mounted on the first surface of the mounting substrate other than the first end portion; first terminals provided on the first surface at the first end portion of the mounting substrate and connected to the light-emitting elements; and second terminals provided on the second surface at the first end portion of the mounting substrate and connected to the light-emitting elements.
    Type: Grant
    Filed: April 21, 2020
    Date of Patent: July 18, 2023
    Assignee: NICHIA CORPORATION
    Inventor: Kimihiro Miyamoto
  • Patent number: 11699605
    Abstract: An apparatus for treating a substrate includes a chamber having a treating space formed therein, a substrate support unit that supports the substrate in the treating space, a plate that is located to face the substrate support unit in the treating space and that has a plurality of holes formed therein, a gas supply unit that supplies gas into the treating space through the holes, and a gas exhaust unit that exhausts the gas in the treating space through the holes.
    Type: Grant
    Filed: May 11, 2020
    Date of Patent: July 11, 2023
    Assignee: SEMES CO., LTD.
    Inventors: Kyungsik Shin, Jung-Hyun Lee, Jinki Shin, Seo Jung Park
  • Patent number: 11699773
    Abstract: Disclosed herein are techniques for forming a thin-film circuit layer on an array of light-emitting diodes (LEDs). LEDs in the array of LEDs can be singulated by various processes, such as etching and ion implantation. Singulating LEDs can be performed before or after forming the thin-film circuit layer on the array of LEDs. The array of LEDs can be bonded to a transparent or non-transparent substrate.
    Type: Grant
    Filed: April 26, 2022
    Date of Patent: July 11, 2023
    Assignee: META PLATFORMS TECHNOLOGIES, LLC
    Inventors: Chloe Astrid Marie Fabien, Michael Grundmann
  • Patent number: 11696511
    Abstract: A magnetic tunnel junction (MTJ) is disclosed wherein a free layer (FL) interfaces with a first metal oxide (Mox) layer and second metal oxide (tunnel barrier) to produce perpendicular magnetic anisotropy (PMA) in the FL. In some embodiments, conductive metal channels made of a noble metal are formed in the Mox that is MgO to reduce parasitic resistance. In a second embodiment, a discontinuous MgO layer with a plurality of islands is formed as the Mox layer and a non-magnetic hard mask layer is deposited to fill spaces between adjacent islands and form shorting pathways through the Mox. In another embodiment, end portions between the sides of a center Mox portion and the MTJ sidewall are reduced to form shorting pathways by depositing a reducing metal layer on Mox sidewalls, or performing a reduction process with forming gas, H2, or a reducing species.
    Type: Grant
    Filed: October 5, 2020
    Date of Patent: July 4, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Sahil Patel, Guenole Jan, Ru-Ying Tong, Vignesh Sundar, Dongna Shen, Yu-Jen Wang, Po-Kang Wang, Huanlong Liu
  • Patent number: 11676867
    Abstract: Methods of manufacturing a semiconductor structure are provided. One of the methods includes the following operations. A substrate is received, and the substrate includes a first conductive region and a second conductive region. A first laser anneal is performed on the first conductive region to repair lattice damage. An amorphization is performed on the first conductive region and the second conductive region to enhance silicide formation to a desired phase transformation in the subsequent operations. A pre-silicide layer is formed on the substrate. A thermal anneal is performed to the substrate to form a silicide layer from the pre-silicide layer. A second laser anneal is performed on the first conductive region and the second conductive region.
    Type: Grant
    Filed: August 9, 2021
    Date of Patent: June 13, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Chun Hsiung Tsai, Cheng-Yi Peng, Ching-Hua Lee, Clement Hsingjen Wann, Yu-Ming Lin
  • Patent number: 11677061
    Abstract: A semiconductor device includes a substrate including a first region and a second region that are arranged in a first direction that is parallel to an upper surface of the substrate; a separation layer provided on the first region of the substrate; a high electron mobility transistor (HEMT) device overlapping the separation layer in a second direction that is perpendicular to the upper surface of the substrate; a light-emitting device provided on the second region of the substrate; and a first insulating pattern covering a side surface of the HEMT device, wherein the first insulating pattern overlaps the separation layer in the second direction.
    Type: Grant
    Filed: May 11, 2022
    Date of Patent: June 13, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Kiho Kong, Junhee Choi, Jinjoo Park, Joohun Han
  • Patent number: 11670571
    Abstract: Semiconductor chip package device and semiconductor chip package method are provided. The semiconductor chip package device includes: a lead frame, chips, an encapsulating layer, and an electroplating layer. The lead frame includes a first surface, a second surface, first grooves, second grooves, and third grooves. The first grooves are connected to the second grooves to form through holes and the third grooves disposed at ends of the lead frame. The chips are electrically connected to the lead frame. The encapsulating layer is formed by using an encapsulating material to encapsulate the chips and at least a portion of the lead frame. The first grooves are filled with the encapsulating material. The electroplating layer is disposed on the second surface of the lead frame, and extends into the third grooves or into the third grooves and the second grooves.
    Type: Grant
    Filed: August 27, 2021
    Date of Patent: June 6, 2023
    Assignee: TONGFU MICROELECTRONICS CO., LTD.
    Inventor: Lei Shi
  • Patent number: 11658262
    Abstract: A method for manufacturing a light emitting device is provided. The method for manufacturing the light emitting device includes: providing a substrate with light emitting units disposed thereon; attaching the light emitting units to a carrier; removing the substrate; and transferring a portion of the light emitting units from the carrier to a driving substrate.
    Type: Grant
    Filed: April 20, 2020
    Date of Patent: May 23, 2023
    Assignee: Innolux Corporation
    Inventors: Kai Cheng, Tsau-Hua Hsieh, Jian-Jung Shih, Fang-Ying Lin, Hui-Chieh Wang, Wan-Ling Huang