Patents Examined by Roberts P Culbert
  • Patent number: 11538692
    Abstract: A method for processing a substrate includes performing a cyclic process including a plurality of cycles, where the cyclic process includes: forming, in a plasma processing chamber, a passivation layer over sidewalls of a recess in a carbon-containing layer, by exposing the substrate to a first gas including boron, silicon, or aluminum, the carbon-containing layer being disposed over a substrate, purging the plasma processing chamber with a second gas including a hydrogen-containing gas, an oxygen-containing gas, or molecular nitrogen, and exposing the substrate to a plasma generated from the second gas, where each cycle of the plurality of cycles extends the recess vertically into the carbon-containing layer.
    Type: Grant
    Filed: May 21, 2021
    Date of Patent: December 27, 2022
    Assignee: Tokyo Electron Limited
    Inventors: Yunho Kim, Du Zhang, Shihsheng Chang, Mingmei Wang, Andrew Metz
  • Patent number: 11524426
    Abstract: There is provided a new and improved master manufacturing method, master, and optical body enabling more consistent production of optical bodies having a desired haze value, the master manufacturing method including: forming a first micro concave-convex structure, in which an average cycle of concavities and convexities is less than or equal to visible light wavelengths, on a surface of a base material body that includes at least a base material; forming an inorganic resist layer on the first micro concave-convex structure; forming, on the inorganic resist layer, an organic resist layer including an organic resist and filler particles distributed throughout the organic resist; and etching the organic resist layer and the inorganic resist layer to thereby superimpose and form on the surface of the base material a macro concave-convex structure and a second micro concave-convex structure.
    Type: Grant
    Filed: March 3, 2021
    Date of Patent: December 13, 2022
    Assignee: DEXERIALS CORPORATION
    Inventors: Shunichi Kajiya, Hideki Terashima, Yuichi Arisaka
  • Patent number: 11505731
    Abstract: A slurry containing abrasive grains and a liquid medium, in which the abrasive grains include first particles and second particles in contact with the first particles, a particle size of the second particles is smaller than a particle size of the first particles, the first particles contain cerium oxide, the second particles contain a cerium compound, and in a case where a content of the abrasive grains is 0.1% by mass, a BET specific surface area of a solid phase obtained when the slurry is subjected to centrifugal separation for 60 minutes at a centrifugal acceleration of 1.1×104 G is 40 m2/g or more.
    Type: Grant
    Filed: September 25, 2018
    Date of Patent: November 22, 2022
    Assignee: SHOWA DENKO MATERIALS CO., LTD.
    Inventors: Takaaki Matsumoto, Tomohiro Iwano, Tomoyasu Hasegawa, Tomomi Kukita
  • Patent number: 11499072
    Abstract: A composition suitable for chemical mechanical polishing a substrate can comprise abrasive particles, a multi-valent metal borate, at least one oxidizer and a solvent. The composition can polish a substrate with a high material removal rate and a very smooth surface finish.
    Type: Grant
    Filed: August 27, 2020
    Date of Patent: November 15, 2022
    Assignee: SAINT-GOBAIN CERAMICS & PLASTICS, INC.
    Inventors: Lin Fu, Jason A. Sherlock, Long Huy Bui, Douglas E. Ward
  • Patent number: 11495602
    Abstract: Embodiments of the present disclosure provide a method and a device for determining a fabrication chamber. According to a current radio frequency power time of each of the fabrication chambers corresponding to adjacent process steps and service phases divided based on a service period of the fabrication chambers, a service phase is determined for the current radio frequency power time of each of the fabrication chambers. For target objects processed by the fabrication chambers in the current process step, fabrication chambers for the target objects to enter in a next process step are directly determined according to the service phase of the current radio frequency power time of each of the fabrication chambers.
    Type: Grant
    Filed: January 12, 2022
    Date of Patent: November 8, 2022
    Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
    Inventors: Zhenxing Li, Yuming Wang, Fang Wang, San-Chen Chen, Chen-Hua Shen
  • Patent number: 11495461
    Abstract: Methods for forming a film stack comprising a hardmask layer and etching such hardmask layer to form features in the film stack are provided. The methods described herein facilitate profile and dimension control of features through a proper profile management scheme formed in the film stack. In one or more embodiments, a method for etching a hardmask layer includes forming a hardmask layer on a substrate, where the hardmask layer contains a metal-containing material containing a metal element having an atomic number greater than 28, supplying an etching gas mixture to the substrate, and etching the hardmask layer exposed by a photoresist layer.
    Type: Grant
    Filed: February 25, 2020
    Date of Patent: November 8, 2022
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Tejinder Singh, Suketu Arun Parikh, Daniel Lee Diehl, Michael Anthony Stolfi, Jothilingam Ramalingam, Yong Cao, Lifan Yan, Chi-I Lang, Hoyung David Hwang
  • Patent number: 11488834
    Abstract: Disclosed is a method of forming a fine silicon pattern with a high aspect ratio for fabrication of a semiconductor device. The method includes a cleaning process of removing organic residue or reside originating in fumes using a cleaning solution, thereby enabling formation of a desired pattern while preventing the pattern from being lifted. Thus, the present disclosure enables formation of a fine pattern by using a novel cleaning method.
    Type: Grant
    Filed: January 17, 2020
    Date of Patent: November 1, 2022
    Assignee: YOUNG CHANG CHEMICAL CO., LTD
    Inventors: Su Jin Lee, Gi Hong Kim, Seung Hun Lee, Seung Hyun Lee
  • Patent number: 11482425
    Abstract: An etching method includes: providing, on a stage, a substrate including an etching film containing a silicon oxide film, and a mask formed on the etching film; setting a temperature of the stage to be 0° C. or less; and generating plasma from a gas containing fluorine, nitrogen, and carbon, and having a ratio of the number of fluorine to the number of nitrogen (F/N) in a range of 0.5 to 10, thereby etching the silicon oxide film through the mask.
    Type: Grant
    Filed: December 22, 2020
    Date of Patent: October 25, 2022
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Ryutaro Suda, Maju Tomura
  • Patent number: 11482411
    Abstract: A method of forming a semiconductor device includes forming a mask layer over a substrate and forming an opening in the mask layer. A gap-filling material is deposited in the opening. A plasma treatment is performed on the gap-filling material. The height of the gap-filling material is reduced. The mask layer is removed. The substrate is patterned using the gap-filling material as a mask.
    Type: Grant
    Filed: June 30, 2020
    Date of Patent: October 25, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Ching-Yu Chang, Jei Ming Chen, Tze-Liang Lee
  • Patent number: 11472984
    Abstract: A method of enhancing the removal rate of polysilicon from a substrate includes mixing an acid chemical mechanical polishing slurry containing water, an organic acid and an abrasive with an alkaline solution containing water, an abrasive, a low alkyl amine compound; providing a chemical mechanical polishing pad, having a polishing surface; creating dynamic contact at an interface between the polishing pad and the substrate; and dispensing the mixture of the chemical mechanical polishing slurry and the alkaline solution onto the polishing surface at or near the interface between the polishing pad and the substrate, wherein some of the polysilicon is polished away from the substrate.
    Type: Grant
    Filed: September 27, 2021
    Date of Patent: October 18, 2022
    Assignee: Rohm and Haas Electronic Materials CMP Holdings, Inc.
    Inventor: Yi Guo
  • Patent number: 11462407
    Abstract: An etching method includes: forming a second film on a workpiece target including a processing target film, a layer including a plurality of convex portions formed on the processing target film, and a first film that covers the plurality of convex portions and the processing target film exposed between the plurality of convex portions; etching the second film in a state where the second film remains on a portion of the first film that covers a side surface of each of the plurality of convex portions; and etching the first film in a state where the second film remains on the portion of the first film that covers the side surface of each of the plurality of convex portions, thereby exposing a top portion of each of the plurality of convex portions and the processing target film between the plurality of convex portions.
    Type: Grant
    Filed: July 9, 2019
    Date of Patent: October 4, 2022
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Yusuke Yanagisawa, Yusuke Takino
  • Patent number: 11450532
    Abstract: A method for selectively etching a first region of a structure with respect to a second region of the structure is provided. The method comprises at least one cycle. Each cycle comprises selectively depositing an inhibitor layer on the first region of the structure, providing an atomic layer deposition over the structure, wherein the atomic layer deposition selectively deposits a mask on the second region of the structure with respect to the inhibitor layer, and selectively etching the first region of the structure with respect to the mask. The selectively depositing an inhibitor layer on the first region of the structure comprises providing an inhibitor layer gas and forming the inhibitor layer gas into inhibitor layer radicals, wherein the inhibitor layer radicals selectively deposit on the first region of the structure with respect to the second region of the structure.
    Type: Grant
    Filed: June 25, 2020
    Date of Patent: September 20, 2022
    Assignee: Lam Research Corporation
    Inventors: Younghee Lee, Daniel Peter, Samantha SiamHwa Tan, Yang Pan
  • Patent number: 11443955
    Abstract: Semiconductor devices and fabrication methods are provided. An exemplary fabrication method includes providing a to-be-etched layer having a plurality of first regions and second regions; forming a first mask layer on the to-be-etched layer; doping portions of the first mask layer outside the second trench regions; forming a second mask layer on the first mask layer; forming a first trench penetrating the first mask layer and the second mask layer over the first regions; forming a mask sidewall spacer on sidewall surfaces of the first trench; removing the second mask layer; and removing the first mask layer in the second trench regions using the mask sidewall spacers and the doped portions of the first mask layer as an etching mask to form seconds trenches over the second trench regions of the plurality of second regions. The sidewall surface of the second trench exposes a corresponding mask sidewall spacer.
    Type: Grant
    Filed: April 20, 2020
    Date of Patent: September 13, 2022
    Assignees: Semiconductor Manufacturing International (Shanghai) Corporation, Semiconductor Manufacturing International (Beijing) Corporation
    Inventor: Jisong Jin
  • Patent number: 11430664
    Abstract: An etching method includes etching a first silicon-containing film of a substrate by plasma of a first processing gas; and etching a second silicon-containing film of the substrate by plasma of a second processing gas. The etching of the first silicon-containing film and the etching of the second silicon-containing film are repeated a preset number of times.
    Type: Grant
    Filed: January 26, 2021
    Date of Patent: August 30, 2022
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Wakako Ishida, Masaaki Kikuchi, Wataru Togashi, Yasunori Hatamura
  • Patent number: 11422456
    Abstract: A phase shift mask blank has a transparent substrate and a phase shift film formed on the transparent substrate. The phase shift film has a phase difference of 160 to 200° and a transmittance of 3 to 15% at exposure wavelength of 200 nm or less and includes a lower layer and an upper layer in order from the transparent substrate side. The upper layer contains transition metal, silicon, nitrogen and/or oxygen, or silicon, nitrogen and/or oxygen. The lower layer contains chromium, silicon, nitrogen and/or oxygen, and the content of silicon is 3% or more to less than 15% for the sum of chromium and silicon in the lower layer. The ratio of oxygen content to the total content of chromium and silicon is less than 1.7, and etching selectivity of the upper layer is 10 or more compared to the lower layer in fluorine-based dry etching.
    Type: Grant
    Filed: August 31, 2021
    Date of Patent: August 23, 2022
    Assignee: SHIN-ETSU CHEMICAL CO., LTD.
    Inventors: Takuro Kosaka, Naoki Matsuhashi, Shohei Mimura
  • Patent number: 11424122
    Abstract: A mask pattern, a semiconductor structure and a method for forming the semiconductor structure are provided. The mask pattern includes a first mask pattern and a second mask pattern. The first mask pattern includes a plurality of first target patterns, and the plurality of first target patterns are arranged along a first direction. The second mask pattern includes a plurality of second target patterns, and the plurality of second target patterns are arranged along the first direction. When the first mask pattern overlaps the second mask pattern, one of the plurality of first target patterns partially overlaps a corresponding one of the plurality of second target patterns.
    Type: Grant
    Filed: September 29, 2020
    Date of Patent: August 23, 2022
    Assignees: Semiconductor Manufacturing International (Beijing) Corporation, Semiconductor Manufacturing International (Shanghai) Corporation
    Inventors: Qiang Shu, Yingchun Zhang, Liusha Qin
  • Patent number: 11421132
    Abstract: To provide a novel polishing composition capable of improving the polishing speed of metal (particularly, tungsten) and maintaining stability as a composition. A polishing composition contains abrasive grains; quaternary amine having at least one alkyl group having 2 or more carbon atoms or a salt thereof; and a liquid carrier, wherein a pH of the polishing composition is from 2 to 5, and a zeta potential of the abrasive grains in the polishing composition is adjusted to 15 mV or more and less than 40 mV over the entire range of pH 2 to pH 4.
    Type: Grant
    Filed: March 11, 2021
    Date of Patent: August 23, 2022
    Inventor: Takahiro Umeda
  • Patent number: 11424131
    Abstract: This disclosure relates to a polishing composition that includes at least one abrasive; at least one nitride removal rate reducing agent, an acid and a base; and water. The at least one nitride removal rate reduce agent can include a hydrophobic portion and a hydrophilic portion; in which the hydrophobic portion includes a C16 to C22 hydrocarbon group and the hydrophilic portion comprises at least one group selected from the group consisting of a sulfinite group, a sulfate group, a sulfonate group, a carboxylate group, a phosphate group, and a phosphonate group. The polishing composition has a pH of about 2 to about 6.5.
    Type: Grant
    Filed: July 15, 2020
    Date of Patent: August 23, 2022
    Assignee: Fujifilm Electronic Materials U.S.A., Inc.
    Inventors: Carl Ballesteros, Abhudaya Mishra, Eric Turner
  • Patent number: 11424130
    Abstract: The present invention relates to a method for selective etching of a nanostructure (10). The method comprising: providing the nanostructure (10) having a main surface (12) delimited by, in relation to the main surface (12), inclined surfaces (14); and subjecting the nanostructure (10) for a dry etching, wherein the dry etching comprises: subjecting the nanostructure (10) for a low energy particle beam (20) having a direction perpendicular to the main surface (12); whereby a recess (16) in the nanostructure (10) is formed, the recess (16) having its opening at the main surface (12) of the nanostructure (10).
    Type: Grant
    Filed: January 22, 2021
    Date of Patent: August 23, 2022
    Assignee: ALIXLABS AB
    Inventors: Md Sabbir Ahmed Khan, Jonas Sundqvist, Dmitry Suyatin
  • Patent number: 11414568
    Abstract: A polishing composition includes an abrasive; a pH adjuster; a barrier film removal rate enhancer; a low-k removal rate inhibitor; an azole-containing corrosion inhibitor; and a hard mask removal rate enhancer. A method of polishing a substrate includes the steps of: applying the polishing composition described herein to a surface of a substrate, wherein the surface comprises ruthenium or a hard mask material; and bringing a pad into contact with the surface of the substrate and moving the pad in relation to the substrate.
    Type: Grant
    Filed: February 8, 2021
    Date of Patent: August 16, 2022
    Assignee: Fujifilm Electronic Materials U.S.A., Inc.
    Inventors: Ting-Kai Huang, Tawei Lin, Bin Hu, Liqing Wen, Yannan Liang