Patents Examined by Roy N. Envall, Jr.
  • Patent number: 5583757
    Abstract: A method of input signal resolution in a process control system where each of the actively redundant process control computers performs a common arbitration process on corresponding input signals. Blocks of corresponding input signals are mutually exchanged by the actively redundant process control computers, and an initial check is made to determine if these input signals are valid. For input signals representing valid analog values, a determination is made as to whether a predefined tolerance has been exceeded between corresponding input signals in the present process control cycle. When the predefined tolerance has been exceeded, then a check will be made to determine the predefined tolerance was also exceeded in the last process control cycle. If the predefined tolerance was not exceeded in the last process control cycle, then the analog input value selected during the last process control cycle will be employed in the present process control cycle.
    Type: Grant
    Filed: August 4, 1992
    Date of Patent: December 10, 1996
    Assignee: The Dow Chemical Company
    Inventors: Eloy Baca, Jr., Wayne P. Dupree, Donald J. Grinwis, Johannes C. Kanse, Douglas P. Pelletier, Oscar E. Schulze
  • Patent number: 5583781
    Abstract: A process and a device for the correction of the regulation onset point and of the intensity of regulation relate to a regulated drawing frame of the textile industry, i.e. a drawing frame in which drafting can be regulated or can be changed in a controlled manner. A selected transient signal of the fiber sliver thickness starts the process for a limited time span so that, independently of the existing regulation, the response signal is detected at the drawing frame output and its difference with the input signal is evaluated in order to correct the regulation onset point and/or the intensity of regulation.
    Type: Grant
    Filed: August 25, 1994
    Date of Patent: December 10, 1996
    Assignee: Rieter Ingolstadt Spinnereimaschinenbau AG
    Inventors: Peter Denz, Johann-Christian Promoli
  • Patent number: 5583780
    Abstract: A method and apparatus for predicting the spectral (wavelength-dependent) radiation transport in thermal systems including interaction by the radiation with partially transmitting medium. The predicted model of the thermal system is used to design and control the thermal system. The predictions are well suited to be implemented in design and control of rapid thermal processing (RTP) reactors. The method involves generating a spectral thermal radiation transport model of an RTP reactor. The method also involves specifying a desired wafer time dependent temperature profile. The method further involves calculating an inverse of the generated model using the desired wafer time dependent temperature to determine heating element parameters required to produce the desired profile. The method also involves controlling the heating elements of the RTP reactor in accordance with the heating element parameters to heat the wafer in accordance with the desired profile.
    Type: Grant
    Filed: December 30, 1994
    Date of Patent: December 10, 1996
    Inventors: Robert J. Kee, Aili Ting
  • Patent number: 5583876
    Abstract: When new data for writing is sent from a host device, old data and old parities are read after a search time respectively, and a new parity is generated with the new data, the old data and the old parities, and the new parity is stored in a cache memory, and when the number of the new parities corresponding to a plurality of write data becomes more than a predetermined value set by a user or when there is a period of time in which no read request or no write request is issued, new parities are collectively written to a drive for storing parities. In this case, a plurality of new parities are written in a series of storing positions, where a plurality of old parities are stored, in a predetermined access order independent of the stored positions of corresponding old parities. At least to a plurality of storing positions in a track, these new parities are written in the order of positions in a track.
    Type: Grant
    Filed: October 4, 1994
    Date of Patent: December 10, 1996
    Assignee: Hitachi, Ltd.
    Inventor: Hitoshi Kakuta
  • Patent number: 5583782
    Abstract: A caliper profile control system for a paper machine provides reduced start up times after sheet breaks to bring the caliper profile across the sheet to within the desired limits. The method comprises the steps of scanning at predetermined intervals across the width of the paper sheet to monitor thickness error of the sheet from predetermined limits and change in the thickness error between the intervals, in each of a plurality of zones across the sheet. A control change signal is determined for each of the zones based on the error and the change in error using an exponential function of the magnitude of the error to maximize the change in the error and reduce integral action when the error is large. The control signal is used to reduce the error in each zone and the integral action is increased as the error decreases until the predetermined limits are met.
    Type: Grant
    Filed: November 10, 1994
    Date of Patent: December 10, 1996
    Assignee: Measurex Devron Inc.
    Inventors: Edwin M. G. Heaven, Christopher B. Lynch, Par O. A. Hallman
  • Patent number: 5583806
    Abstract: Carry-save adder techniques are used to concurrently generate Effective and Intermediate (also known as Relocation or Linear) Addresses with only a single carry propagation for each Address. Base, Scaled Index, and Displacement components are input to a first carry-save adder, which is common to both address calculations. A first sum vector and a first left-shifted carry vector are inputs to a first carry-propagate adder for generating the Effective Address. A second carry-save adder has as inputs a Segment Base Address, said first sum vector, and said first left-shifted carry vector. A second sum vector and a second left-shifted carry vector are inputs to a second carry-propagate adder for generating the Intermediate Address.
    Type: Grant
    Filed: March 10, 1995
    Date of Patent: December 10, 1996
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Larry Widigen, William A. Stutz
  • Patent number: 5583804
    Abstract: A data processing system is described utilizes a multiplier-accumulator 108 that performs both a first class of multiply-accumulate instructions and a second class of multiply-accumulate instructions. The first class of multiply-accumulate instructions are of the form N*N+N.fwdarw.N and the second class of multiply-accumulate instructions are of the form N*N+2N.fwdarw.2N. The second class of multiply-accumulate instructions provide a greater precision of arithmetic in a single instruction and avoid the use of excessive instruction set space by being constrained that the result is written back into the two registers from which the 2N-bit accumulate value was taken. The multiplier-accumulator also provides N*N.fwdarw.N and N*N.fwdarw.2N multiplication operations.
    Type: Grant
    Filed: January 27, 1995
    Date of Patent: December 10, 1996
    Assignee: Advanced Risc Machines Limited
    Inventors: David J. Seal, Guy Larri, David V. Jaggar
  • Patent number: 5581457
    Abstract: A control device for use in a sewing machine and a control method in which the memory contents of a memory element are read when a servo microcomputer generates an interrupt. The control device also changes sewing data by specifying a rewriting format when sewing data are changed, automatically detects the rewriting of the memory contents of a rewritable memory element due to noise, and restores the memory contents to their original state before they have actually been rewritten.
    Type: Grant
    Filed: December 26, 1995
    Date of Patent: December 3, 1996
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Hisaaki Tsukahara
  • Patent number: 5581468
    Abstract: A system and method for simulating LCM mold filling utilizes at least one processor, suitable RAM and storage memory, input means, display means, and logic for simulating the injection of resin into a mold cavity containing a preform based upon mold cavity design parameters, mold filling processing parameters, physical property parameters, and system processing parameters, and identifying the current state of selected mold filling conditions at selected points in time during the simulated mold filling process. The system includes logic for identifying incipient dry spots, and also preferably includes means for interrupting the operation of the program at selected points to vary selected parameters to eliminate incipient dry spots and otherwise maximize the mold filling process.
    Type: Grant
    Filed: January 11, 1995
    Date of Patent: December 3, 1996
    Assignee: The Dow Chemical Co.
    Inventors: Warren D. White, Muhammad A. Shafi, L. James Lee, Kerang Han
  • Patent number: 5581459
    Abstract: When amounts of operation control variables and/or operation state evaluation variables of a plant are calculated through a multilayered neural network based on data indicating a plant state, and the calculated results are indicated to an operator, a plant operation support system has functions to analyze an internal causality between neurons in the neural network, and display quantitative guidance by association in the neural network and also the analyzed result of the internal causality between the neurons as an association reason.
    Type: Grant
    Filed: September 26, 1991
    Date of Patent: December 3, 1996
    Assignee: Hitachi, Ltd.
    Inventors: Ichiro Enbutsu, Kenji Baba, Shoji Watanabe, Hayao Yahagi, Naoki Hara, Mikio Yoda
  • Patent number: 5581568
    Abstract: A data detection apparatus has an A/D (analog to digital) converter which samples and quantizes the output of a low-frequency-emphasizing-type equalization circuit and a digital filter which processes the output of the A/D converter. A Viterbi decoder performs Viterbi decoding of the digital output filter and determines a branchmetric on the basis of an equalization error.
    Type: Grant
    Filed: August 21, 1995
    Date of Patent: December 3, 1996
    Assignee: Canon Kabushiki Kaisha
    Inventor: Mikio Togami
  • Patent number: 5581496
    Abstract: Parallel processing architecture is used for an adder and its "look-ahead" zero-flag generator, which generates a flag signal for the most significant bit of the sum of the adder. The look-ahead zero-flag is generated with combinatorial logic circuits, which are fed from the addends and augents of the different bits for the adder and then decoded. The combinatorial logic circuits may comprise AND gates and XOR gates in a gate-array, and the decoder may be a programmable logic array (PLA). The computation time for the zero-flag thus generated is shorter than the computation time for the sum of the adder.
    Type: Grant
    Filed: October 11, 1994
    Date of Patent: December 3, 1996
    Assignee: Industrial Technology Research Institute
    Inventors: Shiang-Jhy Lai, Hwai-Tsu Chang
  • Patent number: 5581492
    Abstract: A flexible wearable computer in the form of a belt comprising in combination, elements for computing comprising a microprocessor module, a RAM-I/O module, a plurality of mass memory modules, a power supply module, and a plurality of bus termination modules operationally associated with a plurality of flexible signal relaying means. The computing elements are mechanically associated with a flexible non-stretchable member, and a protective covering means. The flexible non-stretchable wearable member is secured around various parts of the body. An input and output device is connected to the flexible wearable computer by the I/O bus attached to the output and input ports.
    Type: Grant
    Filed: February 13, 1996
    Date of Patent: December 3, 1996
    Assignee: Key Idea Development, L.L.C.
    Inventor: Craig M. Janik
  • Patent number: 5579253
    Abstract: A N-bit by N-bit multiplication apparatus having the ability to select a part of the multiplication result for storage into a result register N-bits wide. A first embodiment of the invention allows a sequence of n-bits from the N-bit by N-bit multiply result to be stored into an N-bit wide register. N+1 to 1 multiplexors are utilized to select which of the multiply result bits are stored into the result register in response to a computer instruction. The second preferred embodiment utilizes multiplexors having fewer than N+1 inputs to select discrete subsets of the multiply result bits for storage into the N-bit wide result register. In this manner, less complex multiplexors are required which take less chip area to implement. The third preferred embodiment utilizes multiple sets of multiplexors to select multiple subresults generated by a parallel multiplication operation. The multiple subresults are stored in a single result register.
    Type: Grant
    Filed: September 2, 1994
    Date of Patent: November 26, 1996
    Inventors: Ruby B. Lee, Charles R. Dowdell, Joel D. Lamb
  • Patent number: 5579233
    Abstract: A method of on-site refueling, i.e., delivering petroleum and similar products from a tank truck into customer vehicles or other tanks at a customer's site, that ensures the accurate delivery of products in accordance with the instructions on a series of delivery lists. The method of delivery includes the use of a probe having digital memory and capable of comparing input signals from passive electronic tags with stored data and the use of a truck on-board computer able to read the truck's accumulating gallonage meters, and able to set relay contacts to directly control the refueling of vehicles identified as critical vehicles. Each use of the probe in reading a tag is recorded in the probe stored in its memory, and later downloaded into the on-board computer used to calculate the gallons and identify the product delivered into each customer tank.
    Type: Grant
    Filed: January 9, 1995
    Date of Patent: November 26, 1996
    Inventor: Robert R. Burns
  • Patent number: 5579231
    Abstract: The present invention is to provide an equipment production management system, in which the electronic equipment is designed corresponding to an order from customers, which enables unified preparation from derivation of equipment corresponding to the customer conditions concerning equipment installation design, and construction associated drawing design. The system includes a terminal unit and a central control system, in which is provided a customer base order information file, design data file, a design know-how information file established by making a know-how library on the equipment installation design as input files. The central processing system includes an installation designing section corresponding to installation design for respective stages from overall layout to installation of the elementary parts.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: November 26, 1996
    Assignee: Fujitsu Limited
    Inventors: Kouji Sudou, Masao Shukuya, Katsuo Okuyama, Masao Ishiwata, Hidetoshi Uchibori, Toshinari Matsui, Shigeru Kubo, Michinori Matsubayashi, Kazuhide Toyoda, Eiko Takei, Hidekazu Morihiro, Masayoshi Suzuki, Hideo Ohata
  • Patent number: 5579221
    Abstract: A home automation system having a user controlled definition function is operated in response to input of an inherent call code.
    Type: Grant
    Filed: December 30, 1994
    Date of Patent: November 26, 1996
    Assignee: SamSung Electronics Co., Ltd.
    Inventor: Yong-Soon Mun
  • Patent number: 5576982
    Abstract: Disclosed is a Significant Bit Calculator (SBC) for determining the number of significant bits or nibbles of an operand in one clock period, and for using the result in performing binary arithmetic operations, such as multiplication and division. By determining the exact size of the operand in one clock cycle, the time spent on processing leading zeros is eliminated. The SBC can be implemented with combinational logic circuitry to compute the number of significant bits or nibbles in a single clock cycle regardless of the number of leading zeros and without any firmware or counter. The time saved using the SBC is proportional to the size of the operand.
    Type: Grant
    Filed: October 17, 1994
    Date of Patent: November 19, 1996
    Assignee: Unisys Corporation
    Inventors: Gary C. Wu, Steven H. Leibowitz, Chandra S. Pawar
  • Patent number: 5576947
    Abstract: A vehicle is guided along a hall by obtaining distances between it and the nearest objects along a plurality of directions, fitting straight lines through the distances to define the walls of the hall, determining its distance from the center of the hall and its angular orientation with respect thereto and directing it to a given point on the center or other line with an angular rotation so that it faces along the center line.
    Type: Grant
    Filed: June 30, 1994
    Date of Patent: November 19, 1996
    Assignee: Siemens Corporate Research, Inc.
    Inventor: Uwe Wienkop
  • Patent number: 5577054
    Abstract: An error detector and method for performing error detection on an interleaved signal portion including n successive data bytes made up of information data bytes and at least one error detection data byte, and a receiver and decoding method employing such error detection. The error detector operates to produce a syndrome indicating whether an error is detected in the interleaved signal portion. The syndrome which is generated is the same syndrome which would be generated by a prior art error detector performing error detection on a corresponding de-interleaved signal portion produced by de-interleaving the interleaved signal portion.
    Type: Grant
    Filed: September 13, 1994
    Date of Patent: November 19, 1996
    Assignee: Philips Electronics North America Corporation
    Inventor: Kenton J. Pharris