Patents Examined by S. Jackson
  • Patent number: 5448441
    Abstract: A fault protection circuit for a power switching device. The circuit compes a driver circuit electrically connected to the power switching device, a saturation comparator electrically connected to the collector of the switching device to determine if the switching device is switching an excessive voltage, and two undervoltage comparators to determine if the gate is receiving sufficient voltage. If the gate is oversaturated the saturation comparator enables the gate of a field effect transistor which drains the gate of the switching device, and the saturation comparator also disables the driver circuit. The undervoltage detectors detect insufficient voltage to the driver circuit and disable the driver circuit. Once the driver circuit is disabled the control circuitry can take corrective action.
    Type: Grant
    Filed: April 5, 1994
    Date of Patent: September 5, 1995
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventor: John R. Raposa
  • Patent number: 5444593
    Abstract: Thick-film varistors are made by melting and flame-spraying of precursor particulates onto circuit board substrate material already provided with conductive layers or laminae preferably on both sides. The resulting circuit boards are useful in transient voltage surge suppression (TVSS), such as in a TVSS watt-hour meter adapter.
    Type: Grant
    Filed: September 30, 1993
    Date of Patent: August 22, 1995
    Inventor: Edward F. Allina
  • Patent number: 5440442
    Abstract: An apparatus and method for optimizing power factor in single phase and three phase installations. Capacitor circuits are interruptably connected with busses by means of switches. Leads electrically connected to the busses are attached to the load leads. The correct capacitance to optimize the power factor is determined experimentally by closing the switches, singly and in combination, until the power factor is in the 95-98% range. A power factor meter is used to determine power factor.
    Type: Grant
    Filed: March 1, 1993
    Date of Patent: August 8, 1995
    Inventor: Gregory G. Taylor
  • Patent number: 5436785
    Abstract: An electronic trip device comprising, for each phase or neutral line, a rectifier bridge formed by four diodes which rectify the transformer current, a resistance for measuring the rectified current, and a circuit for detecting the sign or polarity of the measured current connected to one end of the transformer. A processing circuit calculates a value representative of the earth fault current by adding all the current values whose corresponding sign is positive and subtracting all the current values whose corresponding sign is negative. This current value is processed so as to bring about tripping when a threshold is exceeded for a preset time.
    Type: Grant
    Filed: September 24, 1993
    Date of Patent: July 25, 1995
    Assignee: Merlin Gerin
    Inventors: Marc Ferrazzi, Alain Del Vecchio
  • Patent number: 5436784
    Abstract: The motor relay includes thermal models representing the start and run conditions of a motor. The thermal models are implemented using measured current values and certain known operating parameters available from the manufacturer, specifically full load current, locked rotor thermal time and rated service factor. The thermal model information is compared with threshold thermal model values to determine when an overload condition has been reached.
    Type: Grant
    Filed: August 11, 1993
    Date of Patent: July 25, 1995
    Assignee: Schweitzer Engineering Laboratories, Inc.
    Inventors: Edmund O. Schweitzer, III, Stanley E. Zocholl
  • Patent number: 5434740
    Abstract: A power entry module of small size which can be mounted in a minimum size opening and which can also be provided with end or side extenders so that it can be mounted in larger openings. Alternately, a flange may be connected to the unit. A plug in filter unit and/or a plug in interconnection unit and/or a plug in surge suppressor unit can also be connected to the basic unit.
    Type: Grant
    Filed: July 8, 1993
    Date of Patent: July 18, 1995
    Assignee: Corcom, Inc.
    Inventor: Kin F. Chan
  • Patent number: 5434739
    Abstract: A protection circuit (10) for protecting internal circuitry of an integrated circuit (26) from a reverse battery connection has been provided. The protection circuit includes a pass transistor (14) which is rendered operative when the supply voltage is properly connected to the integrated circuit. However, when the power supply is improperly connected, a second transistor (32) becomes active thereby rendering the pass transistor inactive and not allowing the reverse supply voltage to be applied to the internal circuitry.
    Type: Grant
    Filed: June 14, 1993
    Date of Patent: July 18, 1995
    Assignee: Motorola, Inc.
    Inventor: Karl R. Heck
  • Patent number: 5434738
    Abstract: An apparatus and method for protecting an induction motor from momentary power loss in a three-phase, alternating current, power supply. The apparatus includes a circuit for detecting when the motor switches from a mode of operation as a motor to a mode of operation as a generator, and a microprocessor connected to the detector to receive the detection of a switch in mode of operation, and for generating a fault disconnect signal in response thereto to initiate disconnecting the motor from the power source. The method includes the steps of detecting when the motor switches from a mode of operation as a motor to a mode of operation as a generator and generating a fault disconnect signal in response thereto to initiate disconnecting the motor from the power source. The apparatus and method provide for robustness of the fault detection data, and for avoiding false detections of momentary power loss.
    Type: Grant
    Filed: July 12, 1993
    Date of Patent: July 18, 1995
    Assignee: American Standard Inc.
    Inventors: Chad J. Kurszewski, Matthew A. Shepeck, Michael W. Murry
  • Patent number: 5432665
    Abstract: A capacitive load driver is protected from short circuits to supply or to ground. The load driver includes an edge detecting monostable circuit and a plurality of sets of field effect transistor (FET) output devices, one set of the FET output devices having a low drain-to-source resistance and another set having a high drain-to-source resistance. The low resistance FET output devices provide a desired rise time voltage requirement on a capacitive load being driven. The high resistance FET output devices limit power dissipated under a short circuit to a predetermined amount.
    Type: Grant
    Filed: March 5, 1993
    Date of Patent: July 11, 1995
    Assignee: SGS-THOMSON Microelectronics, Inc.
    Inventor: Thomas L. R. Hopkins
  • Patent number: 5432666
    Abstract: A fault current limiter incorporating a high temperature superconductor material. During a fault condition, the superconductor material is allowed to operate above its critical temperature, providing sharply increased resistance. The fault current limiter can be sized and selectively cooled to provide a desired range of fault current limiting capability.
    Type: Grant
    Filed: January 22, 1993
    Date of Patent: July 11, 1995
    Assignee: Illinois Superconductor Corporation
    Inventor: James D. Hodge
  • Patent number: 5432667
    Abstract: A transient voltage surge suppressor (10) is used in a single or poly-phase power distribution network (P). The surge suppressor connects in parallel between each phase (A, B, C) and neutral (N), each phase and electrical ground (G), and between neutral and ground. An improvement comprises an electrical circuit (30) for monitoring the loss of surge protection due to the occurrence of a current surge or voltage transient in a neutral-to-ground path (32). An MOV-type semiconductor (VR1) is connected in the ground-to-neutral path. The semiconductor is normally non-conducting, but switches into conduction when its voltage threshold is exceeded by a surge current or voltage transient. An excessive surge or transient causes the semiconductor to fail. Respective fuses (F1A, F2B) are connected in series with the semiconductor. These fuses clear (blow) upon a semiconductor failure to create an open circuit neutral-to-ground path.
    Type: Grant
    Filed: September 24, 1993
    Date of Patent: July 11, 1995
    Assignee: Emerson Electric Co.
    Inventors: C. Peter Rau, Jeffry M. Bulson
  • Patent number: 5426556
    Abstract: A protection module connected between a main distributing frame and an exchange, for protecting a subscriber circuit from an overvoltage or an overcurrent, comprises an overcurrent protecting device 21 connected between an output of the main distributing frame and a tip line of the exchange; an overcurrent protecting device 211 connected between an output of the main distributing frame and a ring line of the exchange; and an overvoltage protecting device 22 connected in parallel between the tip line and the ring line, having an output (GND) line connected to the exchange.
    Type: Grant
    Filed: April 18, 1994
    Date of Patent: June 20, 1995
    Assignees: Electronics and Telecommunications Research Institute, Korea Telecommunication Authority
    Inventors: Yoon J. Lee, Young H. Im, Hong S. Nam, Sueng H. Lee
  • Patent number: 5426554
    Abstract: In a pilot wire relay electrical power distribution protection system, an audio band interface apparatus acquires a Hz pilot wire signal from the pilot wire relay and produces signals having frequencies within the frequency band pass of fibre optic communication channels. The apparatus enables pilot relays, which previously communicated over hard wire connections such as dedicated telephone lines, to communicate through a fibre optic communication channel without the necessity for extensive modifications to the pilot wire relay.
    Type: Grant
    Filed: March 3, 1993
    Date of Patent: June 20, 1995
    Assignee: Albert Nocentino, Jr.
    Inventors: Albert Nocentino, Jr., James E. Waldron
  • Patent number: 5426555
    Abstract: A surge arrester arrangement comprising includes a surge arrester (4) and a cut-out device (6) arranged in series with the arrester for automatic disconnection of the arrester in the event of arrester failure. The arrester arrangement is intended to be connected in parallel with an insulator (2) arranged for suspension of a power line (1) from a power line tower (3). The surge arrester (4) is connected to the power line (1) via a connecting link (5) in the form of a flexible electric conductor (10) enclosed in a tube of, for example, aluminium, which is divided into several parts, A helical spring (8) which, for example, may be arranged inside the tube, keeps the connecting link at insulation distance from the power line (1) when the arrester has become disconnected by means of the cut-out device (6).
    Type: Grant
    Filed: June 15, 1993
    Date of Patent: June 20, 1995
    Assignee: ASEA Brown Boveri AB
    Inventor: Jan Lundquist
  • Patent number: 5424896
    Abstract: A semiconductor circuit package includes features forming an electrostatic charge distribution network having nodes which are defined by the electrical contact leads of the package for the semiconductor circuit, and which are effectively connected with one another by spark-gaps. In one embodiment electrical leads of the package are provided with pointed protrusions lying in the plane of the electrical leads. Accordingly, an inadvertent electrostatic discharge is distributed throughout the semiconductor circuit at safe voltage levels determined by the characteristics of the spark gaps of the charge distribution network.
    Type: Grant
    Filed: August 12, 1993
    Date of Patent: June 13, 1995
    Assignee: LSI Logic Corporation
    Inventors: Nicholas F. Pasch, William Gascoyne
  • Patent number: 5424897
    Abstract: A voltage driven control die (20) for use with a power device (22) has been provided. The voltage driven control die includes an under voltage lock-out circuit (46) which inhibits drive to the power device until the input voltage exceeds a predetermined threshold voltage. Moreover, the control die includes a noise immunity enhancement circuit (56) for providing an excess reverse bias across an output SCR (58) for preventing false triggering of the output SCR. The control die also includes circuitry (40, 44) for detecting an over temperature or an over current condition within the power device.
    Type: Grant
    Filed: April 5, 1993
    Date of Patent: June 13, 1995
    Assignee: Motorola, Inc.
    Inventors: David F. Mietus, Robert B. Davies
  • Patent number: 5424899
    Abstract: The present invention provides a compact transformer with a magnetic core having at least two leg members and two side members. Each leg member has two ends and a peripheral surface therebetween. Each side member has a generally planar body with at least two notches corresponding in cross-sectional shape and size to the end of each leg member. The sides of each notch surround and abut a majority of the peripheral surface near each leg member end. The leg member end is secured to each notch. A magnetically coupled primary and secondary winding is arranged around each leg member. The transformer is particularly useful in sending current signals to an electronic trip unit of a circuit interrupter.
    Type: Grant
    Filed: October 30, 1992
    Date of Patent: June 13, 1995
    Assignee: Square D Company
    Inventors: Gary W. Scott, Paul J. Rustebakke
  • Patent number: 5422777
    Abstract: An overvoltage protection circuit comprises three protection components (21, 22, 23) connected by their first terminal to a common point (C) and by their second terminal to a first conductor (A), second conductor (B) and ground, respectively. Each protection component comprises the anti-parallel association of a protection component (T1, T2, T3) and a diode (D1, D2, D3), the common point being connected to a same polarity terminal of each protection component. In case one of the conductors exhibits, at the normal state, a polarization difference higher than the other with respect to ground, the cathodes or anodes of the protection components are connected to the common point according as the higher polarized conductor is negative or positive with respect to ground.
    Type: Grant
    Filed: August 23, 1993
    Date of Patent: June 6, 1995
    Assignee: SGS-Thomson Microelectronics, S.A.
    Inventor: Robert Pezzani
  • Patent number: 5418679
    Abstract: A plug presence sensor comprises an LED and a light sensor in the form of a photo-transistor which senses presence of a plug in a receptacle. The sensor is monitored by a microcontroller to control latching of a relay. The microcontroller de-energizes the relay, so that no power is present at the receptacle, when no plug is inserted. When the plug is inserted, then the microcontroller causes the relay to be energized to provide power to the receptacle. The microcontroller is preprogrammed to communicate with a remote master controller. In the event that a loss of communication occurs between the microcontroller and the master controller, the microcontroller automatically de-energizes the relay so that no power is present at the receptacle. A communication error output signal is connected to an override circuit including a capacitor which differentiates an edge of the communication error signal to inject a pulse onto the plug presence sensor signal which simulates removal and reinsertion of the plug.
    Type: Grant
    Filed: April 6, 1993
    Date of Patent: May 23, 1995
    Assignee: Molex Incorporated
    Inventors: Burke J. Crane, Garth S. Jones, Kevin L. Nelson
  • Patent number: 5416661
    Abstract: A semiconductor integrated circuit device is equipped with a built-in power supply voltage conversion circuit which converts an external power supply voltage into an internal, lower voltage and supplies the internal voltage to internal circuits, and a clamping element which is inserted between an external power supply wiring connected to an external power supply pin and at least one of an input pin and an internal power supply wiring serving as an output line of the power supply voltage conversion circuit. As a result of distribution of electric charge to the capacitor formed between the internal power supply wiring and the substrate due to operation of the clamping element caused by the application of an overvoltage, it is possible to obtain an electrostatic withstand voltage comparable to that of a semiconductor integrated circuit device which lacks a built-in power supply voltage conversion circuit.
    Type: Grant
    Filed: February 19, 1993
    Date of Patent: May 16, 1995
    Assignee: NEC Corporation
    Inventor: Hiroshi Furuta