Abstract: The invention relates to a method, a non-transitory computer-readable storage medium and an apparatus for accessing to encoding-history information. The method includes: providing a super-block formed by storage space of flash units, where the super-block includes zones, each zone includes super-page strings, and each super-page string includes pages across the flash units; and programming encoding-history information into a metadata section of a designated first page of a designated super-page string, thereby enabling a damaged page that is occurred in the designated super-page string of the designated zone to be recovered according to the encoding-history information. The encoding-history information includes a history profile and history entries. The history profile indicates which zone or zones are covered in the super-block, and a quantity of the history entries.

Abstract: A data storage device includes a memory device and a controller coupled to the memory device. The controller is configured to segment a key to physical (K2P) table into two or more segments, wherein each segment of the two or more segments corresponds to a caching priority of key value (KV) pair data, organize the K2P table by storing and relocating one or more K2P table entries into a respective segment of the two or more segments, wherein the storing and relocating comprises moving a K2P table entry based on the caching priority of the KV pair data into the respective segment having the caching priority, and utilize the K2P table to manage KV pair data stored in the memory device, wherein utilizing the K2P table comprises applying a same management operation, such as prefetching, to each K2P table entry of a same segment.

Abstract: Methods that may be performed by a host controller of a computing device for synchronizing logical-to-physical (L2P) tables before entering a hibernate mode are disclosed. Embodiment methods may include determining whether a first L2P table stored in a dynamic random-access memory (DRAM) communicatively connected to the host controller is out of synchronization with a second L2P table stored in a static random-access memory (SRAM) of a universal flash storage (UFS) device communicatively connected to the host controller via a link. If the first and second L2P tables are out of synch, the host controller may retrieve at least one modified L2P map entry from the second L2P table when the UFS device is configured to enter a hibernate mode from the UFS device, and update the first L2P tabled with the at least one modified L2P map entry before the link and the UFS device enter the hibernate mode.

Abstract: Disclosed herein a disaggregation computing system. The disaggregation computing system comprising: a local computing device that comprises a local processor, a local memory bus, a local memory and a local disaggregation controller; a remote computing device that comprises a remote processor, a remote memory bus, a remote memory and a remote disaggregation controller; and a disaggregation network that connects the local computing device and the remote computing device, wherein the local disaggregation controller and the remote disaggregation controller are configured to: check a response delay for access of the remote memory, and control the access of the remote memory based on the response delay.

Abstract: A memory system may include: a nonvolatile memory device; and a controller suitable for generating first map information which maps physical addresses of the nonvolatile memory device to logical addresses received from a host, selecting some segments of the first map information as second map information, and outputting the second map information to the host, the controller may determine whether the second map information is updated, and may determine updated map segments as third map information, and the controller may output information to the host indicating the third map information corresponding to a command received from the host.

Abstract: A data management method causes a computer to execute processing including: creating, when a predetermined data processing program performs data processing, based on an access frequency to a data store, high-frequency state item list information obtained by listing high-frequency state items of which the access frequency is high; determining, when state information that includes a value of the high-frequency state item is written to the data store, whether or not the state information corresponds to the high-frequency state item with reference to the high-frequency state item list information; grouping and writing pieces of the state information of a plurality of the high-frequency state item.

Abstract: A system includes a memory controller and a memory device having a command interface, refresh circuitry, control logic, and a plurality of memory banks, each with a plurality of rows of memory cells. The command interface is operable to receive a refresh command from a memory controller and the refresh circuitry is configured to perform one or more refresh operations to refresh data stored in at least one bank of the plurality of memory banks during a refresh time interval in response to the refresh command from the memory controller. The control logic is to configure the command interface to enter a calibration mode during the refresh time interval, and the command interface is configured to perform a calibration operation in the calibration mode during the refresh time interval.

Abstract: A method includes receiving, at a controller of a computational storage (CS) device, a request to allocate computational storage to an application of a host device. The request includes a resource set ID associated with the application. The method further includes identifying a memory range within a memory region of the CS device. The method further includes storing, in a data structure associated with the resource set ID, an association between a memory range identifier (ID) of the memory range, the memory region, and an offset within the memory region. The method further includes sending the memory range ID to the host device.

Abstract: A method includes memory fencing in memory components of a memory sub-system and receiving a first number of commands and a second number of command for execution on a memory sub-system, receiving a memory fencing command associated with the first number of commands and the second number of commands, and executing at least one of the first number of commands before executing at least one of the second number of commands in response to receiving the memory fencing command. The method further includes executing the at least one of the first number of commands by moving data from a first location in the memory subsystem to a second location in the memory sub-system and executing the at least one of the second number of commands by reading data from the second location in the memory sub-system and sending the data to a host system.

Abstract: A computer system includes physical memory devices of different types that store randomly-accessible data in a main memory of the computer system. In one approach, an operating system allocates memory from a namespace for use by an application. The namespace is a logical reference to physical memory devices in which physical addresses are defined. The namespace is bound to a memory type. In response to binding the namespace to the memory type, the operating system adjusts a page table to map a logical memory address in the namespace to a memory device of the memory type.

Abstract: The present disclosure relates to a method for classifying instructions according to the number of operands required for processing-in-memory instruction processing, and a computing device applying same. Efficient instruction processing in a processing-in-memory may include identifying the number of operands required when processing an instruction queuing to be processed, interpreting the instruction queuing to be processed and processing an instruction corresponding to the identified number of required operands. When the number of required operands is 0, the instruction interpretation may interpret the instruction queuing to be processed as a WRITE instruction, and the instruction processing may execute memory writing. When the number of required operands is not 0, the instruction processing may execute memory reading in an internal memory of the processing-in-memory by the same number of times as the number of operands required in the instruction interpreted in the instruction interpretation.

Abstract: Dynamically selecting a protection duration for locking objects in a storage. A garbage collection deletes objects over time. The objects may not be removed from storage until associated locks have expired. The length of the lock may impact the cost. A new lock extension value is selected each time a lock extension operation is performed. The lock extension value selection process accounts for a garbage collection operation cycle, an amount of deleted objects that are stored because of being locked, and a garbage collection churn. This allows an optimum lock extension value to be selected dynamically and repeatedly to control costs automatically.

Abstract: A method for performing automatic setting control of a memory device in predetermined communications architecture with aid of auxiliary setting management and associated apparatus are provided.

Abstract: The disclosed embodiments are related to securely updating a semiconductor device. In one embodiment, a method comprises receiving a command; generating, by the semiconductor device, a response code in response to the command; returning the response code to a processing device; receiving a command to replace a storage root key of the device; generating a replacement key based on the response code; and replacing an existing key with the replacement key.

Abstract: Integrated circuits that perform offset-based memory management using offset values for allocated, de-allocated, and free memory portions. An example method includes receiving a first request for allocating a first portion of a memory module coupled to an integrated circuit, and determining a first address space for allocating the first portion of the memory module based on one or more offset values.

Abstract: Systems, methods, and computer readable storage mediums for discovering volumes which are good candidates for space reclamation. A storage subsystem identifies the file system storage capacity for a given volume from the file system metadata of the given volume. Then, the storage subsystem compares the file system capacity of the given volume to the allocated capacity on the storage subsystem. If the allocated capacity is greater than the file system capacity by a given threshold, the storage subsystem marks the given volume as a candidate for space reclamation and generates an alert to the user to reclaim the space of the given volume.

Abstract: A method is provided to control a content addressable memory that includes multiple integrated circuit memory devices that include common memory address locations and that are coupled for simultaneous access to the common memory address locations, the method comprising; determining a hash value, based upon a received key value, that corresponds to a common memory address location of the multiple memory devices; providing activity status information for multiple common memory address locations of the memory devices; selecting a memory devices from which to output stored content data from the corresponding common memory address location, based upon storage activity status information; and causing the selected one or more memory devices to output stored content data.

Abstract: A data management device selects acquisition data of a deletion target from a storage device storing multiple acquisition data acquired by a board work machine performing a predetermined board work on a board. The data management device includes an acquisition section and a selection section. The acquisition section divides an evaluation index when evaluating a target object extracted from the acquisition data or the board work using the target object into multiple classes and acquires frequency-related information obtained by calculating a frequency of the acquisition data belonging to each of the classes for the multiple acquisition data of the same type stored in the storage device. The selection section selects the acquisition data having a higher frequency as the acquisition data of the deletion target by using the frequency-related information acquired by the acquisition section.

Abstract: Systems and methods for managing host virtual addresses in a system call are disclosed. In one implementation, a processing device may receive, by a supervisor managing a first application), a system call initiated by the first application, wherein a first parameter of the system call specifies a memory buffer virtual address of the first application and a second parameter of the system call specifies the memory buffer virtual address of the second application. The processing device may also translate the memory buffer virtual address of the first application to a first physical address and may translate the memory buffer virtual address of the second application to a second physical address. The processing device may further compare the first physical address to the second physical address and responsive to determining that the first physical address matches the second physical address, the processing device may execute the system call using the memory buffer virtual address of the second application.

Abstract: A processing device in a memory sub-system maintains a mapping data structure to track data movements from a plurality of data management units associated with a media management operation on a memory device. The processing device further uses a first indicator and a second indicator of a plurality of indicators to indicate which data of data management units of a source group of data management units have been copied to a destination group of data management units during the media management operation. Data located in data management units preceding the first indicator have been copied to data management units of the destination group of data management units. Data located in data management units associated with the first indicator and the second indicator or between the first indicator and the second indicator are either copied to data management units of the destination group of data management units or remain located in data management units of the source group of data management units.