Abstract: A display device is provided. The display device includes a substrate including a display area, an opening area disposed in the display area, a first non-display area at least partially surrounding the display area, and a second non-display area at least partially surrounding the opening area. A display layer is disposed in the display area. An encapsulating substrate covers the display layer and has an opening corresponding to the opening area. A sealing portion is disposed between the encapsulating substrate and the substrate. The sealing portion is disposed in the opening area and connects the encapsulating substrate to the substrate. A partition wall is disposed between the substrate and the sealing portion.

Abstract: Embodiments described herein relate to sub-pixel circuits and methods of forming sub-pixel circuits that may be utilized in a display such as an organic light-emitting diode (OLED) display. The device includes a plurality of sub-pixels, each sub-pixel of the plurality of sub-pixels defined by adjacent pixel-defining layer (PDL) structures with inorganic overhang structures disposed on the PDL structures, each sub-pixel having an anode, organic light-emitting diode (OLED) material disposed on the anode, and a cathode disposed on the OLED material. The device is made by a process including the steps of: depositing the OLED material and the cathode by evaporation deposition, and depositing an encapsulation layer disposed over the cathode.

Abstract: Disclosed is a method of fabricating a display device. The method comprises forming a dielectric layer on an encapsulation layer including a first encapsulation region and a second encapsulation region adjacent to the first encapsulation region, forming a conductive layer on the dielectric layer, forming a first photoresist layer on the conductive layer that overlaps each of the first and second encapsulation regions, forming a second photoresist layer on the first photoresist layer that overlaps the second encapsulation region, and etching the conductive layer based on the first and second photoresist layers. When viewed in a thickness direction of a display panel including the encapsulation layer, at least a portion of the encapsulation layer overlapping the second encapsulation region has a thickness greater than that of the encapsulation layer overlapping the first encapsulation region.

Abstract: A display panel is provided, the display panel including: a substrate including: a front display area; a first side display area; a second side display area; a corner display area between the first side display area and the second side display area; and an intermediate display area between the front display area and the corner display area; an intermediate display element including a pixel electrode in the intermediate display area; a lower layer between the substrate and the pixel electrode, the lower layer including a groove; and a dam portion on the lower layer and extending to define a boundary between the intermediate display area and the corner display area, wherein the groove includes a first groove and a second groove, the first groove extending in parallel with the dam portion, and the second groove extending in a direction crossing a direction in which the dam portion.

Abstract: The present invention provides a semiconductor structure for forming a CMOS image sensor. The semiconductor structure includes at least a photodiode formed in the substrate for collecting photoelectrons, and the photodiode has a pinning layer, a first doped region and a second doped region in order from top to bottom in a height direction of the substrate. The semiconductor structure further includes a third doped region located in the substrate corresponding to a laterally extending region of the second doped region. The first doped region has an ion doping concentration greater than the ion doping concentration of the second doped region, the ion doping concentration of the second doped region is greater than the ion doping concentration of the third doped region, and the third doped region is in contact with the second doped region after diffusion. The present invention also provides a method of manufacturing the above-described semiconductor structure.

Abstract: Embodiments described herein relate to a device comprising a substrate, a pixel-defining layer (PDL) structures disposed over the substrate and defining sub-pixels of the device, and a plurality overhang structures. Each overhang structure is defined by a top structure extending laterally past a body structure. Each body structure is disposed over an upper surface of each PDL structure. Overhang structures define a plurality of sub-pixels including a first sub-pixel and a second sub-pixel. Each sub-pixel includes an anode, an organic light-emitting diode (OLED) material, a cathode, and an encapsulation layer. The OLED materials are disposed over the first anode and extends under the overhang structures. The cathodes are disposed over the OLED materials and under the overhang structures. The encapsulation layers are disposed over the first cathode. The first encapsulation layer has a first thickness and the second encapsulation layer has a second thickness different from the first thickness.

Abstract: An electroluminescent display device is disclosed. The electroluminescent display device includes a substrate having thereon a first sub pixel and a second sub pixel, a first electrode in each of the first sub pixel and the second sub pixel on the substrate, an organic layer with P-type polarity or N-type polarity on the first electrode, and a second electrode on the organic layer. The organic layer provided in the first sub pixel and the organic layer provided in the second sub pixel are spaced apart from each other with a doping layer provided in the boundary area between the first sub pixel and the second sub pixel. The doping layer is doped with dopant whose polarity is opposite to that of the organic layer.

Abstract: A display device includes a transmission area in a display area and includes a groove in a non-display area surrounding the transmission area and may minimize the occurrence of defective pixels because a groove forming process includes a process of forming a protection layer covering an emission area before formation of a mask layer and a process of removing the protection layer after removal of the mask layer.

Abstract: Embodiments described herein relate to sub-pixel circuits and methods of forming sub-pixel circuits that may be utilized in a display such as an organic light-emitting diode (OLED) display. The sub-pixel circuit includes a plurality of contact overhangs. The plurality of contact overhangs are disposed between adjacent sub-pixels of a sub-pixel circuit to be formed. The contact overhangs are formed over a metal grid exposed through a PDL structure. A cathode is deposited via evaporation deposition to be in contact with the contact overhang. The metal grid is perpendicular to a plurality of metal layers disposed on the substrate.

Abstract: Embodiments described herein relate to a device including a substrate, a plurality of adjacent pixel-defining layer (PDL) structures disposed over the substrate, and a plurality of sub-pixels. Each sub-pixel includes adjacent first overhangs, adjacent second overhangs, an anode, a hole injection layer (HIL) material, an additional organic light emitting diode (OLED) material, and a cathode. Each first overhang is defined by a body structure disposed over and extending laterally past a base structure disposed over the PDL structure. Each second overhang is defined by a top structure disposed over and extending laterally past the body structure. The HIL material is disposed over and in contact with the anode and disposed under the adjacent first overhangs. The additional OLED material is disposed over the HIL material and extends under the first overhang.

Abstract: A semiconductor device includes: an FET structure that is formed next to a looped trench on a semiconductor substrate and that has an n+ emitter region and an n? drain region facing each other in the depth direction of the looped trench across a p-type base region; a p-type floating region formed on the side of the looped trench opposite to the FET structure; and an emitter connecting part that is electrically connected to the n+ emitter region and a trench gate provided in the same trench, the emitter connecting part and the trench gate being insulated from each other by the looped trench. The trench gate faces the FET structure, and the emitter connecting part faces the p-type floating region, across an insulating film.

Abstract: An object of the present disclosure is to provide a semiconductor device capable of confirming withstand voltage of a snubber circuit after providing the snubber circuit and a method of manufacturing the semiconductor device. A semiconductor device according to the present disclosure includes: an insulating substrate; a circuit patterns provided on the insulating substrate; a snubber circuit substrate provided on the insulating substrate separately from the circuit patterns; a resistance provided on one of the circuit patterns and the snubber circuit substrate; a capacitor provided on another one of the circuit patterns and the snubber circuit substrate; and at least one semiconductor element electrically connected to the resistance and the capacitor.

Abstract: Embodiments described herein relate to sub-pixel circuits and methods of forming sub-pixel circuits that may be utilized in a display such as an organic light-emitting diode (OLED) display. The device includes a plurality of sub-pixels, each sub-pixel of the plurality of sub-pixels defined by adjacent pixel-defining layer (PDL) structures with inorganic overhang structures disposed on the PDL structures, each sub-pixel having an anode, organic light-emitting diode (OLED) material disposed on the anode, and a cathode disposed on the OLED material. The device is made by a process including the steps of: depositing the OLED material and the cathode by evaporation deposition, and depositing an encapsulation layer disposed over the cathode.

Abstract: An improved heterostructure for an optoelectronic device is provided. The heterostructure includes an active region, an electron blocking layer, and a p-type contact layer. The heterostructure can include a p-type interlayer located between the electron blocking layer and the p-type contact layer. In an embodiment, the electron blocking layer can have a region of graded transition. The p-type interlayer can also include a region of graded transition.

Abstract: Embodiments of 3D memory devices and methods for forming the same are disclosed. In an example, a 3D memory device includes a substrate, a memory stack, and a NAND memory string. The memory stack includes a plurality of interleaved gate conductive layers and gate-to-gate dielectric layers above the substrate. Each of the gate-to-gate dielectric layers includes a silicon nitride layer. The NAND memory string extends vertically through the interleaved gate conductive layers and gate-to-gate dielectric layers of the memory stack.

Abstract: A method includes forming a semiconductor fin extending a first height above a substrate, forming a dummy dielectric material over the semiconductor fin and over the substrate, forming a dummy gate material over the dummy dielectric material, the dummy gate material extending a second height above the substrate, etching the dummy gate material using multiple etching processes to form a dummy gate stack, wherein each etching process of the multiple etching processes is a different etching process, wherein the dummy gate stack has a first width at the first height, and wherein the dummy gate stack has a second width at the second height that is different from the first width.

Abstract: A device comprising a light emitting diode (LED) substrate, and a meta-molecule wavelength converting layer positioned within an emitted light path from the LED substrate, the a meta-molecule wavelength converting layer including a plurality of nanoparticles, the plurality of nanoparticles configured to increase a light path length in the wavelength converting layer.

Abstract: The disclosure discloses a display panel, a preparation method thereof and a display device. The display panel includes: a base substrate, a plurality of light emitting devices located on the base substrate, and a film packaging structure located on a side, away from the base substrate, of the light emitting devices, wherein the film packaging structure includes a first inorganic packaging film on the side, away from the base substrate, of the light emitting devices, a second inorganic packaging film on the side, away from the light emitting devices, of the first inorganic packaging film, and an organic packaging film between the first inorganic packaging film and the second inorganic packaging film; and the first inorganic packaging film is provided with convex structures at gaps among the light emitting devices, and the organic packaging film is disconnected at the convex structures.

Abstract: An organic light-emitting display apparatus includes: a pixel electrode, an intermediate layer on the pixel electrode and including an emission layer, an opposite electrode on the pixel electrode such that the intermediate layer is therebetween, an inorganic encapsulation layer on the opposite electrode, an organic encapsulation layer on the inorganic encapsulation layer, and a protection layer on the organic encapsulation layer and including a first protection layer including silicon nitride and a second protection layer including silicon oxynitride.

Abstract: A display device including: a plurality of unit portions repeatedly arranged in a first direction and a second direction, wherein the second direction is different from the first direction; a plurality of display units respectively arranged above the plurality of unit portions; and a plurality of encapsulation layers respectively encapsulating the plurality of display units, wherein each of the plurality of unit portions includes an island where a display unit and an encapsulation layer are located, and at least one connection unit connected to the island, and islands of two unit portions adjacent to each other are spaced apart from each other, and connection units of the two unit portions adjacent to each other are connected to each other.