Abstract: An electronic device (1, and 1A to 1E) according to the present disclosure include a substrate (10, and 10F) made of a ceramic and a housing part (21) including a recessed portion (210) accommodating the substrate. The recessed portion includes a plurality of side wall portions (211) arranged around the substrate along a circumferential direction and respectively facing a plurality of sides (111) of the substrate in a plan view when viewing the substrate from a direction perpendicular to a circuit forming surface (110) of the substrate, and a plurality of gaps (212) each located between two of the plurality of side wall portions adjacent to each other in the circumferential direction. The substrate includes a plurality of corner portions (112) curved toward an inner side of the circuit forming surface in a plan view.

Abstract: A power electronic arrangement has a plurality of single-phase power semiconductor modules and one multi-phase power semiconductor module, wherein each single-phase power semiconductor module has a first, at least frame-like housing, two first DC voltage terminal elements, a first AC voltage terminal element, first auxiliary terminal elements and a first switching device. The multi-phase power semiconductor module has a second, at least frame-like housing, two second DC voltage terminal elements, at least two second AC voltage terminal elements, second auxiliary terminal elements and a second switching device. The first and second DC voltage terminal elements each form a stack in a section of their length and on the terminal sections are designed identically. All the power semiconductor modules are arranged in a row in the direction of the normal vectors of the respective first longitudinal side.

Abstract: Layout techniques for chip packages on printed circuit boards are disclosed that address the multivariate problem of minimizing routing distances for high-speed I/O pins between chip packages while simultaneously providing for the rapid provision of transient power demands to the chip packages. The layout techniques may also enable improved thermal management for the chip packages.

Abstract: A composite insulator includes an insulating elongated core, a protective layer surrounding the elongated core, the protective layer including an outer surface with a shed profile and an adhesive primer layer disposed between the elongated core and the protective layer for adhering the protective layer to the elongated core, the adhesive primer layer including a coupling agent and particles of a low resistivity material. The method for producing a composite insulator includes preparing a first solution including a solvent, a coupling agent and particles of a low resistivity material, applying the first solution on at least a part of an envelope surface of an insulating elongated core and thus forming one or more first adhesive primer layers and applying a protective layer onto the first adhesive primer layer on the elongated core, wherein the protective layer includes an outer surface with a shed profile.

Abstract: A packaged electronic device includes a multilayer lead frame with first and second trace levels, a via level, an insulator, a conductive landing pad and a conductive crack arrest structure, the conductive landing pad has a straight profile that extends along a first direction along a side of the multilayer lead frame, the conductive crack arrest structure has a straight profile along the first direction and the conductive crack arrest structure is spaced from the conductive landing pad along an orthogonal second direction.

Abstract: This application relates to a printed circuit board, including: a plurality of bonding pad areas configured to be electrically connected to a display; a plurality of dummy pad areas located in the plurality of bonding pad areas and configured to be connected to the ground; and a contact pad area existing between the plurality of dummy pad areas and electrically connected to the bonding pad area. The contact pad area includes a plurality of contact pads configured to be electrically connected to an external input connector. A width of the plurality of contact pads is 0.3 mm, and a distance between the plurality of contact pads is 0.2 mm. A length of the contact pad is the same as a length of a bonding pad in the bonding pad area.

Abstract: A printed circuit board includes: a conductor plate below the inner dielectric layer; some vias through the inner dielectric layer, bonded to the conductor plate, centered at respective points on an upper surface of the conductor plate; a ground conductor above the inner dielectric layer, bonded to the vias, extending outwardly from any quadrangle with vertices being the nearest four points of the points; an electromagnetic resonance plate above the inner dielectric layer and inside the quadrangle, electrically connected to the ground conductor and the vias with a portion other than a protruding outer edge serving as a junction; an upper dielectric layer above the electromagnetic resonance plate; and a differential transmission line pair composed of a pair of strip conductors overlapping with the electromagnetic resonance plate, above the upper dielectric layer. The conductor plate and the vias constitute an electromagnetic field confinement structure.

Abstract: An electronic circuit assembly includes an interposer substrate, a wiring substrate, an electrical connective part and an electronic component. The interposer substrate with a first coefficient of thermal expansion (CTE) includes a first surface, a second surface opposite to the first surface, and a first side surface connecting to the first surface and the second surface. The wiring substrate with a second CTE is disposed below the second surface. The first CTE is lower than the second CTE. The electrical connective part is disposed in the interposer substrate and extends to the first side surface. The electronic component is attached to the first side surface and is electrically connected to the electrical connective part.

Abstract: A wiring board includes an insulating substrate including a first surface and a mounting portion for an electronic component on the first surface, the insulating substrate having a rectangular shape in a plan view of the first surface; a via conductor located inside the insulating substrate and at a corner portion of the insulating substrate in a plane perspective, and extending in a thickness direction of the insulating substrate; a wiring conductor located on the first surface and connecting the mounting portion and the via conductor to each other; and a heat dissipation portion located inside the insulating substrate at a position overlapping the mounting portion in a plane perspective view, wherein the first surface includes, between the heat dissipation portion and the via conductor in a plane perspective view, a first region surrounded by the wiring conductor in a plan view.

Abstract: A flexible cable jumper structure and manufacturing method thereof. The flexible cable jumper device of the present disclosure includes a cover layer, a first metal layer stacked on the cover layer and having a circuit pattern formed thereon, a first dielectric layer stacked on the first metal layer, a first adhesive layer applied on the first dielectric layer, a second metal layer stacked on the first dielectric layer to which the first adhesive layer is applied and having a circuit pattern formed thereon, a heat-resistant layer stacked on the second metal layer, and a terminal layer formed in one region of the heat-resistant layer and electrically connected to the first metal layer and the second metal layer.

Abstract: An improved memory module structure includes a printed circuit board, memory units disposed on the printed circuit board, and a connection interface disposed on the printed circuit board for connection with an electronic device. The printed circuit board includes a solder pad zone having solder pads electrically connected with the memory units and the connection interface. A conduction element is combined with the solder pad zone or at least one conductor line electrically connected, in the form of bridge connection, the solder pads, in order to have the solder pads electrically connected. A memory module modification method is also provided, including removing a register from an existing dual inline memory module to expose a solder pad zone, and disposing of a conduction element or arranging a conductor line to have the memory units and the connection interface of electrically connected to thereby form an improved memory module structure.

Abstract: A power supply device (104-1) includes a substrate (20) on which an electric component (25) is mounted, a chassis (10) having a chassis surface (11) and a threaded part (10a), a chassis-side resin part (91) connected to a back surface (20a) and the chassis surface (11), a fixation screw (29), and an insulating member (60). The fixation screw (29) fixes both the electric component (25) and the substrate (20) to the chassis (10) by screw-coupling an end part (29c) of the fixation screw (29), exposed in a direction toward the chassis (10) from an open hole formed through the insulating member (60), to the threaded part (10a) of the chassis (10). In addition, the fixation screw (29) brings the electric component (25) and the chassis (10) into electrical noncontact with each other by being placed in an open hole of the insulating member (60).

Abstract: Described herein are apparatuses and methods for applying high voltage, sub-microsecond (e.g., nanosecond range) pulsed output to a biological material, e.g., tissues, cells, etc., using a high voltage (e.g., MOSFET) gate driver circuit having a high voltage isolation and a low inductance. In particular, described herein are multi-core pulse transformers comprising independent transformer cores arranged in parallel on opposite sides of a substrate. The transformer cores may have coaxial primary and secondary windings. Also describe are pulse generators including multi-core pulse transformers arranged in parallel (e.g., on opposite sides of a PCB) to reduce MOSFET driver gate inductance.

Abstract: Embodiments of the present disclosure relate to a sealing arrangement of a bushing for a power electrical device and a bushing comprising the sealing arrangement. The sealing arrangement includes a top cover; a central conductor going through the top cover; a guide element having a cylinder portion and a flange portion extended from a middle part of the cylinder portion, wherein the cylinder portion is arranged between the top cover and the central conductor, and the flange portion is connected onto the top cover; a static sealing structure provided between the guide element and the top cover; and a dynamic sealing structure provided between the guide element and the central conductor. With the new sealing structure design, it could provide a good sealing performance so that the bushing can be used in various environments.

Abstract: An electronic device and methods for fabricating the same are disclosed herein that utilize a dam formed on a printed circuit board (PCB) that is positioned to substantially prevent edge bond material, utilized to secure a chip package to the PCB, from interfacing with the solder balls transmitting signals between the PCB and chip package.

Abstract: A method of manufacturing a glass article comprises: (A) forming a first layer of catalyst metal on a glass substrate; (B) heating the glass substrate; (C) forming a second layer of an alloy of a first metal and a second metal on the first layer; (D) heating the glass substrate, thereby forming a glass article comprising: (i) the glass substrate; (ii) an oxide of the first metal covalently bonded thereto; and (iii) a metallic region bonded to the oxide, the metallic region comprising the catalyst, first, and second metals. In embodiments, the method further comprises (E) forming a third layer of a primary metal on the metallic region; and (F) heating the glass article thereby forming the glass article comprising: (i) the oxide of the first metal covalently bonded the glass substrate; and (ii) a new metallic region bonded to the oxide comprising the catalyst, first, second, and primary metals.

Abstract: A coil component includes: a core part including: a winding shaft; and a flange part provided on an axial-direction end of the winding shaft, which has an exterior face on the opposite side of the winding shaft, first and second side faces, and first and second groove parts provided on the exterior face and having a cut-out part on each the first and second side faces; a coil part including: a winding part of a conductor wound around the winding shaft; and two lead parts of the conductor led out from the winding part; and two terminal parts formed on the exterior face of the flange part; wherein the two lead parts are led in from the cut-out parts on the first and second side faces and fitted inside the groove parts, respectively, on the exterior face, and included in the pair of terminal parts, respectively.

Abstract: An icosahedral LED display screen belongs to the field of display screens and includes multiple cabinet main frames. Each cabinet main frame is formed with an accommodating cavity. A side of each cabinet main frame is provided with a flexible PCB, an outer side of the flexible PCB is disposed with LEDs, and an inner side of the flexible PCB is provided with a magnet fixedly therewith. The multiple e.g., twenty cabinet main frames are mutually connected to form an icosahedral sphere which has no end point similar to a football, and polygons that make up the sphere are the same, and therefore the cabinet main frames can be completely covered by the flexible PCBs to eliminate a missing of display at an endpoint and reduce design numbers and complexities of the cabinet main frames and the flexible PCBs. An installation of the LED display screen becomes more convenient.

Abstract: A power semiconductor package comprises a lead frame, a semiconductor chip, and a molding encapsulation. The lead frame comprises an elevated section comprising a source section; a drain section; and a plurality of leads. The semiconductor chip includes a metal-oxide-semiconductor field-effect transistor (MOSFET) disposed over the lead frame. The semiconductor chip comprises a source electrode, a drain electrode, and a gate electrode. The source electrode of the semiconductor chip is electrically and mechanically connected to the source section of the elevated section of the lead frame. The semiconductor chip is served as a low side field-effect transistor as a flipped-chip connected to a heat sink by a first thermal interface material. A high side field-effect transistor is connected to the heat sink by a second thermal interface material. The low side field-effect transistor and the high side field-effect transistor are mounted on a printed circuit board.

Abstract: A microphone includes a base, at least one sound receiving element, and a flexible circuit board. The base has a plurality of supporting portions, a plurality of damping portions, and a bearing portion. The plurality of supporting portions are spaced apart from each other. Each of the plurality of damping portions is disposed on an inner surface of the corresponding supporting portion. The bearing portion is connected to the plurality of damping portions and is suspended between the plurality of supporting portions. The at least one sound receiving element is disposed on the base. The flexible circuit board is disposed on the base and has a first transmission segment. The first transmission segment is electrically coupled to the at least one sound receiving element, and the first transmission segment has a plurality of bending sections.