Abstract: The present disclosure provides a bidirectional hybrid power converter that may include an input circuit consisting of an input power supply and input capacitor, a plurality of switches connected to each other, to input power supply to a set of passive electronic components, to ground and to an output circuit comprising one or more output terminals, each consisting of an output capacitance. The plurality of switches is connected directly or through passive electronic components in an arrangement to obtain a plurality of power converter networks for battery charging as well as other applications by reuse of a set of plurality of switches. The input power supply and the output load are referred to based on the direction of the power conversion flow, forward or reverse. The first terminal can be connected to both a power source as an input and load as an output.

Abstract: A one-shot inductor current scheme which includes a controller to generate a signal to control a high-side switch and a low-side switch such that the high-side switch remains turned on beyond a turn-on time if a voltage level on an output supply rail remains below a reference. The scheme reduces the minimum operating voltage Vmin and/or frequency guard-band of the SoCs (system-on-chips).

Abstract: An integrated circuit breaker includes a solid state switching module (SSWM) configured to receive and switchable control a line power (LP) for a given phase, and output a first switched power (SP) to a load. A first sensor (LPS) senses LP currents. A second sensor (SPS) senses SP currents. A power module controls operating states of the SSWM based upon LPS and SPS reading(s). The LPS and/or the SPS may also sense temperatures. The power module includes a high voltage domain, isolated from a low voltage domain, that includes a gate driver coupled to the SSWM and a high voltage controller providing drive signals to the gate driver. The low voltage domain includes an LP monitor and an SP monitor that detects anomalous LP and/or SP conditions and communicates error signals to the high voltage domain and to users for reporting, diagnostic, and/or other purposes via an external communications module.

Abstract: A system may include a pre-charge stage and a voltage converter. The pre-charge stage may include a controller circuit configured to generate a control voltage and a current regulator electrically coupled to the controller circuit and configured to generate a first voltage, a second voltage, and a third voltage. The voltage converter may include a capacitor, a hold capacitor, and switches. The capacitor may include a first plate and a voltage on the first plate may be equal to the first voltage. The capacitor may include a second plate and a voltage on the second plate may be equal to the second voltage. The hold capacitor may include a plate and a voltage on the plate may be equal to the third voltage. The current regulator may be configured to regulate a current on the switches during accumulation of an initial charge on the capacitor and the hold capacitor.

Abstract: An active compensation circuit for compensating the stability of a regulator is provided. The active compensation circuit presents an equivalent capacitance and an equivalent resistance and compensates stability of system using the equivalent capacitance and the equivalent resistance. The regulator includes a power transistor that receives a driving signal and channelize the required current to the Ips driven by this block. The regulator's stability is compensated using the active compensation circuit to provide an accurate output voltage without significantly compromising the accuracy (load regulation) and area of the system.

Abstract: Regulator circuitry includes first to third output transistors, a first control transistor and a circuit stage. The first and second output transistors, and the first control transistor have a first channel conductivity type. The second output transistor has a second channel conductivity type. The first and second output transistors have a drain coupled to an output node and a source coupled to a first power supply line. The third output transistor has a drain coupled to the output node and a source coupled to a second power supply line. The circuit stage is configured to drive the gates of the first output transistor, the third output transistor, and the first control transistor based on a specified level of the output voltage.

Abstract: A method for a power system having a string of a plurality of power sources connected across a power device includes connecting a plurality of safe voltage units having safety switches connected respectively across each of the power sources. The method includes sensing a plurality of parameters of the power sources, and monitoring for a signal transmitted from the power device. Each of the safety switches is activated to be OFF responsive to detecting the signal within a predetermined time period. Upon not detecting the signal from the power device within the predetermined time period, a safe mode of operation of the power system is entered in which the voltages of each of the power sources is reduced to a voltage level less than a predetermined voltage level by turning the safety switches ON.

Abstract: A method for fault location and isolation in a power distribution network, where the network includes a plurality of switching devices provided along a feeder, and at least one of the switching devices does not have voltage sensing capabilities. The method includes detecting an overcurrent event in the network from the fault and interrupting the overcurrent event by opening and then immediately locking out or subsequently reclosing and testing the fault. A count value is increased in each switching device that detected the overcurrent event. A message is sent from each of the switching devices that detected the overcurrent event and then detected the loss of voltage upstream to an upstream neighbor switching device. Current measurements in the messages, measured current by the devices and the counts values in the devices determine what devices are opened to isolate the fault.

Abstract: An inverter circuit control method and a device thereof are provided. In the control method, after determining a DC bus voltage and an output leakage current of a target inverter circuit, a modulation harmonic wave to be injected into a SPWM signal is adjusted according to the DC bus voltage or the output leakage current if it is determined according to the DC bus voltage that the target inverter circuit satisfies a preset modulation condition, such that total harmonic distortion of a current of the target inverter circuit is within a preset range. The DC bus voltage and the output leakage current of the target inverter circuit are used as references for adjusting the modulation harmonic wave, ensuring total harmonic distortion of the current of the target inverter circuit to be within a preset range.

Abstract: Various embodiments are directed to a switch circuit comprising: two terminal nodes, comprising an upper node and a lower node; a plurality of switch modules, connected in series between the upper node and the lower node, wherein each of the switch modules comprises a switch, a rectifier, and a capacitor; a connecting circuit, coupled to the switch modules; and a power converter, coupled to the connecting circuit and to a power sink. The switch circuit is configured to limit a voltage or a component of a voltage in the switch circuit, and to recover power from the limiting of the voltage, wherein recovering the power comprises diverting power from the switch modules via the connecting circuit to the power converter, and the power converter outputting the power to the power sink.

Abstract: A voltage regulator and a corresponding method of regulating a voltage are presented. The voltage regulator includes an N-type power switch, an error amplifier, and a switch capacitor circuit. The switch capacitor circuit includes a first capacitor coupled to a network of switches, the switch capacitor circuit has a first port coupled to an output the error amplifier, a second port coupled to an output terminal of the power switch, and a third port coupled to a control terminal of the power switch. The switch capacitor circuit is iteratively operable between a first phase and a second phase. In the first phase the first port is coupled to ground via a path comprising the first capacitor, and in the second phase the second port is coupled to the third port via a path comprising the first capacitor. The voltage regulator may be implemented as a low dropout regulator.

Abstract: A low dropout (LDO) voltage regulator includes a first LDO stage that receives a first supply voltage and is active during a first time interval and a second LDO stage that receives a second supply voltage and is active during a second time interval. An operational amplifier receives a feedback voltage based on the LDO output voltage and provides an amplified feedback signal to the first and second LDO stages. A compensation capacitor is selectively coupled between the operational amplifier and either the first or the second LDO stage. A current limit circuit includes a sense FET coupled to the LDO pass FET, a drain voltage replication circuit coupled between the pass FET and sense FET to provide a sense current is indicative of load current when the pass FET is in a linear region, and a current comparator to compare the sense current to a predetermined current level.

Abstract: Various embodiments are directed to a voltage clamp system comprising: a rectifier; a protected node, a reference node, and one or more internal nodes, coupled to the rectifier; a power converter, coupled to the rectifier via the one or more internal nodes; and one or more output nodes coupled to the power converter and configured to couple to a power sink. The rectifier and the power converter are configured to output power via one or more output nodes coupled to the rectifier, and to limit a component of the voltage between the protected node and the reference node.

Abstract: A voltage regulation circuit includes a node, a voltage regulator, a plurality of load units and a voltage feedback circuit. The node has a node voltage. The voltage regulator is electrically connected to the node. The load units are electrically connected to the voltage regulator via the node. The load units are driven by the node voltage and have at least one load state. The voltage feedback circuit is electrically connected between the voltage regulator and the node. The voltage feedback circuit includes a switch and receives the node voltage and a control signal. The control signal includes the at least one load state. The voltage feedback circuit controls the switch according to the at least one load state of the control signal to output a feedback voltage. The voltage regulator adjusts the node voltage according to the feedback voltage.

Abstract: A voltage regulator is provided. The voltage regulator includes a level shifter, a low-pass filter, and a voltage regulating circuit. The level shifter shifts a voltage value of a reference voltage signal to generate a set voltage signal. The low-pass filter filters the set voltage signal to generate a filtered voltage signal. The voltage regulating circuit outputs an output voltage signal according to the filtered voltage signal and adjusts a voltage value of the filtered voltage signal according to a change of the output voltage signal to stabilize a voltage value of the output voltage signal.

Abstract: A method comprises configuring a power converter to operate as a boost converter, the power converter comprising a low side switch and a high side switch, during a first dead time after turning off the low side switch and before turning on the high side switch, configuring the power converter such that a current of the power converter flows through a high speed diode, and after turning on the high side switch, configuring the power converter such that the current of the power converter flows through a low forward voltage drop diode.

Abstract: Disclosed is a semiconductor integrated circuit for a regulator for forming a low current consumption type DC power supply device. The semiconductor integrated circuit includes an output transistor, a control circuit, an operation control transistor and a soft start circuit. The output transistor is connected between an output terminal and a voltage input terminal to which a DC voltage is input. The control circuit controls the output transistor according to a feedback voltage of an output. The operation control transistor controls an operation state of the control circuit. The soft start circuit gradually changes a voltage applied to a control terminal of the operation control transistor and delays activation of the control circuit at a time of applying a power supply voltage to the voltage input terminal.

Abstract: A flexible growcenter includes a mobile container, a behind-the-meter power input system, a power distribution system, a growcenter control system, a climate control system, a lighting system, and an irrigation system. The growcenter control system modulates power delivery to one or more components of the climate control system, the lighting system, and the irrigation system based on unutilized behind-the-meter power availability or an operational directive. A method of dynamic power delivery to a flexible growcenter using unutilized behind-the-meter power includes monitoring unutilized behind-the-meter power availability, determining when a growcenter ramp-up condition is met, and enabling behind-the-meter power delivery to one or more computing systems when the growcenter ramp-up condition is met.

Abstract: A circuit includes a power supply voltage node having a power supply voltage level, a protection circuit that generates a first signal having first and second logical voltage levels based on the power supply voltage level, and a gate driver. The gate driver includes a first n-type HEMT between the power supply voltage node and a first node, a second n-type HEMT between the first node and a power supply reference node, and a DCFL circuit between the first node and an output terminal. A gate of the first n-type HEMT receives the first signal, a gate of the second n-type HEMT receives a second signal, and the DCFL circuit generates a third signal at the output terminal based on the second signal when the first signal has the first logical voltage level, and as a DC voltage level when the first signal has the second logical voltage level.

Abstract: An embodiment DC switching converter comprises first and second Zeta converters, each comprising an input stage, an output stage, a first switching stage, and a second switching stage. The input stage of each Zeta converter comprises a respective input inductor having a first terminal electrically coupled to the respective first switching stage. The input inductors of the input stages of the first and second Zeta converters are magnetically coupled in such a way that when current enters the terminal of the input inductor of the first Zeta converter that is coupled to the first switch stage of the first Zeta converter, a voltage induced by the coupled current is positive at the terminal of the input inductor of the second Zeta converter that is coupled to the first switching stage of the second Zeta converter.