Abstract: An electronic circuit is described for accurately and rapidly initializing long-time constant amplifiers and the like. More specifically, the circuit is designed to establish quiescent conditions in minimal time and with minimal settling in amplifiers or integrators with internal or external voltage offsets. In performing its initializing function, the circuit utilizes a relatively low resistance network which mirrors the resistive network of the amplifier device and provides a charging path for the integrating capacitor. At the same time, the output of the device is permitted to immediately attain its steady-state voltage amplitude. The present auxiliary network automatically compensates for input offset error, so that quiescent conditions may be established extremely rapidly. Finally, the initialization configuration taught by the invention is characterized by simplicity and a small increase in the component count.

Abstract: An excessive duty cycle and pulse width limiter comprises two constant cunt sources responsive to changes in a control input signal to provide a constant voltage charge and discharge current to a capacitor whose voltage level is sensed by a tripping circuit. The circuit effectively measures duty cycle and is used as a protective limiter, providing output pulse blanking signals to load circuitry.

Abstract: In an integrated silicon circuit a PN junction capacitor is charged to almost the full DC power supply voltage through a resistor and through the base-emitter junction of an output transistor. A constant current source and an input transistor switch are simultaneously turned on to dicharge the capacitor at a constant rate, the output transistor being held off until the capacitor is almost fully discharged. The delay, from the time of turning on the constant current source to the time the output transistor turns on, is substantially independent of severe drops in power supply voltage that may occur during this delay period.

Abstract: The present disclosure refers to a sequential logical electronic circuit for operating the discharge gates of a plurality of controllable semiconductors with the object of regulating outputs of said semiconductors which operate as simple contactors that open and close electric circuits of a plurality of phases. The circuit is used to control the power of resistive and inductive circuits, etc., its application being as wide as there are circuits in which it is required to control the discharge of semiconductor elements such as tiristores, triacs, cuadracs, power transistors, etc.

Abstract: A CMOS power on reset circuit is provided which operates with low power supply voltages and yet uses a minimum amount of DC power. The circuit includes a threshold detector which provides an output when the power supply voltage exceeds the transistor threshold voltage by approximately half a volt. A capacitor is connected to the positive power supply terminal to avoid having a narrow output pulse when the power supply rises at a low rate. An output buffer/inverter can be used to provide a better output pulse and to provide a desired output polarity.

Abstract: A Darlington-connected semiconductor device comprises a pre-stage transistor having multi-emitter electrodes and a rear-stage transistor having multi-base electrodes. The multi-emitter electrodes of the pre-stage transistor are connected to the multi-base electrodes of the rear-stage transistor through a plurality of resistors, respectively.

Abstract: A solid state electronic triggering circuit is provided having a light sensitive circuit for sensing the occurrence of light interruption events, and employing a plurality of integrated circuits interconnected in a monostable switching mode, each to provide an output pulse signal for a predetermined time period determined by an RC charging circuit. An RC time delay circuit is serially connected with the monostable circuits to provide a predetermined time delay between light interruption and the output of a triggering signal from a final stage monostable circuit. An initial monostable circuit is used to register the light interruption event, and the final monostable circuit is used to provide a short duration triggering pulse suitable to trigger an SCR load gate. An additional monostable circuit is employed as an inhibitor circuit imposed on the initial monostable circuit to prevent registration of a light interruption event during any occurrence of power supply interruption.

Abstract: To equalize current flow through a pair of chokes supplying a d-c load from a d-c source, and, if desired, to limit current flow through either a single choke or both to a predetermined maximum value, without using measuring shunts, the voltage drop through the choke itself is being measured by summing circuits, which may form the algebraic sum or difference, respectively, of the voltages across the chokes, the sum or difference signals then being passed through low-pass filters to form signals representative of inductive voltage difference of two chokes, or of the voltage drop through one or both of them, which signals are then applied to respective regulators which, in turn, control the duty cycle of one or two semiconductor switches, respectively connected in series with the respective chokes.

Abstract: There is disclosed an optoelectronic coupling device for transmitting digital signals from an input to an output, which input and output are electrically isolated from each other. An input stage includes an input for receiving digital input signals from an incoming signal line and an output. The input stage is connected to an optoelectronic coupling circuit comprising luminescent diodes and phototransistors arranged adjacent to respective ones of the luminescent diodes. Either the collectors or the emitters of both phototransistors are commonly connected to a first voltage source. The other leads of the phototransistors form outputs of the optoelectronic coupling circuit. An output stage, connected to these outputs, includes an operational amplifier having an output, a non-inverting input and an inverting input. Each of the non-inverting and inverting inputs are connected to one of the outputs of the optoelectronic coupling circuit.

Abstract: An electronic switch has a sensor input responsive to a person's touch. Manual contact is sensed by a CMOS input of a one-shot multivibrator initiating the output which is used to toggle a flip-flop circuit off or on. The flip-flop output is connected to the trigger circuit of a silicon controlled rectifier, which in turn completes a circuit through a load. The switch may be a single pole, single throw switch, or if flip-flops are connected together in cascaded arrangement, a three position switch is formed.

Abstract: A circuit arrangement is described for the transmission of a digital data signal. The circuit arrangement is inserted as an asynchronous interface into the transmission path between digital data handling systems with differing clock frequencies f.sub.1 and f.sub.2. The circuit arrangement comprises a register 1 of D flip-flops for buffering the input data D.sub.1. The clocking of the register 1 is performed with a special clock signal f.sub.Inter, which is derived from a series circuit of edge controlled R-S and J-K flip-flops 3 and 4 respectively. The result is output data D.sub.2 synchronous with the frequency f.sub.2.

Abstract: A complementary bipolar transistor circuit characterized by low power dissipation and fast response for driving capacitive loads in response to input logic signals. An emitter follower series-connected pair of complementary transistors provide an output signal at the junction between their commonly connected emitters. The NPN transistor of the pair of transistors is directly driven by an input signal applied to its base. The PNP transistor of the pair of transistors is driven through a second series-connected NPN transistor and Schottky diode, the second NPN transistor base also receiving said input signal. The forward voltage of the Schottky diode is less than the V.sub.be of the PNP transistor. The PNP transistor nominally is held off and conducts only on negative-going input signal transitions to discharge the capacitive load. The NPN transistor of the pair of transitors conducts only on positive-going input signal transitions to charge the capacitive load.

Abstract: A random access read/write MOS memory device employs bistable latch or buffer circuits as the address inputs, data inputs, and the like. The buffers function to latch the data or address to allow the inputs to change states. The buffer is activated by TTL level inputs, exhibits low capacitance at its input, and switches states fast enough to allow rapid multiplexing of the addresses. Noise immunity is improved by selective implants of some of the transistors, and by use of filter capacitors connected between input nodes and Vss rather than Vdd.

Abstract: An electrical circuit for driving an inductive load includes an output transistor of one conductivity type and a detector transistor of the other conductivity type. The output transistor has an emitter connected to a power source, a base to which an input signal is supplied, and a collector connected to one end of an inductive load. The detector transistor has an emitter connected to the collector of the output transistor, a base connected to the other end of the inductive load, and a collector connected to the base of the output transistor. When the output transistor is rendered nonconductive, high counter electromotive force is induced between both ends of the inductive load. Thereby the detector transistor turns on and the output transistor is rendered conductive again.

Abstract: A current supply circuit is disclosed having a field effect transistor and negative feedback for degenerating the magnitude of the current supplied thereby. The negative feedback can be provided by a diffused resistor connected between the gate and source electrodes of the current supply field effect transistor. A differential amplifier which includes a pair of differentially coupled amplifying field effect transistors is coupled to the current supply circuit. The negative feedback enables the current supply device to provide a current which compensates the differentially coupled field effect transistors over processing while not deleteriously affecting the temperature characteristics thereof. A bipolar diode and a bipolar transistor can be included in the current supply for enabling the resistor to take up less chip area and for allowing more flexibility in the design of the geometry of the current supply, field effect transistor.

Abstract: A proximity switching device is disclosed, which comprises an oscillating circuit including a detection coil, a signal producing circuit for producing a detection signal in response to an oscillating amplitude of said oscillating circuit, and an output circuit for producing an output signal in response to said detection signal. The output circuit comprises a pair of Darlington circuits and a driving transistor for driving said Darlington circuits, one of said Darlington circuits operating as a NPN transistor and another operating as a PNP transistor, said Darlington circuit being connected complementarily for providing complementary output signals.

Abstract: A complementary bipolar transistor circuit characterized by the same output impedance for positive and negative input voltage transitions, only a single collector path delay between input and output for both senses of input voltage transitions and very low standby power consumption. Provision is made for simultaneously actuating an emitter follower series-connected first pair of complementary transistors with signals having voltage swings which are only a fraction of the V.sub.be necessary to forward bias each base-emitter diode of the first pair of transistors. The actuation is accomplished using a second pair of complementary transistors having collector electrodes connected to respective bases of the first pair of transistors of similar kind. One of the remaining electrodes of each of the second pair of transistors are connected to each other.In a driver circuit species of the invention, the bases of the second pair of transistors are connected to each other and receive the input signal.

Abstract: An interface circuit is disclosed for receiving a ground-referenced A.C. signal for detecting transitions of the A.C. signal about ground potential. An input transistor is enabled when the A.C. signal voltage falls below ground potential by one base-emitter forward drop. The input transistor is disabled when the A.C. signal voltage rises above ground potential by one base-emitter forward drop. A feedback circuit and a bias circuit are coupled to the input transistor for switching the threshold levels of the input transistor. The interface circuit employs a hysteresis-type switching action for improving noise immunity while providing a symmetric output waveform. The circuit requires only a single power supply and is suitable for fabrication as a highly dense, monolithic integrated circuit. Also, the circuit provides a low input impedance to large positive and negative voltage transients.

Abstract: A sequential activation control for selective sequential switching of at least two power circuits including: direct current power supply means to provide direct current source of power at selected voltage, clock means to provide output timing pulses at selected intervals, counter means, with counter controller means to receive the clock pulses having multiple electrical output means wherein a portion of the output means are serially activated by the counter controller in response to a selected number of clock pulses until a selected number of output means have been activated to provide a first activation cycle, multiple switch means, at least one switch means for each output means to be operated by selected output means, reset means to deactivate all of the switch means at selected time after the last output means has been activated so the clock means initiates a new activation cycle where the switch means are adapted to activate associated cooperative power circuits.

Abstract: A logarithmic amplifier comprising a common-emitter type transistor amplifier circuit with an emitter resistor and a collector load. A bias voltage is applied to the base of the transistor through a diode so that the overall input-output transfer characteristic of the amplifier exhibits a logarithmic characteristic for a relatively wide range of input signals. A cascade connection of several of the basic amplifier circuits enlarges the dynamic range over which a logarithmic transfer characteristic is achieved.