Patents Examined by Stanley D. Miller
  • Patent number: 5130635
    Abstract: This invention relates to a bias current control circuit which drives a power MOS transistor. Since the power MOS transistor has a large capacitance which is formed between a gate and a channel, it is needed to provide a circuit which is able to sufficiently supply a drive current to the gate. Such a circuit increases a consumption current because the circuit has to always flow the current to drive the gate. This invention provides a circuit which cut the consumption current in the circuit when the transistor is not driven, and increases a consumption current in the circuit in order to keep a gate current when the transistor is driven.
    Type: Grant
    Filed: August 19, 1991
    Date of Patent: July 14, 1992
    Assignee: Nippon Motorola Ltd.
    Inventor: Kiyoshi Kase
  • Patent number: 5130829
    Abstract: An active matrix liquid crystal display device includes on a first substrate (30) a row and column array of picture element electrodes (20), associated switching devices (11), e.g. a-Si or polysilicon TFTs, and sets of row and column address conductors (14,16) to which selection and data signals are applied respectively, the picture elements being driven a row at a time in sequence by scanning the row conductors with a selection signal. Each switching device (11) is provided with a metal light shield (45) extending over the active region of the device (11) which is connected (46) electrically to the row address conductor (14) adjacent the one to which the switching device is connected. Because the adjacent row conductor is at a reference potential for most of the time, parasitic capacitance effects due to the metal light shield are negligible.
    Type: Grant
    Filed: June 7, 1991
    Date of Patent: July 14, 1992
    Assignee: U.S. Philips Corporation
    Inventor: John M. Shannon
  • Patent number: 5130826
    Abstract: There is disclosed an optical system for a color picture display having three spatial light modulators of reflecting type corresponding to an optical image of one of three primary colors by photoelectric effect and photomodulation effect, a writing device for guiding writing lights each carrying the optical image of one of the colors to each device, a reading device for guiding reading lights each in the region of wavelength of one of the colors to each device and a composing device for composing a composed reading light of the reading lights which are emitted from the optical devices respectively after optically modulated. The optical system comprises an optical apparatus shared by the reading device and the composing device, having first, second and third prisms, a first dichroic filter provided between the first and the second prisms and a second dichroic filter provided between the second and the third prisms.
    Type: Grant
    Filed: April 3, 1991
    Date of Patent: July 14, 1992
    Assignee: Victor Company of Japan, Ltd.
    Inventors: Itsuo Takanashi, Shintaro Nakagaki, Ichiro Negishi, Tetsuji Suzuki, Fujiko Tatsumi, Ryusaku Takahashi, Keiichi Maeno
  • Patent number: 5130830
    Abstract: A spatial light modulator has a photoconductive layer deposited on one glass substrate having a transparent electrode. A first liquid crystal alignment film is formed on the photoconductive layer. A second liquid crystal alignment film is formed on another glass substrate having another transparent electrode. A ferroelectric liquid crystal is filled between the first and second liquid crystal alignment films.
    Type: Grant
    Filed: February 26, 1990
    Date of Patent: July 14, 1992
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Seiji Fukushima, Takashi Kurokawa, Takashi Kozawaguchi, Shinji Matsuo
  • Patent number: 5130834
    Abstract: A liquid crystal display includes a pair of substrates and a liquid crystal composition sealed between the substrates. The liquid crystal composition has a twist angle set within a range of 180-300 degrees and a retardation set within a range of 0.45-0.7 .mu.m wherein when an electric field is applied, the liquid crystal display is in a dark state, while when the electrid field is not applied, the liquid crystal display is in a bright state. A dichromatic coloring matter is contained in the liquid crystal composition, and it has a hue complementary to that of an image color of the liquid-crystal display in the bright state.
    Type: Grant
    Filed: October 27, 1988
    Date of Patent: July 14, 1992
    Assignee: Alps Electric Co., Ltd.
    Inventors: Mitsuru Kano, Kenji Miyagawa, Masahiko Yamaguchi, Eiji Imaizumi
  • Patent number: 5130580
    Abstract: A sense amplifier driving circuit for controlling sense amplifiers of high density semiconductor memory device by turning-on/off a driving transistor connected between an external voltage Vcc terminal and a ground voltage Vss terminal, comprises a bias circuit including a MOS transistor being connected to the driving MOS transistor to form a current mirror circuit therewith which is controlled by a sense amplifier enable clock and a constant current source having a MOS transistor with a bias voltage of an intermediate level between Vcc and Vss being applied to its gate terminal. The bias circuit is connected to the gate terminal of the driving transistor to control the gate voltage of the driving transistor, thereby reducing the peak current of a sense amplifier driving signal. Further, the driving signals are generated in the waveform having a linear dual slope, resulting in a decrease in power-noise.
    Type: Grant
    Filed: July 11, 1990
    Date of Patent: July 14, 1992
    Assignee: Samsung Electronic Co., Ltd.
    Inventors: Dong-sun Min, Hong-sun Hwang, Soo-in Cho, Dae-Je Chin
  • Patent number: 5130577
    Abstract: An analog computational circuit, for transforming an input voltage into an output voltage or current variable according to a selected transfer function, including a plurality of current sources having a common input and a common current output. Each of the current sources is energizable in response to an input voltage as it exceeds a selected input voltage threshold associated with each of the current sources. There are means coupled to the current sources for establishing the input voltage threshold associated with each of the current sources. Also included are means coupled to each of the current sources for establishing the selected transfer function of the computational circuit. Each of the current sources is adapted to begin conducting current in response to an input voltage which exceeds its associated input voltage threshold, and to provide an attenuated output current proportional to the input voltage, the proporation established by the selected transfer function.
    Type: Grant
    Filed: April 9, 1990
    Date of Patent: July 14, 1992
    Assignee: Unitrode Corporation
    Inventors: Robert A. Neidorff, Larry J. Wofford
  • Patent number: 5131017
    Abstract: An evaluation device with an absolute value counter is provided in an incremental position measuring system, which determines the absolute position even in case of loss of the main power supply. The evaluation device is operated by means of an emergency power supply while the main power supply is out. Following the restoration of the main power supply, counting pulses are supplied to a follow-up counter (11) by a pulse emitter, until the follow-up counter has reached the counter reading of the absolute value counter. Two rectangular signals, which are phase-shifted by 90.degree. in relation to each other, are formed as a function of the counting signals, which are present at the evaluation device in the form of output signals.
    Type: Grant
    Filed: April 8, 1991
    Date of Patent: July 14, 1992
    Assignee: Dr. Johannes Heidenhain GmbH
    Inventors: Norbert Huber, Simon Graf
  • Patent number: 5130567
    Abstract: A bipolar transistor arrangement with compensation for the distortion component (Id) in the collector current (Io+Id) of a transistor (T1), which component is caused by the logarithmic base-emitter voltage thereof. In order to provide this compensation a sub-current (Is) proportional to the emitter current (I+Ie) is generated. This sub-current is fed through an element (7) comprising at least one semiconductor junction. By means of a voltage-to-current converter (8) the logarithmic voltage appearing across this element is converted into a correction current (Ir) proportional to the distortion component (Id) and is applied to the collector of the transistor (T1) in order to compensate for the distortion component (Id) flowing in a load circuit (Rc) connected to the collector. The arrangement is suitable for use in voltage-to-current converters made up of bipolar transistors.
    Type: Grant
    Filed: April 20, 1990
    Date of Patent: July 14, 1992
    Assignee: U.S. Philips Corporation
    Inventors: Ivo W. J. M. Rutten, Robert E. J. Van De Grift
  • Patent number: 5128555
    Abstract: A CMOS logic circuit uses a boost transistor responsive to a pulse signal to rapidly charge and/or discharge the output node during predetermined transitions of the input signal and provide a selectable slew rate for one edge of the output signal. A pulse generator circuit provides the pulse signal of predetermined width at a first transition of the input signal and disables the pulse signal and boost transistor before the following transition to avoid adversely effecting the opposite edge of the output signal. The width of the pulse signal and the size of the boost transistor determines the slew rate of the output signal for the edge under control. Many types of logic circuits such as inverters, NAND gates and NOR gates may utilize dual boost transistors and pulse generator circuits for separate control over both output edge rates without adversely affecting the opposite edge.
    Type: Grant
    Filed: December 3, 1991
    Date of Patent: July 7, 1992
    Assignee: Motorola, Inc.
    Inventor: Steven D. Millman
  • Patent number: 5128788
    Abstract: Disclosed herein is a liquid-crystal orientating film which is a polymer film consisting of stripe-shaped contracted portions extending in a predetermined direction and non-contracted portions located adjacent to the contracted portions, and which is designed to orientate liquid-crystal molecules in the direction in which the portions of the film are contracted and non-contracted. The liquid-crystal orientating film has been manufactured by applying light to selected portions of a polymer film, thereby photo-curing these portions, thus forming stripe-shaped contracted portions, stretching the remaining portions of the film, which are located adjacent to the contracted portions, by virtue of the contraction of the portions applied with light.
    Type: Grant
    Filed: September 26, 1990
    Date of Patent: July 7, 1992
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kohki Takatoh, Masanori Sakamoto
  • Patent number: 5128558
    Abstract: A memory device (10) includes switching circuitry 22 comprising sensing and control circuits (24 and 26) to predict the next state of the output of memory device (12) and to turn on and off current sources (20) responsive to said memory output to provide faster output transitions.
    Type: Grant
    Filed: May 21, 1991
    Date of Patent: July 7, 1992
    Assignee: Texas Instruments Incorporated
    Inventors: Kevin M. Ovens, Jeffrey A. Niehaus
  • Patent number: 5128553
    Abstract: An integrated circuit is provided which uses a single drive signal for turning a PNP switching transistor "on" and "off." An NPN transistor provides reverse drive current to the PNP transistor's base. When the drive signal is present, the PNP switching transistor is turned "on" and is driven into saturation. The drive signal during this period also charges an integrated capacitor coupled to the base of the NPN transistor. The drive signal then is removed to turn the PNP transistor "off." Removal of the drive signal also causes the voltage developed across the capacitor to drive the base of the NPN transistor. This, in turn, causes the NPN transistor to drive the base of the PNP transistor with a reverse drive current, thus speeding up the switching of the PNP transistor from the conducting state to the non-conducting state.
    Type: Grant
    Filed: June 22, 1990
    Date of Patent: July 7, 1992
    Assignee: Linear Technology Corporation
    Inventor: Carl T. Nelson
  • Patent number: 5128563
    Abstract: An output driver circuit of a DRAM is wired in a push-pull arrangement. A CMOS transistor arrangement provides a strong output signal. This transistor arrangement comprises the pull-up transistor circuit of the push-pull arrangement. A bootstrap circuit gates the NMOS of the CMOS causing an incremental increase in CMOS drain current.
    Type: Grant
    Filed: November 28, 1990
    Date of Patent: July 7, 1992
    Assignee: Micron Technology, Inc.
    Inventors: Glen Hush, Mark R. Thomann
  • Patent number: 5128568
    Abstract: A timing circuit in which an output can be held at a certain level or state for a particular time after the circuit is enabled. The time is established by an external resistor and capacitor. The timing circuit is self-biasing to permit operation after associated power supplies have dropped to zero. The timing of the circuit is independent of supply voltage and substantially independent of temperature variations. The timing circuit includes a number of MOSFET's which are diode connected between two nodes, and another MOSFET having a gate and one conduction electrode connected across the two nodes. The voltage between the two nodes at the beginning of the timing interval is the sum of the threshold voltages of the diode connected MOSFET's. At the end of the timing interval, the voltage between the two nodes has fallen to the threshold voltage of the single MOSFET.
    Type: Grant
    Filed: October 3, 1990
    Date of Patent: July 7, 1992
    Assignee: International Business Machines Corp.
    Inventor: Gary D. Carpenter
  • Patent number: 5128625
    Abstract: A phase lock loop for a digital input signal has a phase detector, a loop filter, a digital voltage controlled oscillator (VCO), an initial phase difference calculator, a center frequency difference calculator and an input buffer memory. In an initial training mode prepared in the PLL operation, an optimum initial phase and an optimum center frequency of the VCO to complete a lock-in state is searched for the input signal stored in the buffer memmory. By estimating the initial phase difference and the center frequency difference between the input signal and the VCO output with repetative kick-offs in calculators, optimum values mentioned above are obtained.
    Type: Grant
    Filed: September 12, 1990
    Date of Patent: July 7, 1992
    Assignee: Kokusai Denshin Denwa Co., Ltd.
    Inventors: Yohtaro Yatsuzuka, Takuro Muratani
  • Patent number: 5128567
    Abstract: An output circuit of a semiconductor integrated circuit includes a plurality of output transistors having different current driving abilities for a load, and a plurality of signal delay means for delaying signals for driving each of the output transistors by different delay times, wherein the current driving ability of that one of the plurality of output transistors which is driven by the delay signal of one of the signal delay means which has a first delay time is set to be larger than the current driving ability of that one of the plurality of output transistors which is driven by the delay signal of one of the signal delay means which has a second delay time shorter than the first delay time.
    Type: Grant
    Filed: May 1, 1989
    Date of Patent: July 7, 1992
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Fuminari Tanaka, Satoshi Nonaka
  • Patent number: 5128564
    Abstract: A current compensation circuit for a comparator includes a pair of switching transistors which supply input bias current to their corresponding comparator input transistors, a pair of current to voltage conversion means which use collector current from the comparator input transistors to turn on and off the appropriate switching transistor when its corresponding comparator input transistor is on, a transistor to generate a negative replica of the input bias current flowing in the comparator input, and a current mirror which is programmed by the replica of the uncompensated input bias current to produce a compensated input bias current to the switching transistors.
    Type: Grant
    Filed: November 8, 1991
    Date of Patent: July 7, 1992
    Assignee: Elantec
    Inventors: Barry Harvey, Joseph Piernet
  • Patent number: 5128785
    Abstract: A liquid crystal display device capable of displaying clear images without cross-talk, comprises (a) a first transparent base, (b) a plurality of picture element electrodes on the first base (a), (c) a plurality of signal lines on the first base (a), (d) a plurality of varistor layers connecting the picture element electrodes (b) to the signal lines (c) therethrough, (e) a second transparent base in parallel to the first base (a), (f) a plurality of electrodes on the second base (e), and (g) a liquid crystal material layer arranged between the picture element electrodes (b) and the electrode (f), and is characterized in that portions of the varistor layer connecting the signal lines (c) and the adjacent picture element electrode (b) have a threshold value voltage (V.sub.th) smaller than a minimum voltage (V.sub.
    Type: Grant
    Filed: August 6, 1990
    Date of Patent: July 7, 1992
    Assignee: Ube Industries, Ltd.
    Inventors: Hataaki Yoshimoto, Katsuhiro Ito, Hiroyuki Mori
  • Patent number: RE33987
    Abstract: A liquid crystal display panel having a backlight for providing high brightness uniformity of illumination intensity, small thickness, high efficiency and which can be manufactured at a low cost. The display device includes a liquid crystal display panel, a light source for illuminating the liquid crystal panel, a light passage member which can be formed of either transparent or translucent material disposed between the liquid crystal panel and the light source. The light source inlet side of the light passage member is formed with a recess so that the thickness is reduced at the region opposed to the brightest region of the light source. A light reflecting member substantially surrounds the light source and the light passage member is formed with an opening facing the liquid crystal panel to expose a surface portion of the light passage member. The light source can either be incandescent light bulb or a cold-cathode discharge tube.
    Type: Grant
    Filed: April 20, 1989
    Date of Patent: July 7, 1992
    Assignee: Seiko Epson Corporation
    Inventor: Osamu Suzawa