Patents Examined by Steven T Sawyer
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Patent number: 11653447Abstract: A ceramic copper circuit board according to an embodiment includes a ceramic substrate and a first copper part. The first copper part is bonded at a first surface of the ceramic substrate via a first brazing material part. The thickness of the first copper part is 0.6 mm or more. The side surface of the first copper part includes a first sloped portion. The width of the first sloped portion is not more than 0.5 times the thickness of the first copper part. The first brazing material part includes a first jutting portion jutting from the end portion of the first sloped portion. The length of the first jutting portion is not less than 0 ?m and not more than 200 ?m. The contact angle between the first jutting portion and the first sloped portion is 65° or less.Type: GrantFiled: December 9, 2021Date of Patent: May 16, 2023Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA MATERIALS CO., LTD.Inventors: Hiromasa Kato, Takashi Sano
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Patent number: 11641713Abstract: A circuit board structure, including a circuit layer, a first dielectric layer, a first graphene layer, a first conductive via, and a first built-up circuit layer, is provided. The circuit layer includes multiple pads. The first dielectric layer is disposed on the circuit layer and has a first opening. The first opening exposes the pads. The first graphene layer is conformally disposed on the first dielectric layer and in the first opening, and has a first conductive seed layer region and a first non-conductive seed layer region. The first conductive via is disposed in the first opening. The first built-up circuit layer is disposed corresponding to the first conductive seed layer region. The first built-up circuit layer exposes the first non-conductive seed layer region and is electrically connected to the pads through the first conductive via and the first conductive seed layer region.Type: GrantFiled: September 24, 2021Date of Patent: May 2, 2023Assignee: Unimicron Technology Corp.Inventors: Chun-Hung Kuo, Kuo-Ching Chen
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Patent number: 11607171Abstract: A mouth guard senses impact forces and determines if the forces exceed an impact threshold. If so, the mouth guard notifies the user of the risk for injury by haptic feedback, vibratory feedback, and/or audible feedback. The mouth guard system may also remotely communicate the status of risk and the potential injury. The mouth guard uses a local memory device to store impact thresholds based on personal biometric information obtained from the user and compares the sensed forces relative to those threshold values. The mouth guard and its electrical components on the printed circuit board are custom manufactured for the user such that the mouth guard provides a comfortable and reliable fit, while ensuring exceptional performance.Type: GrantFiled: August 2, 2022Date of Patent: March 21, 2023Assignee: Force Impact Technologies, Inc.Inventors: Anthony M. Gonzales, Robert M. Merriman, Susan M. Merriman, Christopher T. Cooper
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Patent number: 11609446Abstract: An electronic device and a middle frame thereof are provided. The middle frame includes a supporting frame. The supporting frame is provided with a supporting surface configured to support an edge area of a transparent cover plate of the electronic device, and an inner sidewall connected to the supporting surface. A groove for receiving a light source of an under-screen fingerprint recognition circuit is disposed in the inner sidewall and connected to the supporting surface.Type: GrantFiled: June 15, 2020Date of Patent: March 21, 2023Assignee: Beijing Xiaomi Mobile Software Co., Ltd.Inventors: Xiankun Hu, Chunjie Lou
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Patent number: 11612054Abstract: A substrate that is stretchable; wiring positioned on a first surface side of the substrate, the wiring having a meandering shape section including peaks and valleys aligned along a first direction that is one of planar directions of the first surface of the substrate; and a stretching control mechanism that controls extension and contraction of the substrate. The substrate has a component region and a wiring region adjacent to the component region. The component region includes a component-fixing region overlapping an electronic component mounted on the wiring board when viewed along the normal direction of the first surface of the substrate and a component-surrounding region positioned around the component-fixing region. The stretching control mechanism is positioned in the component-surrounding region and at least includes a stretching control part that spreads to the border between the component-surrounding region and the component-fixing region.Type: GrantFiled: October 12, 2018Date of Patent: March 21, 2023Assignees: DAI NIPPON PRINTING CO., LTD., THE UNIVERSITY OF TOKYOInventors: Naoko Okimoto, Kenichi Ogawa, Takao Someya
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Patent number: 11612056Abstract: A first substrate includes a first surface and a second surface opposite to the first surface. A second substrate includes a third surface and a fourth surface opposite to the third surface. A third substrate includes a fifth surface and a sixth surface opposite to the fifth surface. The first substrate is made of an insulator, and includes a mounting portion for mounting an electronic element at the first surface, and the mounting portion for mounting the electronic element is a rectangular shape. The third substrate is made of a carbon material, and the fifth surface is connected to at least the second surface at location overlapped with the mounting portion for mounting the electronic element in plan view. The third substrate has a larger heat conduction in a direction perpendicular to the longitudinal direction of the mounting portion than heat conduction in the longitudinal direction of the mounting portion in plan view.Type: GrantFiled: January 30, 2019Date of Patent: March 21, 2023Assignee: KYOCERA CorporationInventors: Yukio Morita, Noboru Kitazumi, Yousuke Moriyama
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Patent number: 11605585Abstract: A flexible substrate includes a first area including a first circuit, the first circuit configured to be connectable to a first component, a second area including a second circuit, the second circuit configured to be connectable to a second component, a connecting area provided between the first area and the second area and including a third circuit, the third circuit connecting the first circuit and the second circuit, one or more first via conductors provided between the first area and the connecting area and electrically isolated from the first circuit, the second circuit, and the third circuit, and one or more second via conductors provided between the second area and the connecting area and electrically isolated from the first circuit, the second circuit, and the third circuit.Type: GrantFiled: October 12, 2021Date of Patent: March 14, 2023Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventor: Kei Imafuji
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Patent number: 11606861Abstract: A printed wiring board includes a first resin insulating layer, a conductor layer on the first resin insulating layer, and a second resin insulating layer formed on the first resin insulating layer such that the second resin insulating layer is covering the conductor layer. The conductor layer includes a first circuit having a width of 15 ?m or less and a rectangular cross-sectional shape, a second circuit having a trapezoidal cross-sectional shape, a third circuit, a fourth circuit, a fifth circuit, and a sixth circuit, a space between the first and third circuits has a width of 14 ?m or less, a space between the first and fourth circuits has a width of 14 ?m or less, a space between the second and fifth circuits has a width of 20 ?m or more, and a space between the second and sixth circuits has a width of 20 ?m or more.Type: GrantFiled: January 19, 2022Date of Patent: March 14, 2023Assignee: IBIDEN CO., LTD.Inventor: Kyohei Yoshikawa
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Patent number: 11602046Abstract: A wiring board according to the present disclosure includes a core board including an upper surface, a lower surface, a through-hole penetrating from the upper surface to the lower surface, and a plurality of glass fibers located inside, and a through-hole conductor located in the through-hole. The through-hole conductor includes a first portion located on an inner wall of the through-hole, and second portions connected to the first portion and located inside the glass fibers. The second portions include portions in a first direction and a second direction intersecting the first direction in a planar direction of the core board, the portions having a shorter length in the planar direction from the inner wall of the through-hole than portions, of the second portions, in directions other than the first direction and the second direction.Type: GrantFiled: May 6, 2021Date of Patent: March 7, 2023Assignee: KYOCERA CorporationInventor: Hiroshi Takeuchi
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Patent number: 11596066Abstract: Described herein are dielectric polymer films and printed circuit boards, such as multilayer and high-density interconnect printed circuit board comprising at least one dielectric polymer film.Type: GrantFiled: March 22, 2022Date of Patent: February 28, 2023Assignee: Thintronics. Inc.Inventors: Tarun Amla, Stefan J. Pastine
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Patent number: 11587701Abstract: A superconducting device includes a superconducting cable having a plurality of superconducting tapes in a plurality of phases, including a first phase, and at least one further phase. One or more superconducting tapes of the first phase is in electrical contact with one or more superconducting tapes of the at least one further phase through at least one resistive barrier that prevents current from passing between the first phase and the at least one further phase in the absence of a voltage between one or more of the superconducting tapes of the first phase or the at least one further phase. The first phase is electrically connected in series to at least one further phase.Type: GrantFiled: December 3, 2019Date of Patent: February 21, 2023Assignee: ADVANCED CONDUCTOR TECHNOLOGIES LLCInventor: Daniël Cornelis Van Der Laan
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Patent number: 11570894Abstract: A system of circuit card components each include through-holes for soldering having recessed copper layers for thermal insulation. Thermal insulation prevents heat conduction away from flowing solder, allowing the solder to flow freely through the through-hole. Even high-temperature, lead-free solders may maintain the necessary temperature to flow. Different circuit layers include specialized features based on distance from a top or bottom surface. Vias surrounding the through-hole maintain the necessary cross-sectional area for electrical connectivity.Type: GrantFiled: May 13, 2021Date of Patent: January 31, 2023Assignee: Rockwell Collins, Inc.Inventors: James B. Mayfield, Robert P. Campbell, Jeffrey J. Deloy, John A. Bauer
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Patent number: 11569155Abstract: A bonding pad such as for a ball grid array includes a conductive pad having a top surface and a first interface surface in contact with a signal trace of a substrate, and a plating layer having a bottom surface in direct contact with the top surface of the conductive pad. The plating layer includes one or more protrusions extending toward the signal trace in a direction generally parallel to a longitudinal axis of the signal trace. Each of the one or more protrusions includes two parallel sidewalls extending upwardly from the bottom surface of the plating layer, and a second interface surface contiguous with the bottom surface of the plating layer. The second interface surface is positioned over and in direct contact with a top surface of the signal trace. The protrusions prevent the connection to the signal trace from being compromised.Type: GrantFiled: June 9, 2021Date of Patent: January 31, 2023Assignee: Western Digital Technologies, Inc.Inventors: Chih-Chin Liao, Cheng-Hsiung Yang
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Patent number: 11564313Abstract: A wiring body includes: a core insulating base material having a first main surface and a second main surface; a signal line and a first power supply line provided on the first main surface; a second power supply line provided on the second main surface and electrically connected to the first power supply line; a first dielectric layer laminated on the first main surface so as to embed the signal line and the first power supply line; a first ground layer provided on the first dielectric layer; a second dielectric layer laminated on the second main surface so as to embed the second power supply line; and a second ground layer provided on the second dielectric layer and sandwiching at least the signal line together with the first ground layer.Type: GrantFiled: May 17, 2021Date of Patent: January 24, 2023Assignee: NIPPON MEKTRON, LTD.Inventor: Fumihiko Matsuda
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Patent number: 11564310Abstract: The invention relates to a circuit arrangement, comprising at least one wiring carrier plate (1), characterized by at least one separating element (2) formed in the wiring carrier plate (1), which separating element divides the wiring carrier plate (1) into sections separated by the separating element (2), wherein the transfer of vibrations from one section to another section is at least partially decoupled and/or damped by the separating element (2). The invention further relates to a converter having such a circuit arrangement, and to an aircraft having a converter. The converter can comprise capacitor stacks (3) arranged on the wiring carrier plate (1), and power semiconductors (6).Type: GrantFiled: March 20, 2019Date of Patent: January 24, 2023Assignee: Rolls-Royce Deutschland Ltd & Co KGInventors: Rene Blank, Martin Franke, Peter Frühauf, Matthias Heimann, Nora Jeske, Rüdiger Knofe, Bernd Müller, Stefan Nerreter, Jörg Strogies, Klaus Wilke, Ulrich Wittreich
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Patent number: 11546993Abstract: A wireless communication device includes a base sheet in a folded state, a first conductor pattern disposed on a first principal surface of the base sheet, a second conductor pattern disposed on a second principal surface of the base sheet opposite to the first principal surface, an RFIC chip disposed on the base sheet so as to electrically connect to the first conductor pattern, and a sheet-shaped connection conductor coupled to a turning part of the base sheet so as to partially overlap with an end portion of the first conductor pattern near the turning part and an end portion of the second conductor pattern near the turning part.Type: GrantFiled: October 8, 2019Date of Patent: January 3, 2023Assignee: MURATA MANUFACTURING CO., LTD.Inventor: Noboru Kato
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Patent number: 11528805Abstract: A display device includes a substrate including a display area and a non-display area adjacent to the display area, lower pads disposed in the non-display area of the substrate and spaced apart from each other, upper pads disposed on the lower pads and spaced apart from each other, an anisotropic conductive film disposed between the lower pads and the upper pads, and a circuit film disposed on the upper pads, the circuit film including first lower holes disposed between the upper pads in a plan view, and first upper holes connected to the first lower holes and having radiuses larger than radiuses of the first lower holes. The first upper holes form first openings on an upper surface of the circuit film. A method of manufacturing the display device is provided.Type: GrantFiled: January 26, 2021Date of Patent: December 13, 2022Assignee: SAMSUNG DISPLAY CO., LTD.Inventors: Chang Woo Byun, Jong Woo Park, Shangu Kim, Young Tae Choi
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Patent number: 11523496Abstract: A component carrier includes a stack having at least one electrically conductive layer structure and/or at least one electrically insulating layer structure. A component is embedded in the stack. A first thermally conductive block is located above and thermally connected with the component, and a second thermally conductive block is located below and thermally coupled with the component. Heat generated by the component during operation is removed via at least one of the first thermally conductive block and the second thermally conductive block.Type: GrantFiled: February 19, 2021Date of Patent: December 6, 2022Assignee: AT&S Austria Technologie & Systemtechnik AktiengesellschaftInventors: Rainer Frauwallner, Dietmar Drofenik, Patrick Fleischhacker
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Patent number: 11515241Abstract: A semiconductor device package includes a first dielectric layer, a conductive pad and an electrical contact. The first dielectric layer has a first surface and a second surface opposite to the first surface. The conductive pad is disposed within the first dielectric layer. The conductive pad includes a first conductive layer and a barrier. The first conductive layer is adjacent to the second surface of the first dielectric layer. The first conductive layer has a first surface facing the first surface of the first dielectric layer and a second surface opposite to the first surface. The second surface of the first conductive layer is exposed from the first dielectric layer. The barrier layer is disposed on the first surface of the first conductive layer. The electrical contact is disposed on the second surface of the first conductive layer of the conductive pad.Type: GrantFiled: March 16, 2021Date of Patent: November 29, 2022Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Yung-Shun Chang, Teck-Chong Lee
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Patent number: 11516909Abstract: An electronic device (100) comprises a stretchable substrate (30) with a flap (30f) formed by a cut (40) in the substrate (30). The flap (30f) is disconnected by the cut (40) from a surrounding main section (30m) of the substrate (30) except on one side. The flap (30f) is exclusively connected to the main section (30m) via a connected section (30c) of the substrate (30) between two ends (40a, 40b) of the cut (40). An electronic component (10) is disposed on the flap (30f) with electrical contacts (11,12) connected to conductive tracks (21,22) disposed on the substrate (30). The conductive tracks (21,22) extend between the component (10) disposed on the flap (30f), and other parts (10r) of the electronic device (100) outside the flap (30f) via the connected section (30c). The flap (30f) with the component (10) is disposed in a pocket formed by surrounding lamination layers (31,32).Type: GrantFiled: May 21, 2019Date of Patent: November 29, 2022Assignee: Nederlandse Organisatie voor toegepast-natuurwetenschappelijk onderzoek TNOInventors: Marco Barink, Edsger Constant Pieter Smits, Jeroen Van Den Brand