Patents Examined by Su C. Kim
  • Patent number: 11374151
    Abstract: A light-emitting device includes a semiconductor stacked body having first and second semiconductor layers. The second semiconductor layer includes conductive portions contacting a second conductive layer and having island configurations. The conductive portions are disposed in a first region, a second region, a third region, and a fourth region. The first region is positioned at a periphery of a first corner of the semiconductor stacked body. The second region is positioned at a periphery of a second corner of the semiconductor stacked body. The third region is positioned at a periphery of a third corner of the semiconductor stacked body. The fourth region is positioned at a periphery of a fourth corner of the semiconductor stacked body. A density of the conductive portions disposed in the first region is greater than densities of the conductive portions disposed in the second region, the third region, and the fourth region.
    Type: Grant
    Filed: July 13, 2020
    Date of Patent: June 28, 2022
    Assignee: NICHIA CORPORATION
    Inventor: Naoto Furuha
  • Patent number: 11366391
    Abstract: A method for fabricating calcite channels in a nanofluidic device is described. A photoresist layer is coated onto a top surface of a silicon nitride (SiN) substrate. After coating the photoresist layer, the photoresist layer is scanned with an electron beam in a predefined pattern. The scanned photoresist is developed to expose portions of the top surface of the SiN substrate in the predefined pattern. Calcite is deposited in the predefined pattern using atomic layer deposition (ALD) using a calcite precursor gas. Using a solvent, a remaining portion of the photoresist layer is removed to expose the deposited calcite in the predefined pattern and on the top surface of the SiN substrate, where a width of the deposited calcite is in range from 50 to 100 nanometers (nm).
    Type: Grant
    Filed: June 11, 2020
    Date of Patent: June 21, 2022
    Assignee: Saudi Arabian Oil Company
    Inventors: Dong Kyu Cha, Mohammed Badri AlOtaibi, Ali Abdallah Al-Yousef
  • Patent number: 11355648
    Abstract: In a semiconductor device including a transistor including a gate electrode formed over a substrate, a gate insulating film covering the gate electrode, a multilayer film overlapping with the gate electrode with the gate insulating film provided therebetween, and a pair of electrodes in contact with the multilayer film, a first oxide insulating film covering the transistor, and a second oxide insulating film formed over the first oxide insulating film, the multilayer film includes an oxide semiconductor film and an oxide film containing In or Ga, the oxide semiconductor film has an amorphous structure or a microcrystalline structure, the first oxide insulating film is an oxide insulating film through which oxygen is permeated, and the second oxide insulating film is an oxide insulating film containing more oxygen than that in the stoichiometric composition.
    Type: Grant
    Filed: December 19, 2019
    Date of Patent: June 7, 2022
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Junichi Koezuka, Yukinori Shima, Hajime Tokunaga, Toshinari Sasaki, Keisuke Murayama, Daisuke Matsubayashi
  • Patent number: 11355673
    Abstract: The present invention relates to a display device and, particularly, to a display device using a semiconductor light emitting element. The display device according to the present invention comprises a plurality of semiconductor light emitting elements mounted on a substrate, wherein at least one of the semiconductor light emitting elements comprises: a first conductive electrode and a second conductive electrode; a first conductive semiconductor layer in which the first conductive electrode is disposed; a second conductive semiconductor layer which overlaps the first conductive semiconductor layer and in which the second conductive electrode is disposed; a first passivation layer formed to cover outer surfaces of the first conductive semiconductor layer and the second conductive semiconductor layer; and a second passivation layer formed to cover the first passivation layer and formed such that at least a portion thereof varies in thickness.
    Type: Grant
    Filed: January 31, 2017
    Date of Patent: June 7, 2022
    Assignee: LG ELECTRONICS INC.
    Inventors: Hwanjoon Choi, Yonghan Lee
  • Patent number: 11329194
    Abstract: A display panel and a display device are provided. When manufacturing a first electrode, by depositing a first transparent electrode layer, a first metal layer, and a second transparent electrode layer on a region of the display panel, and etching the first transparent electrode layer, the first metal layer, and the second transparent electrode layer on the thinned-down region; and afterwards, depositing a third transparent electrode layer, a second metal layer, and a fourth transparent electrode layer, a first electrode of the display panel is formed.
    Type: Grant
    Filed: August 16, 2019
    Date of Patent: May 10, 2022
    Assignee: WUHAN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO., LTD.
    Inventors: Weiwei Yang, Cheng Chen
  • Patent number: 11309468
    Abstract: A method of fabricating a micro light emitting diode (micro LED) array substrate having a plurality of micro LEDs. The method includes forming a plurality of signal lines on a base substrate; depositing a semiconductor material on the base substrate to form a semiconductor material layer; and patterning the semiconductor material layer to form a semiconductor layer of the plurality of micro LEDs. A surface of the plurality of signal lines away from the base substrate is uncovered during depositing the semiconductor material. The plurality of signal lines form a grid for facilitating epitaxial growth of the semiconductor material.
    Type: Grant
    Filed: November 27, 2018
    Date of Patent: April 19, 2022
    Assignees: Hefei Xinsheng Optoelectronics Technology Co., Ltd., BOE Technology Group Co., Ltd.
    Inventors: Peng Chen, Xinxia Zhang, Hengbin Li, Guolei Wang
  • Patent number: 11296258
    Abstract: A light emitting diode includes a first conductivity type semiconductor layer and a mesa disposed on the first conductivity type semiconductor layer wherein the mesa is a semiconductor stack including an active layer and a second conductivity type semiconductor layer; a ZnO layer disposed on the second conductivity type semiconductor layer; a lower insulation layer covering the ZnO layer and the mesa, and including an opening exposing the ZnO layer; a first pad metal layer disposed on the lower insulation layer, and electrically connected to the first conductivity type semiconductor layer; a second pad metal layer electrically connected to the ZnO layer through the opening of the lower insulation layer, and an upper insulation layer covering the first pad metal layer and the second pad metal layer.
    Type: Grant
    Filed: December 6, 2019
    Date of Patent: April 5, 2022
    Assignee: SEOUL VIOSYS CO., LTD.
    Inventors: Seom Geun Lee, Chan Seob Shin, Myeong Hak Yang, Jin Woong Lee
  • Patent number: 11296267
    Abstract: A display device includes: a base layer including a first region in which a hole is defined, a second region surrounding the first region, and a third region surrounding the second region; a line part disposed on the second region and including first, second, third, and fourth lines disposed on different layers from each other; pixels disposed on the third region; first signal lines electrically connected to the pixels and arrayed along a first direction; and second signal lines electrically connected to the pixels and arrayed along a second direction, wherein one second signal line is electrically connected to the first line, another second signal line is electrically connected to the second line, one first signal line is electrically connected to the third line, and another first signal line is electrically connected to the fourth line.
    Type: Grant
    Filed: November 27, 2019
    Date of Patent: April 5, 2022
    Assignee: Samsung Display Co., Ltd.
    Inventors: Donghyeon Jang, Hyunae Park, Seungwoo Sung, Nuree Um, Young-soo Yoon, Ilgoo Youn, Ji-eun Lee, Yun-kyeong In, Seunghan Jo, Junyoung Jo
  • Patent number: 11289634
    Abstract: In a micro light emitting element, a first metal film electrically connected to a second conductive layer is disposed on a surface on an opposite side of a light emitting surface side. The first metal film covers the second conductive layer. A first inclined angle of a first conductive layer side surface from a slope formed around a light emission layer to the light emitting surface is larger than a second inclined angle of the slope. The slope and the first conductive layer side surface are covered together by a second metal film. A first transparent insulating film is disposed between the slope and the second metal film.
    Type: Grant
    Filed: November 27, 2019
    Date of Patent: March 29, 2022
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Katsuji Iguchi, Takashi Kurisu, Masumi Maegawa
  • Patent number: 11282980
    Abstract: A method of fabricating a micro light emitting diode (micro LED) display substrate. The method includes forming a definition layer on a growth substrate for defining a plurality of subpixel areas, the definition layer formed to include a plurality of lateral walls, each of the plurality of subpixel areas surrounded by a respective one of the plurality of lateral walls; forming a plurality of semiconductor layers of a plurality of micro LEDs on the growth substrate in the plurality of subpixel areas defined by the definition layer; transferring the plurality of semiconductor layers of the plurality of micro LEDs on the growth substrate onto a target substrate; and removing the growth substrate from the plurality of semiconductor layers of the plurality of micro LEDs transferred onto the target substrate.
    Type: Grant
    Filed: November 26, 2018
    Date of Patent: March 22, 2022
    Assignee: BOE Technology Group Co., Ltd.
    Inventor: Shuang Sun
  • Patent number: 11271054
    Abstract: An organic light emitting display device including a base layer; an insulating layer disposed on the base layer and including a flat region having a flat surface and a lens region having a concave or convex surface; a dam disposed on the insulating layer and defining an opening exposing the lens region; and a color filter disposed on the lens region of the insulating layer and filling the opening, The dam includes a sensing electrode.
    Type: Grant
    Filed: April 15, 2019
    Date of Patent: March 8, 2022
    Assignee: Samsung Display Co., Ltd.
    Inventors: Hyeon Bum Lee, Hyoeng Ki Kim, Jun Hyuk Woo, Kwang Woo Park
  • Patent number: 11258001
    Abstract: A semiconductor light-emitting element includes: a semiconductor stack including an n-type, layer and a p-type layer and having at least one n exposure portion being a recess where the n-type layer is exposed; a p wiring electrode layer on the p-type layer; an insulating layer (i) continuously covering inner lateral surfaces of at least one n exposure portion and part of a top surface of the p wiring electrode layer and (ii) having an opening portion that exposes the n-type layer; an n wiring electrode layer disposed above the p-type layer and the p wiring electrode layer and in contact with the n-type layer in the opening portion; and at least one first n connecting member connected to the n wiring electrode layer in at least one first n terminal region. The n wiring electrode layer and the p-type layer are disposed below at least one first n terminal region.
    Type: Grant
    Filed: December 23, 2020
    Date of Patent: February 22, 2022
    Assignee: NUVOTON TECHNOLOGY CORPORATION JAPAN
    Inventors: Yasutomo Mitsui, Yasumitsu Kunoh, Masanori Hiroki, Shigeo Hayashi, Masahiro Kume, Masanobu Nogome
  • Patent number: 11244990
    Abstract: Provided are a display control circuit and a driving method thereof, and a display panel and manufacturing and controlling methods thereof, in the field of display technology. The display control circuit includes: a driving sub-circuit configured to provide a control signal from the control signal terminal to the control node; a first switching sub-circuit configured to provide a data signal from the data signal terminal to the OLED; and a second switching sub-circuit configured to provide the data signal to the liquid crystal display unit. The first switching sub-circuit and the second switching sub-circuit operate at different periods of time.
    Type: Grant
    Filed: July 26, 2019
    Date of Patent: February 8, 2022
    Inventors: Qianqian Bu, Weipin Hu
  • Patent number: 11227806
    Abstract: An air cavity package includes a dielectric frame that is formed from an alumina ceramic, a polyimide, or a semi-crystalline thermoplastic. The dielectric frame is joined to a flange using a high temperature silicone adhesive. Leads may be bonded to the dielectric frame using a high temperature organic adhesive, a direct bond, or by brazing.
    Type: Grant
    Filed: May 9, 2017
    Date of Patent: January 18, 2022
    Assignee: Materion Corporation
    Inventors: Richard J. Koba, Chee Kong Lee, Wei Chuan Goh, Sin Yee Chin
  • Patent number: 11217681
    Abstract: Fabrication method and semiconductor device are provided. The method includes: providing a base substrate including a first region and a second region adjacent to the first region, with first fins disposed on the base substrate in the first region and on the base substrate in the second region, and initial openings disposed between adjacent first fins; forming sidewall spacers on sidewalls of the first fins to form openings from the initial openings; and forming the second fins in the openings of the second region.
    Type: Grant
    Filed: October 22, 2019
    Date of Patent: January 4, 2022
    Assignees: Semiconductor Manufacturing International (Shanghai) Corporation, Semiconductor Manufacturing International (Beijing) Corporation
    Inventor: Nan Wang
  • Patent number: 11217677
    Abstract: A semiconductor device includes a substrate having first and second active regions, first and second active patterns on the first and second active regions, first and second gate electrodes running across the first and second active patterns, and a high-k dielectric layer between the first active pattern and the first gate electrode and between the second active pattern and the second gate electrode. The first gate electrode includes a work function metal pattern and an electrode pattern. The second gate electrode includes a first work function metal pattern, a second work function metal pattern, and an electrode pattern. The first work function metal pattern contains the same impurity as that of the high-k dielectric layer. An impurity concentration of the first work function metal pattern of the second gate electrode is greater than that of the work function metal pattern of the first gate electrode.
    Type: Grant
    Filed: September 26, 2019
    Date of Patent: January 4, 2022
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Byounghoon Lee, Jongho Park, Wandon Kim, Sangjin Hyun
  • Patent number: 11211288
    Abstract: There is provided a semiconductor device including: a first wiring; a second wiring; a dielectric layer configured to insulate the first wiring and the second wiring from each other; and an impedance adjustment layer formed between the first wiring and the second wiring, and configured to adjust an impedance between the first wiring and the second wiring.
    Type: Grant
    Filed: September 6, 2018
    Date of Patent: December 28, 2021
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Hajime Nakabayashi, Koji Akiyama
  • Patent number: 11211441
    Abstract: An OLED device includes a substrate, a first active layer, a first gate electrode, a second gate electrode, first source and first drain electrodes, a first high dielectric constant (high-k) insulation structure, and a light emitting structure. The substrate has a first region and a second region. The first active layer is disposed in the first region on the substrate. The first gate electrode is disposed on the first active layer, and has a first thickness. The second gate electrode is disposed on the first gate electrode. The first source electrode and first drain electrode are disposed on the second gate electrode, and constitutes a first semiconductor element together with the first active layer and the first gate electrode. The first high-k insulation structure is disposed between the first gate electrode and the second gate electrode, and is spaced apart from the first source electrode and first drain electrode.
    Type: Grant
    Filed: November 26, 2018
    Date of Patent: December 28, 2021
    Assignee: Samsung Display Co., Ltd.
    Inventors: Yu-Gwang Jeong, Subin Bae, Joongeol Lee, Sanggab Kim
  • Patent number: 11205672
    Abstract: An image sensor includes a substrate including a plurality of pixel regions and one or more pairs of dummy pixel regions; a pixel separation structure between two adjacent pixel regions among the plurality of pixel regions and including a first conductive layer; a dummy pixel separation structure between the one or more pairs of dummy pixel regions, electrically connected to the pixel separation structure, and including a second conductive layer; and a pixel separation contact disposed on the dummy pixel separation structure.
    Type: Grant
    Filed: May 13, 2019
    Date of Patent: December 21, 2021
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Young-sun Oh, Hee-sang Kwon
  • Patent number: 11201114
    Abstract: Methods/structures of forming thin film resistors using interconnect liner materials are described. Those methods/structures may include forming a first liner in a first trench, wherein the first trench is disposed in a dielectric layer that is disposed on a substrate. Forming a second liner in a second trench, wherein the second trench is adjacent the first trench, forming an interconnect material on the first liner in the first trench, adjusting a resistance value of the second liner, forming a first contact structure on a top surface of the interconnect material, and forming a second contact structure on the second liner.
    Type: Grant
    Filed: December 29, 2016
    Date of Patent: December 14, 2021
    Assignee: Intel Corporation
    Inventors: Kevin Lin, Christopher J. Jezewski, Richard F. Vreeland, Tristan A. Tronic