Patents Examined by Suresh Memula
  • Patent number: 10447346
    Abstract: An inverter includes a pulse generator configured to generate a reference pulse signal having a first frequency; and a gate signal generator configured to apply a pulse width modulation control having a variable duty rate, based on a second frequency, to the reference pulse signal to generate a gate signal.
    Type: Grant
    Filed: July 19, 2017
    Date of Patent: October 15, 2019
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Tae Seok Ko, Young Su Jang
  • Patent number: 10446890
    Abstract: A power storage module includes: a battery block group including a plurality of battery cells; a connecting terminal portion joined to terminal surfaces of the plurality of battery cells; and a heat conductive material arranged in a manner contacting the connecting terminal portion. The heat conductive material includes at least any member of a plurality of interspersed members or a member having a clearance. The heat conductive materials are distributed more densely in a center portion of a region surrounded by an outermost peripheral edge of the battery block group than in peripheral portions surrounding the center portion in a plan view from a normal line direction of an arrangement surface of the heat conductive materials.
    Type: Grant
    Filed: December 11, 2015
    Date of Patent: October 15, 2019
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Naotake Yoshida, Tsutomu Aoyama, Tatsuya Adachi, Hiroaki Ono, Noritsugu Yoshizawa
  • Patent number: 10430547
    Abstract: A universal circuit design environment that designs universal circuits that can be applied to a variety of applications is disclosed. The system cross-references attribute requirements of each contemplated application against components to select application set components that are used to populate the universal design circuit environment for use in a universal circuit design. The set components are capable of satisfying every resolvable attribute requirement of the variety of applications, and the universal circuit may be designed with specialized inputs to set some attributes of the universal circuit. Preferably, the footprint of each set component and universal circuit is preserved between versions to allow for optimized updating between component versions.
    Type: Grant
    Filed: January 8, 2018
    Date of Patent: October 1, 2019
    Assignee: Oracle International Corporation
    Inventors: Jerome Gentillet, Harshad Desai, David Scott Green
  • Patent number: 10430540
    Abstract: Disclosed approaches include inputting a block diagram representation of a circuit design to a processor. Respective high-level programming language (HLL) code fragments associated with each block of the block diagram representation are determined. A dependency graph is generated from the block diagram representation. One or more clusters of vertices are generated from the dependency graph. Each of the HLL code fragments represented by the vertices of each cluster includes a for-loop, and each cluster includes a subset of the plurality of vertices and edges. For each of the clusters, a plurality of for-loops of the HLL code fragments associated with blocks represented by the vertices of the cluster are combined into a single for-loop. An HLL function is generated from each single for-loop and the HLL code fragments associated with each block that is not represented by any of the one or more clusters.
    Type: Grant
    Filed: January 25, 2018
    Date of Patent: October 1, 2019
    Assignee: XILINX, INC.
    Inventor: David Van Campenhout
  • Patent number: 10423074
    Abstract: A method for calculating the parameters of a resist model of an IC manufacturing process is provided. Accordingly, a function representative of the target design convoluted throughout the whole target design with a kernel function compounded with a deformation function with a shift angle. The deformation function is replaced by its Fourier series development, the order of which is selected so that the product of convolution is invariant through rotations within a tolerance of the corrections to be applied to the target design. Alternatively, the product of convolution may be decomposed into basic kernel functions selected varying by angles determined so that a deformation function for a value of the shift angle can be projected onto a couple of basic kernel functions the angles of which are proximate to the shift angle.
    Type: Grant
    Filed: June 2, 2015
    Date of Patent: September 24, 2019
    Assignees: ASELTA NANOGRAPHICS, COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventors: Mohamed Saïb, Aurélien Fay, Patrick Schiavone, Thiago Figueiro
  • Patent number: 10419001
    Abstract: A look up table (LUT) includes a decoder configured to decode input signals and to output decoded signals, a storage unit including a plurality of magnetic elements an being configured to select one or more of the plurality of magnetic elements in response to the decoded signals and a signal input/output (TO) unit configured to output an output signal corresponding to the selected one or more magnetic elements and to program the selected one or more magnetic elements by receiving a write signal.
    Type: Grant
    Filed: November 2, 2017
    Date of Patent: September 17, 2019
    Assignees: SK Hynix Inc., Industry-Academic Cooperation Foundation Yonsei University
    Inventors: Kangwook Jo, Jeongbin Kim, Minyoung Im, Taehee You, Eui-Young Chung, Hongil Yoon
  • Patent number: 10394997
    Abstract: A method for designing a system on a target device includes generating a solution for the system. A solution for a module of the system identified by a user is preserved. The preserved solution for the module is implemented at a location on the target device identified by the user.
    Type: Grant
    Filed: September 18, 2018
    Date of Patent: August 27, 2019
    Assignee: Altera Corporation
    Inventors: Mark Stephen Wheeler, Gordon Raymond Chiu
  • Patent number: 10387602
    Abstract: A method for generating masks for manufacturing of a semiconductor structure comprises the following steps. A design pattern for features to be formed on a substrate is divided into a first set of patterns and a second set of patterns. The first set of patterns comprises a first pattern corresponding to a first feature, the second set of patterns comprises two second patterns corresponding to two second features, and the first feature will be arranged between the two second features when the features are formed on a substrate. Two assist feature patterns are added into the first set of patterns. The two assist feature patterns are arranged in locations corresponding to the two second features, respectively. A first mask is generated based on the first set of patterns with the assist feature patterns. A second mask is generated based on the second set of patterns.
    Type: Grant
    Filed: January 25, 2018
    Date of Patent: August 20, 2019
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Tsung-Yeh Wu, Chia-Wei Huang, Yung-Feng Cheng
  • Patent number: 10374249
    Abstract: A rechargeable battery includes an electrode assembly including a first electrode, a second electrode, and a separator, the first electrode and the second electrode being wound with the separator therebetween, and a case to receive the electrode assembly, wherein the first electrode includes a first tab part having a first coating region and a plurality of first uncoated tabs protruding out of the first coating region, the first coating region being coated with a first active material, and the plurality of first uncoated tabs not being coated with the first active material, and a first non-tab part connected to the first tab part, the first non-tab part wrapping the first tab part at an outermost portion thereof at least one time.
    Type: Grant
    Filed: July 19, 2017
    Date of Patent: August 6, 2019
    Assignee: SAMSUNG SDI CO., LTD.
    Inventors: Young Chang Lim, Kyung Kim, Wonseok Kim, Sangheon Lee, Jandee Kim, Kyeongyi Heo
  • Patent number: 10363825
    Abstract: The present invention relates to a method, a battery management system and a vehicle for charging awakening. The battery management system includes a wake-up module, used for generating a wake-up signal when the battery management system is in a dormant or power-off state and an external charging plug is connected with a charging interface; and a power management module, used for conducting a power supply circuit between a battery module and a preset function module in the battery management system when receiving the wake-up signal. According to the system for charging wake-up provided by the present invention, the battery management system is automatically woken up when the external charging plug is accessed to charge the vehicle, so the battery management system automatically enters a normal working state from the power-off state or the dormant state.
    Type: Grant
    Filed: May 16, 2017
    Date of Patent: July 30, 2019
    Assignee: BORGWARD TRADEMARK HOLDINGS GMBH
    Inventors: Hang Rao, Zhongmin Wang
  • Patent number: 10365327
    Abstract: Techniques facilitating determination and correction of physical circuit event related errors of a hardware design are provided. A system can comprise a memory that stores computer executable components and a processor that executes computer executable components stored in the memory. The computer executable components can comprise a simulation component that injects a fault into a latch and a combination of logic of an emulated hardware design. The fault can be a biased fault injection that can mimic an error caused by a physical circuit event error vulnerability. The computer executable components can also comprise an observation component that determines one or more paths of the emulated hardware design that are vulnerable to physical circuit event related errors based on the biased fault injection.
    Type: Grant
    Filed: October 18, 2017
    Date of Patent: July 30, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Pradip Bose, Alper Buyuktosunoglu, Schuyler Eldridge, Karthik V. Swaminathan, Yazhou Zu
  • Patent number: 10366192
    Abstract: Non-transitory computer-readable media to perform a method for designing a multiband filter. The method includes generating an initial circuit structure comprising a desired number and type of circuit elements; generating an initial circuit design by mapping the frequency response requirements of the initial circuit structure into normalized space; generating an acoustic filter circuit design by transferring the initial filter circuit design; generating a pre-optimized circuit design by unmapping one or more circuit elements of the acoustic filter circuit design into real space and introducing parasitic effects; and communicating the pre-optimized circuit design to a filter optimizer that generates a final circuit design comprising a plurality of resonators, wherein a first resonator exhibits a high resonant frequency, a second resonator demonstrates a low resonant frequency and the difference between the low resonant frequency and the high resonant frequency is at least 1.
    Type: Grant
    Filed: November 13, 2018
    Date of Patent: July 30, 2019
    Assignee: Resonant Inc.
    Inventors: Patrick J. Turner, Richard N. Silver, Balam Quitze Andres Willemsen Cortes, Kurt F. Raihn, Neal O. Fenzi, Robert B. Hammond
  • Patent number: 10367372
    Abstract: A tracking device (100) comprises a power module (102) and a tracking operations module (104). The power module (102) includes two electrical power storage cells in the form of a super-capacitor (110) and a rechargeable battery (112); an energy harvester (106) for generating electrical power to charge the electrical power storage cells (110, 112) and a power management controller (108) arranged to control charging of the first (110) and second (112) power storage cells. The tracking operations module (104) includes a GPS module (122, 124) for receiving data about a location of the tracking device (100); a GSM module (126, 128) for transmitting the data about the location of the tracking device (100); a motion sensor (136); and processing means (118) arranged to: detect movement of the device (100) based on an output of the motion sensor (136); and manage receipt and transmission of the data about the location of the tracking device (100).
    Type: Grant
    Filed: December 24, 2015
    Date of Patent: July 30, 2019
    Assignee: Passive Eye Limited
    Inventors: Jingjing Huang, Brian Jerome Rush
  • Patent number: 10360335
    Abstract: Methods of planning network provisioning that incorporate real-world measurements of signal quality into simulations of signal quality under alternative configurations. In one embodiment, the disclosure includes a method of determining placements for access points in a wireless network, comprising ingesting a floor plan for a deployment site, determining initial placements for the access points, determining placements for sensors, each sensor configured to wirelessly communicate with at least one access point, measuring a signal metric for each sensor, based at least in part on the measured signal metric for each of the sensors, simulating a projected coverage map for a plurality of alternate placements for the access points, determining an placement of the access points, and presenting, to a user, the placement of the plurality of access points.
    Type: Grant
    Filed: August 28, 2017
    Date of Patent: July 23, 2019
    Assignee: Tempo Communications, Inc.
    Inventors: William Thomas Morgan Kasch, Mark G. Barmettler
  • Patent number: 10361581
    Abstract: Certain aspects of the present disclosure relate to methods and apparatus for limiting the power drawn by a battery charger based on monitoring of the input voltage and input current supplied to the battery charger from a power supply. In certain aspects, a method generally includes sensing an output voltage of the power supply, wherein the output voltage of the power supply is variable. The method further includes sensing an output current of the power supply. The method further includes providing the output voltage and output current to a battery charger. The method further includes generating a control signal indicative of a scaling of the output current based on a scaling factor, wherein the scaling factor is based on the output voltage. The method further includes providing the control signal to the battery charger to control the output current supplied by the power supply to the battery charger.
    Type: Grant
    Filed: July 18, 2017
    Date of Patent: July 23, 2019
    Assignee: QUALCOMM Incorporated
    Inventors: Joseph Maalouf, Sumukh Shevde, Curtis Gong, Christian Sporck, Cheong Kun
  • Patent number: 10360336
    Abstract: A method of developing a physical design layout of microfluidic system chip can include receiving a planarized graph of a netlist including vertices representing microfluidic components. The vertices can be expanded into components, where each component includes a first dimension and a second dimension. The components can be shifted to a position where the first and second dimension of each component do not overlap with the first dimension and the second dimension of any other component. A flow route can be determined based on the first and second dimension of each component and the position of each component, the flow route including channels connecting two or more of the components.
    Type: Grant
    Filed: October 26, 2017
    Date of Patent: July 23, 2019
    Assignee: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: Philip Brisk, Brian Crites, Jeffrey McDaniel
  • Patent number: 10355508
    Abstract: A battery management method includes recording output information associated with a discharging of a battery unit, determining output pattern information based on the recorded output information, determining an adjusted cutoff physical quantity of the battery unit based on the determined output pattern information, and changing a cutoff physical quantity of the battery unit to the adjusted cutoff physical quantity.
    Type: Grant
    Filed: May 16, 2017
    Date of Patent: July 16, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Sun-Jae Lee
  • Patent number: 10346575
    Abstract: Systems and techniques are described for transparently editing physical data in hierarchical IC designs. Some embodiments allow a user to access objects at any level of the physical hierarchy and to specify a particular editing operation (move, rotate, delete, cut, split, etc.) relative to the top-level block. The embodiments can automatically transform and apply the editing operations in the context of the block where the edited object resides. Systems and techniques for automatic context selection, logical connection analysis, cross hierarchical routing, transparent hierarchical routing, and maintaining physical connectivity across hierarchy boundaries are also described.
    Type: Grant
    Filed: January 23, 2018
    Date of Patent: July 9, 2019
    Assignee: Synopsys, Inc.
    Inventors: Karlo Tskitishvili, Jeffrey J. Loescher, Luis D. Guilin, Paul M. Furnanz
  • Patent number: 10348102
    Abstract: An energy module includes a capacitance-based power source structure, charging circuitry, a DC-to-DC conversion system, and an energy control module. The capacitance-based power source structure is operable to supply a voltage when the energy module is in a voltage supply mode, wherein, when substantially fully charged, the voltage is at least 48 volts and to receive a charge when the energy module is in a charge mode. The charging circuitry is operable to provide a regulated charge voltage to the capacitance-based power source structure when the energy module is in the charge mode. The DC-to-DC conversion system is operable to convert the voltage into one or more regulated supply voltages when the energy module is in the voltage supply mode. The energy control module is operable to determine the voltage supply mode and the charge mode.
    Type: Grant
    Filed: August 19, 2015
    Date of Patent: July 9, 2019
    Inventors: Walter Lee Davis, Timothy W. Markison
  • Patent number: 10333335
    Abstract: A wireless charger output protection system and method is provided for protecting a battery in an electric vehicle during wireless charging. A wireless power transfer system includes a wireless charger on the electric vehicle side that receives power wirelessly from a charging base. The wireless charger output protection system and method shuts down the wireless charger output and dumps energy in a receive antenna (e.g., a vehicle pad) when a charging error is detected before the charging base can be shut down. The system and method employs a zero-voltage switching (ZVS) scheme to shut down the wireless charger output, in response to the charging error, to protect the switching devices and enhance overall reliability.
    Type: Grant
    Filed: October 27, 2017
    Date of Patent: June 25, 2019
    Assignee: Lear Corporation
    Inventors: Steven Cong, David A. Hein, Ryan Cleveland, Eric Salem