Patents Examined by T. Dinh
  • Patent number: 12243729
    Abstract: A member for semiconductor manufacturing apparatus includes: an upper plate that has a wafer placement surface, contains no electrode, and is a ceramic material plate; an intermediate plate that is provided on a surface of the upper plate, opposite to the wafer placement surface, that is used as an electrostatic electrode, and that is a conductive material plate; and a lower plate that is joined to a surface of the intermediate plate, opposite to the surface on which the upper plate is provided, and that is a ceramic material plate.
    Type: Grant
    Filed: December 23, 2022
    Date of Patent: March 4, 2025
    Assignee: NGK INSULATORS, LTD.
    Inventors: Hiroshi Takebayashi, Joyo Ito
  • Patent number: 12243585
    Abstract: An example described herein is a circuit including a dynamic complementary metal-oxide-semiconductor (CMOS) inverter level translator circuit and a capacitor. The dynamic CMOS inverter level translator circuit is electrically connected to a first power domain and has a first input node configured to receive a first trigger signal generated in the first power domain. The dynamic CMOS inverter level translator circuit has a second input node configured to receive a second trigger signal generated in a second power domain different from the first power domain. The capacitor is electrically coupled to an output node of the dynamic CMOS inverter level translator circuit. The capacitor selectively charges to the first power domain through the dynamic CMOS inverter level translator circuit based on the first trigger signal. The capacitor selectively discharges to provide a negative coupling voltage to a write assist supply node.
    Type: Grant
    Filed: February 14, 2023
    Date of Patent: March 4, 2025
    Assignee: Synopsys, Inc.
    Inventors: M Sultan M Siddiqui, Md Amir Arif, Tejaswini Saini, Sudhir Kumar, Ravindra Shrivastava
  • Patent number: 12238864
    Abstract: An electronic apparatus including a compression molding board and a connection pad is provided. The compression molding board has a device bonding area and a bending area formed by compression molding. The device bonding area is different from the bending area. The connection pad is disposed on the device bonding area of the compression molding board.
    Type: Grant
    Filed: March 24, 2022
    Date of Patent: February 25, 2025
    Assignee: Industrial Technology Research Institute
    Inventors: Yu-Lin Hsu, Kuan-Chu Wu, Ting-Yu Ke, Min-Hsiung Liang, Yu-Ming Peng
  • Patent number: 12237044
    Abstract: A first impedance calibration part configured to perform a first impedance calibration operation of generating a first impedance calibration code set for adjusting an impedance of a first terminating resistor to a first target value, with reference to an external resistor having a first resistance value. A second impedance calibration part configured to perform a second impedance calibration operation of generating a second impedance calibration code set for adjusting an impedance of a second terminating resistor to a second target value, with reference to a reference resistance unit, a resistance value of which is set to a second resistance value according to a part of the first impedance calibration code set.
    Type: Grant
    Filed: March 20, 2023
    Date of Patent: February 25, 2025
    Assignee: SK hynix Inc.
    Inventor: In Soo Lee
  • Patent number: 12238857
    Abstract: An electronic control device includes a plurality of drive control components and a substrate. The plurality of drive control components are grouped into systems. Each of systems is configured to control a control target independently. The substrate is divided into areas, corresponding to the systems, on which at least a part of the drive control components is mounted by each of the systems, and has layers stacked.
    Type: Grant
    Filed: March 31, 2022
    Date of Patent: February 25, 2025
    Assignee: DENSO CORPORATION
    Inventor: Tsuyoshi Tashima
  • Patent number: 12236115
    Abstract: A flash memory controller for controlling a flash memory module includes a communication interface for receiving a first data and a second data; and a processing circuit for dynamically controlling a data writing mode of the flash memory module according to an amount of stored data in the flash memory module. If the amount of stored data in the flash memory module is less than a first threshold when the communication interface receives the first data, the processing circuit controls the flash memory module so that the first data is written into the first data block under an one-bit-per-cell mode. If the amount of stored data in the flash memory module is greater than the first threshold when the communication interface receives the second data, the processing circuit controls the flash memory module so that the second data is written into the second data block under a two-bit-per-cell mode.
    Type: Grant
    Filed: January 15, 2024
    Date of Patent: February 25, 2025
    Assignee: Silicon Motion, Inc.
    Inventors: Tsung-Chieh Yang, Chun-Chieh Kuo, Ching-Hui Lin, Yang-Chih Shen
  • Patent number: 12237018
    Abstract: A method includes receiving signaling indicative of performance of a sanitization operation to a processing device coupled to a memory device and applying a sanitization voltage to a plurality of memory blocks of the memory device. The sanitization voltage can be greater than an erase voltage of the plurality of memory blocks.
    Type: Grant
    Filed: November 3, 2023
    Date of Patent: February 25, 2025
    Assignee: Micron Technology, Inc.
    Inventors: Eric N. Lee, Robert W. Strong, William Akin, Jeremy Binfet
  • Patent number: 12232267
    Abstract: An electronics assembly, includes obtaining or producing an electronics module, which includes a first circuitry on a first surface at a first side of a circuit board, at least one electronics component on the circuit board in electrical connection with the first circuitry, and at least one first connection portion on the first surface and/or an adjacent side surface at a peripheral portion of the circuit board, wherein the at least one first connection portion is electrically connected to or comprised in the first circuitry. The electronics assembly further includes arranging the electronics module on a second substrate including a second connection portion connected to a second circuitry on a surface of the second substrate and arranging electrically conductive joint material onto the first and second connection portions to extend between them for electrically connecting the electronics module to the second circuitry.
    Type: Grant
    Filed: March 19, 2024
    Date of Patent: February 18, 2025
    Assignee: TACTOTEK OY
    Inventors: Vinski Bräysy, Ilpo Hänninen, Pälvi Apilo, Mikko Heikkinen, Topi Wuori, Mikko Sippari, Heikki Alamäki
  • Patent number: 12232415
    Abstract: A composition comprising an electron acceptor material and an electron donor material wherein the electron acceptor material is a compound of formula (I): EAG-EDG-EAG (I) wherein each EAG is an electron-accepting group and EDG is a group of formula (II): (II) wherein: n is at least 1; each m is independently 0 or at least 1; each X, Y and A is independently O, S or Se; Z, independently in each occurrence if n is greater than 1, is O, S, C?O or NR9 wherein R9 is H or a substituent; and R1-R8 are each independently selected from H or a substituent. The composition may be used as photosensitive organic layer of an organic photodetector.
    Type: Grant
    Filed: October 23, 2020
    Date of Patent: February 18, 2025
    Assignee: Sumitomo Chemical Co., Ltd.
    Inventor: Kiran Kamtekar
  • Patent number: 12229450
    Abstract: A semiconductor memory device comprises: a first pad receiving a first signal; a second pad receiving a second signal; a first memory cell array; a first sense amplifier connected to the first memory cell array; a first data register connected to the first sense amplifier and configured to store user data read from the first memory cell array; and a control circuit configured to execute an operation targeting the first memory cell array. The first memory cell array comprises a plurality of first memory strings. The first memory strings each comprise a plurality of first memory cell transistors. In a first mode of this semiconductor memory device, a command set instructing the operation is inputted via the first pad. In a second mode of this semiconductor memory device, the command set is inputted via the second pad.
    Type: Grant
    Filed: November 30, 2023
    Date of Patent: February 18, 2025
    Assignee: KIOXIA CORPORATION
    Inventors: Akio Sugahara, Zhao Lu, Takehisa Kurosawa, Yuji Nagai
  • Patent number: 12232226
    Abstract: An extensible mast according to the present disclosure includes a first fiber layer made of a fiber-reinforced plastic, a second fiber layer that is arranged in contact with the first fiber layer and made of a fiber-reinforced plastic having a thermal expansion coefficient in a longitudinal direction larger than a thermal expansion coefficient in the longitudinal direction of the fiber-reinforced plastic applied to the first fiber layer, and an electric heating wire arranged on the second fiber layer. The number of times of overlapping of the electric heating wire in different layers when the first fiber layer, the second fiber layer, and the electric heating wire are wound and retracted in a roll shape is minimized. Thus, the elastic restoring force of the extensible mast can be maintained while an increase in weight and volume is suppressed.
    Type: Grant
    Filed: August 3, 2020
    Date of Patent: February 18, 2025
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Kazunori Takagaki, Sohei Samejima, Kazushi Sekine
  • Patent number: 12230353
    Abstract: A bridge chip includes a first selection circuit, a second selection circuit, and a control circuit. The first selection circuit determines an output destination of input data and an input flag indicating whether the input data is valid or invalid based on a first selection signal. The second selection circuit determines an output destination of the input data and the input flag output from the first selection circuit based on a second selection signal. The control circuit generates the first selection signal and the second selection signal, and outputs the first selection signal and the second selection signal to the first selection circuit and the second selection circuit, respectively.
    Type: Grant
    Filed: March 3, 2023
    Date of Patent: February 18, 2025
    Inventor: Mikio Shiraishi
  • Patent number: 12231083
    Abstract: An electrical supply system has a carport appliance with a framework supporting a plurality of PV panels and a system controller having a PV inverter coupled to the PV panels of the carport appliance. The PV inverter is adapted to provide current to charge electrically powered vehicles, and has a regulated bus coupled to electrical apparatus providing surge capacity for the supply system. In one instance the system controller has an AC output to input of a distribution apparatus for a residence or a business.
    Type: Grant
    Filed: July 7, 2023
    Date of Patent: February 18, 2025
    Inventors: Antonia Ginsberg-Klemmt, Achim Ginsberg-Klemmt, Eric Bryant Cummings
  • Patent number: 12230622
    Abstract: An electronic device includes a main printed circuit board (PCB) assembly comprising a bottom PCB and a semiconductor package mounted on an upper surface of the bottom PCB. The semiconductor package includes a substrate and a semiconductor die mounted on a top surface of the substrate. The semiconductor die and the top surface of the substrate are encapsulated by a molding compound. A top PCB is mounted on the semiconductor package through first connecting elements.
    Type: Grant
    Filed: September 7, 2022
    Date of Patent: February 18, 2025
    Assignee: MEDIATEK INC.
    Inventors: Ya-Lun Yang, Wen-Chou Wu, Che-Hung Kuo
  • Patent number: 12232247
    Abstract: A circuit module includes: a multilayer board having a plurality of first through-holes each penetrating at least one layer thereof; a plurality of high frequency components disposed in the plurality of first through-holes, respectively; and a plurality of shield parts individually surrounding the plurality of high frequency components. The multilayer board has a second through-hole penetrating at least a layer in which each high frequency component is disposed. Each of the plurality of shield parts includes a first conductor, a second conductor, and a third conductor. The first conductor and the second conductor sandwich the high frequency component in a lamination direction of the multilayer board. The third conductor is disposed in the second through-hole.
    Type: Grant
    Filed: April 30, 2021
    Date of Patent: February 18, 2025
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventor: Noriyoshi Suda
  • Patent number: 12224692
    Abstract: An electric motor controller having fault detection comprises: a driver circuit configured to drive an electric motor in response to a received speed demand signal; a measurement circuit configured to measure current through windings of the electric motor, the measurement circuit comprising a back emf, BEMF, observer configured to determine an estimated BEMF value, a BEMF error threshold and an estimated rotor angular speed value from the measured currents; a detector circuit configured to receive the rotor speed demand signal, the estimated BEMF value, the BEMF error threshold, the estimated rotor angular speed value and a measured rotor speed from a rotor speed sensor on the electric motor and to detect a fault in the electric motor controller if the estimated BEMF value lies outside the BEMF error threshold and the measured rotor speed is within a defined rotor speed error threshold.
    Type: Grant
    Filed: November 28, 2022
    Date of Patent: February 11, 2025
    Assignee: NXP USA, Inc.
    Inventor: Matej Pacha
  • Patent number: 12225674
    Abstract: Provided is a foldable display device. The foldable display device includes a flexible display panel, a flexible cover plate and a flexible printed circuit. The flexible display panel includes a first foldable region and a first side edge. The first foldable region includes a first sub-region, and a part of the first side edge is a boundary of the first sub-region. The flexible cover plate is bonded to a first surface of the flexible display panel and includes a second foldable region. An orthographic projection of the second foldable region on the first surface is within the first foldable region, the second foldable region is bonded to the first foldable region, and the orthographic projection of the second foldable region on the first surface is not overlapped with the first sub-region.
    Type: Grant
    Filed: November 8, 2021
    Date of Patent: February 11, 2025
    Assignees: Chengdu BOE Optoelectronics Technology Co., Ltd., BOE Technology Group Co., Ltd.
    Inventors: Xuan Luo, Xiaoxia Huang, Ren Xiong, Bing Zhang
  • Patent number: 12225665
    Abstract: A circuit system and method of manufacturing a printed circuit board includes providing an integrated circuit package mounted on a first side of a printed circuit board and a power regulator connected to power terminals of the integrated circuit package through a cutout in the printed circuit board. The power regulator draws power from the printed circuit board by way of side pins around a periphery of the cutout.
    Type: Grant
    Filed: May 5, 2022
    Date of Patent: February 11, 2025
    Assignee: NVIDIA Corp.
    Inventors: MingYi Yu, Greg Bodi, Ananta Attaluri
  • Patent number: 12225743
    Abstract: A long-lasting and stable perovskite solar cell utilizes fluorine-containing inorganic ammonium salts to form ion exchange with perovskite to construct a perovskite light-absorbing layer to protect the perovskite, greatly improving stability of the perovskite solar cell. The perovskite solar cell can maintain 94% and 81% of its initial efficiency after being placed in a nitrogen-filled glove box and humid air for 14,016 hours and 2,500 hours, respectively, and can still maintain 83% of its initial efficiency after performed by heat aging at 85° C. for 1,248 hours, reaching a world-class level. A preparation method of the perovskite solar cell is simple, materials used to prepare the perovskite solar cell are inexpensive, and the stability of an obtained device is significantly improved under various conditions.
    Type: Grant
    Filed: August 29, 2024
    Date of Patent: February 11, 2025
    Assignee: Nanjing University of Posts & Telecommunications
    Inventors: Ligang Xu, Wenxuan Lv, Runfeng Chen, Wei Huang
  • Patent number: 12224576
    Abstract: Systems and methods corresponding to a downhole measurement tool to balance fault current in a protective inductor are disclosed herein. A triggerable network is provided which keeps an alternating current balanced in a protective choke during a phase-to-ground fault condition in a power cable or a downhole motor of an electrical submersible pump. The triggerable network causes a conducting of current during negative polarity voltage portion(s) of the phase-to-ground fault condition via a silicon-controlled rectifier having an anode and a cathode on a path of current conduction for the negative polarity voltage during the phase-to-ground fault condition and one or more Zener diodes, where an ending cathode of the one or more Zener diodes is coupled to a gate of the silicon-controlled rectifier and an ending anode of the one or more Zener diodes is coupled to the anode of the silicon-controlled rectifier.
    Type: Grant
    Filed: March 8, 2023
    Date of Patent: February 11, 2025
    Assignee: ChampionX LLC
    Inventor: Robert J. Schapper