Patents Examined by T. R. Sundaram
  • Patent number: 6417677
    Abstract: In an antistatic apparatus for a photomask including a conductive optical shield layer, at least two conductive pins are inserted into the photomask, so that the conductive pins are in contact with the conductive optical shield layer. Then, the photomask is set in a cassette of an electron beam exposure apparatus. Then, the conductive pins are electrically connected to the cassette by conductive plates. Thus, electrons charged at the conductive optical shield layer by electron beams are effectively discharged from the conductive pins to the cassette.
    Type: Grant
    Filed: June 26, 2000
    Date of Patent: July 9, 2002
    Assignee: NEC Corporation
    Inventor: Hiroshi Yamazaki
  • Patent number: 6417682
    Abstract: A calibration method for calibrating a semiconductor testing apparatus before mounting semiconductor devices for performing a testing of electric characteristics thereof, the testing apparatus having a driver which generates and outputs a signal, and a socket with a plurality of terminals for receiving pins and transferring signals therethrough. The calibration method includes mounting a test board having a plurality of pins onto the socket and connecting each of the pins of the test board with a respective terminal of the socket, transferring the signal of the driver to the terminals of the test board, detecting the signal of the driver that has reached the test board, and setting an output timing of the signal of the driver based on the signal detected.
    Type: Grant
    Filed: May 19, 1999
    Date of Patent: July 9, 2002
    Assignee: Advantest Corporation
    Inventors: Toshikazu Suzuki, Hiroyuki Nagai, Noriyoshi Kozuka, Yukio Ishigaki, Shigeru Matsumura, Takashi Sekizuka, Hiroyuki Shiotsuka, Hiroyuki Hama, Eiichi Sekine
  • Patent number: 6414504
    Abstract: A translator fixture for use in testing high frequency or high speed digital circuit boards. The fixture has a pin supporting top plate and base plate and coaxial constant impedance test pins incorporated into the fixture to provide a signal path from a test analyzer to the circuit board under test. The board under test is coupled to an upper surface of the top plate. The impedance of the coaxial pins is matched to the impedance of the board under test as well as the impedance of the test analyzer. Force exerted on the coaxial pins ensures contact of the pins with test points on the circuit board under test. The force may be exerted by spring loaded probes mounted on a compliant test interface below the base plate. The force may also be exerted by Euler buckling the pins by relative movement between the circuit board under test and a second circuit board coupled to the base plate or to the test analyzer.
    Type: Grant
    Filed: May 20, 1999
    Date of Patent: July 2, 2002
    Assignee: Delaware Capital Formation, Inc.
    Inventor: Charles J. Johnston
  • Patent number: 6414503
    Abstract: A magazine for carrying a plurality of multi-chip modules (MCMs) in association with an automated MCM handler for automated module testing. The magazine includes a body defining a plurality of mutually parallel receptacles extending between two opposing body sides, each body side having a different height relative to the height of the receptacles. Each receptacle is separated from an adjacent receptacle by a baffle member. At least one notch ins formed in each baffle member so as to form at least one row of aligned notches extending across and contiguous with each receptacle. The aligned row of notches is configured to receive an elongated element for effectively altering the length of each receptacle. At least one recess is formed in an underside of the magazine and transversely intersects each receptacle. The magazine may also include structure to accommodate vertical stacking of the magazine with a plurality of like magazines.
    Type: Grant
    Filed: November 29, 2000
    Date of Patent: July 2, 2002
    Assignee: Micron Technology, Inc.
    Inventors: Mark A Tverdy, William C. Layer, Lothar R. Kress, Eric M. Matthews
  • Patent number: 6411099
    Abstract: A composition of matter utilizes a pre-polarized (“poled” or previously subjected to a strong DC voltage with or without an external elevated temperature) step converting the matter into an electret state with long-lasting polarization (weeks/months/years) or into a ferroelectric state with permanent polarization. The dielectric replicate matching reference material is used to make a detection device component that triggers and maximizes, when the poled, pre-polarized material/component is subject to externally initiated spinning (set in rotary motion by the detection device's human operator), a dielectrokinesis (phoresis)-like phenomena (force, torque) in exactly the opposite manifestation of the operative mode of dielectrokinesis (phoresis) compared to that which occurs when the component and material are not pre-polarized (poled), both of which can be used to detect the presence of specific entities of a predetermined type that contain as a major component the matching dielectric material.
    Type: Grant
    Filed: March 29, 2000
    Date of Patent: June 25, 2002
    Assignee: DKL International, Inc.
    Inventor: Thomas L. Afilani
  • Patent number: 6404191
    Abstract: A plurality of magnetic field sensing structures in a monolithic integrated circuit chip structure to provide output signals at outputs thereof of magnetic field changes provided therein from corresponding sources having poled pair structures with a gap space between them with adjacent ones of the magnetic field sensing structures that are interconnected with a circuit formed in the monolithic integrated circuit chip such as an amplifier. The paired pole structures may intersect a surface of the chip perpendicular to the major surfaces thereof or in one of, or a surface parallel to, the major surfaces thereof. A magnetic field generating structure may also be included in the chip.
    Type: Grant
    Filed: March 22, 2001
    Date of Patent: June 11, 2002
    Assignee: NVE Corporation
    Inventors: James M. Daughton, Arthur V. Pohm
  • Patent number: 6404209
    Abstract: A measuring instrument (11) for fill level sensors (4) having a measuring electrode (6) and a compensating electrode (9). The measuring instrument (11) has a bridge circuit whose one bridge branch (21) is formed by two series-connected test resistors (23, 24). The other bridge branch (22) is formed by the measuring resistor (17) on the measuring electrode (6) and the compensating resistor (18) on the compensating electrode (9). Between the two bridge branches (21, 22) a diagonal line (26) with a test switch (27) is provided. The measuring instrument (11) is controlled by the control circuit (13) so that the diagonal line (26) is closed outside of preset test time periods, and interrupted at preset test time periods. The end of the diagonal line (26) located between the two test resistors (23, 24) is connected to the base potential (25) of the measuring circuit (12).
    Type: Grant
    Filed: June 20, 2000
    Date of Patent: June 11, 2002
    Assignee: Gestra GmbH
    Inventors: Juergen Klattenhoff, Guenter Schmitz, Holger Schroeter
  • Patent number: 6400160
    Abstract: A method and apparatus for determining EMI compliance provides a conductor that is mutually impedance coupled to an integrated circuit on a semiconductor package. The conductor is attached to a lid covering the integrated circuit and RF noise energy on the lid is mutually impedance coupled to the conductor. By measuring the voltage at the conductor, an indirect measurement of the EMI generated by the integrated circuit is made.
    Type: Grant
    Filed: June 22, 2000
    Date of Patent: June 4, 2002
    Assignee: Advanced Micro Devices, Inc.
    Inventor: Komarapalayam Velayudham Karikalan Sampath
  • Patent number: 6396289
    Abstract: A method and apparatus determines the output voltage of a power source necessary to produce a desired lamp voltage at an incandescent lamp remote therefrom using voltage and current measurements at the power source for a circuit including a series resistor and a circuit without the resistor. Estimated circuit resistances are determined according to an algorithm that calculates the power source output voltage necessary to produce a desired lamp voltage at the lamp.
    Type: Grant
    Filed: September 7, 1999
    Date of Patent: May 28, 2002
    Inventor: Jerry C. Schmitt
  • Patent number: 6396281
    Abstract: The present invention provides a work bench for holding electric wires. The work bench includes a generally vertical pillar and a head provided on the top of the pillar. The head includes a body having an upper surface on which electric wires may be hung. A stopper is provided at a front end of the body so as to prevent the electric wires from falling from the body and to enable the electric wire to be pulled out from the body along the stopper. A swingable member is provided on the body so that at least a portion of each electric wire is held between the body and the swingable member. The work bench can prevent the electric wire falling off the body and can store many kinds of electric wires in a compact way that improves work and space efficiency.
    Type: Grant
    Filed: June 14, 2000
    Date of Patent: May 28, 2002
    Assignee: Sumitomo Wiring Systems, Ltd.
    Inventor: Kohei Mitsuda
  • Patent number: 6396288
    Abstract: It is possible to generate a resonance mode such that a dielectric resonator (20) can be resonated and an electric field vector leaking out from the resonator (20) exists by arranging antennas (22a and 22b) for the resonator (20). When a sample (22) has dielectric anisotropy, the resonance frequency of the resonator (20) varies when the sample (25) or resonator (20) is rotated. The dielectric anisotropy of the sample (25) is found from the variance of the resonance frequency. Thus the dielectric anisotropy of not only a sheet-like sample, but also such a sample as a three-dimensional molded sample can be measured.
    Type: Grant
    Filed: September 8, 1999
    Date of Patent: May 28, 2002
    Assignee: Oji Paper Co., LTD
    Inventors: Shinichi Nagata, Seiichi Miyamoto, Fumiaki Okada
  • Patent number: 6392430
    Abstract: An interconnect apparatus for testing bare semiconductor dice comprises raised contact members on a semiconductive substrate. The contact members are covered with an insulation layer and a conductive cap connected by a conductive trace to a testing circuit. The trace is covered with coaxial layers of a silicon-containing insulation and a metal for shielding the trace from “crosstalk” and other interference. An apparatus for simultaneous testing of multiple dies on a wafer has thermal expansion characteristics matching those of the semiconductor die or wafer and provides clean signals.
    Type: Grant
    Filed: November 27, 2000
    Date of Patent: May 21, 2002
    Assignee: Micron Technology, Inc.
    Inventors: Salman Akram, David R. Hembree, Alan G. Wood
  • Patent number: 6392431
    Abstract: A thermoconductive module to control the temperature of a DUT including a top surface having an area and a topography comprising, in combination, a heat exchange surface for interfacing and engaging with the top surface of the DUT, a plurality of individually moveable elements arranged throughout the area of the top surface of the DUT for moving the heat exchange surface to contour the heat exchange surface to map the topography of the top surface of the DUT and means in thermal communication with the heat exchange surface for producing the heat transfer between the top surface of the DUT and the heat exchange surface.
    Type: Grant
    Filed: June 22, 1998
    Date of Patent: May 21, 2002
    Assignee: Aetrium, Inc.
    Inventor: Elmer R. Jones
  • Patent number: 6392396
    Abstract: A transient pulse generator, for generating high energy RF pulses for lightning testing electronic equipment, generates control pulses. An insulated gate bipolar junction transistor (IGBT) is coupled to the conducts in response to the control pulses. A first capacitor is coupled to an electrode of the IGBT and to a first voltage potential. A transformer has its primary coupled between the first capacitor and a second electrode of the IGBT such that when the IGBT is not conducting the first capacitor is charged to a difference between the first and second voltage potentials. When the IGBT is switched into conduction mode the first capacitor discharges across the primary of the transformer, resulting in generation of a pulse across the secondary of the transformer. A second capacitor is coupled between a third voltage potential and an injection core which provides magnetic coupling to the equipment to be tested. The second capacitor charges to substantially the third voltage potential between control pulses.
    Type: Grant
    Filed: June 13, 2000
    Date of Patent: May 21, 2002
    Assignee: Rockwell Collins, Inc.
    Inventor: Frederick B. Hubler
  • Patent number: 6388435
    Abstract: A method is described for measuring a plurality of line voltages using a measurement circuit, the method including the steps of reducing each line voltage over a first impedance; providing a second impedance between each of the reduced voltages and a measurement circuit common reference point; coupling the common reference point to a voltage line N using a third impedance; and determining line voltage values using measurements of the reduced voltages. The above-described method provides impedance between voltage line N and measurement electronics and thus prevents transient voltages from entering the measurement circuit.
    Type: Grant
    Filed: December 22, 1999
    Date of Patent: May 14, 2002
    Assignee: General Electric Company
    Inventor: Maurice J. Ouellette
  • Patent number: 6377055
    Abstract: An arc fault detector for detecting an arc fault in electric power lines includes a two stage arc sensor. The first stage is a current transformer designed for high sensitivity to arc faults but which may saturate and lose detection capability during arc currents at 75A and higher. The second arc fault sensor, which does not saturate, stage senses the voltage across the impedance of the primary of the current transformer, or senses the voltage across the resistance of a section of the load carrying bus which forms the connection through the detector device, or of both, during an arc fault.
    Type: Grant
    Filed: December 16, 1999
    Date of Patent: April 23, 2002
    Assignee: Pass & Seymour, Inc.
    Inventors: Bruce F. Macbeth, Thomas N. Packard
  • Patent number: 6377035
    Abstract: A method of detecting an abrupt variation in a periodic electrical quantity, where a criterion for the occurrence of the abrupt variation is formed from samples of the periodic quantity. To be able to carry out such a method in such a way that the abrupt variations in the periodic quantity can be detected with a high sensitivity, the periodic quantity is weighted in an FIR filter with a transfer function with a double zero position at the nominal frequency; the output signal of the FIR filter is monitored for whether it reaches a threshold indicating that an abrupt variation in the periodic quantity has occurred.
    Type: Grant
    Filed: December 1, 1998
    Date of Patent: April 23, 2002
    Assignee: Siemens AG
    Inventor: Andreas Jurisch
  • Patent number: 6373268
    Abstract: A test handling assembly for conjoined integrated circuit dies is disclosed. The assembly has a wafer prober system having a chuck. A panel stage is coupled to the chuck and conjoined integrated circuit dies are coupled to the panel stage. A contactor is provided to communicate with the conjoined integrated circuit dies and the wafer prober system. Other features are disclosed.
    Type: Grant
    Filed: May 10, 1999
    Date of Patent: April 16, 2002
    Assignee: Intel Corporation
    Inventors: Stewart O. Dunlap, Stephen E. Bastear, Gary M. Meszaros, Nasser M. Barabi, James E. Spooner
  • Patent number: 6369592
    Abstract: A handheld probe for testing and monitoring features and pads on circuit boards and other electrical components is provided. The handheld probe includes a probe base having a probe connected to any type of meter, instrument or display and the like. The probe is positioned at an angle away from the probe base and is held in its angled position with respect to the probe base by a probe holder and a probe clamp. Upper and lower cantilever springs are positioned within a hollowed portion of the probe base, and provide a spring return of the probe when a push button is released from its depressed position. A spacer is provided between the upper and lower cantilever springs.
    Type: Grant
    Filed: May 24, 1999
    Date of Patent: April 9, 2002
    Assignee: International Business Machines Corporation
    Inventors: Christopher J. Majka, Matthew Seward
  • Patent number: 6366099
    Abstract: Differential capacitance is sensed by charging two capacitors to a voltage equal in magnitude but opposite in polarity during a short sampling period and discharging them in parallel during the remaining longer period of a pulse repetition cycle. In the preferred embodiment, an operational amplifier converts the charge difference to a voltage output signal. In an embodiment suitable for transducers, high sensitivity and low noise performance is obtained because of the output signal provided by the sensor is directly proportional to the excitation voltage, the excitation frequency and the value of a feedback resistor. This embodiment is also useful for proximity sensing in the presence of moisture and other ionic conductors, because the charging pulse can be of a short duration, typically 100 ns or less.
    Type: Grant
    Filed: December 21, 1999
    Date of Patent: April 2, 2002
    Assignee: Conrad Technologies, Inc.
    Inventor: M. Mahadeva Reddi