Abstract: One of prepared types of agent characteristics types is set to an agent, and parameters used in agent operation are set for values associated with the set agent characteristic type, thereby causing the agent to operate according to the agent characteristic type. An agent script base contains a plurality of operation descriptions. In response to a command from the user, parameters used in the execution of the command are set for the above values. The parameters are preferably kept in a table. Then, one of the operation descriptions associated with the command is executed referring to the table. Setting a user's characteristic type causes the set agent characteristic type to be changed to one associated with the user's characteristic type.

Abstract: A computer network system includes a central software service site that operates with a customer interface through which a customer at a remote location can request service and receive updated executable code back from the service site. The customer interface provides a seamless front end across the different software platforms of the network. A customer initiates servicing of a program product by composing a service request through the front end, which provides a mechanism for the collection of information regarding the nature of the customer request. The front end permits the customer to specify a range of optional operations to be performed at the service site, including service research, requesting service, applying service, and installing fixes from the service site to the remote location.

Abstract: Constructing and simulating artificial neural networks and components thereof within a spreadsheet environment results in user friendly neural networks which do not require algorithmic based software in order to train or operate. Such neural networks can be easily cascaded to form complex neural networks and neural network systems, including neural networks capable of self-organizing so as to self-train within a spreadsheet, neural networks which train simultaneously within a spreadsheet, and neural networks capable of autonomously moving, monitoring, analyzing, and altering data within a spreadsheet. Neural networks can also be cascaded together in self training neural network form to achieve a device prototyping system.

Abstract: This invention relates to a fuzzy processor having an input X for at least a plurality of input variables X-i and an output U for one or more output results U-k, and including a fuzzyfication unit FU having an input coupled to the input X, a fuzzy rule processing unit RU having an input coupled to the output of the fuzzyfication unit FU, and a defuzzyfication unit DU having an input coupled to the output of the processing unit CU and an output coupled to said output U, wherein the output of the defuzzyfication unit DU is coupled to the input of the fuzzyfication unit FU and/or to the input of the processing unit RU.

Abstract: A method of handling processor to processor interrupt requests in a multiprocessing computer bus environment is described. This method allows a multiple-tiered, increasing priority, interrupt request scheme. This method also allows processor to processor directed interrupt requests, processor to one processor of a group of processors interrupt requests, and processor to all processors of a group of processors interrupt requests.

Abstract: A neural processor apparatus implements a neural network at a low cost and with high efficiency by simultaneously processing a plurality of neurons using the same synaptic inputs. Weight data is sequentially accessed from an external weight RAM memory to minimize space on the IC. The input data and weight data may be configured as either a single, high-resolution input or a plurality of inputs having a lower resolution, whereby the plurality of inputs are processed simultaneously. A dynamic approximation method is implemented using a minimal amount of circuitry to provide high-resolution transformations in accordance with the transfer function of a given neuron model. The neural processor apparatus may be used to implement an entire neural network, or may be implemented using a plurality of devices, each device implementing a predetermined number of neural layers.

Abstract: A data processing system and method for solving pattern classification problems and function-fitting problems includes a neural network in which N-dimensional input vectors are augmented with at least one element to form an N+j-dimensional projected input vector, whose magnitude is then preferably normalized to lie on the surface of a hypersphere. Weight vectors of at least a lowest intermediate layer of network nodes are preferably also constrained to lie on the N+j-dimensional surface.To train the network, the system compares network output values with known goal vectors, and an error function (which depends on all weights and threshold values of the intermediate and output nodes) is then minimized. In order to decrease the network's learning time even further, the weight vectors for the intermediate nodes are initially preferably set equal to known prototypes for the various classes of input vectors.

Abstract: A voice-based security system requires that a series of utterances to be uttered by the requester contain at least one repeated utterance. The system compares a representation of each instance of the repeated utterance as uttered by the requester to both a prestored template for the utterance and to each representation of the other instances of the utterance as uttered by said requester. The requester is authenticated only if each representation of the repeated utterance as uttered by said requester matches the prestored template and the representations of the repeated utterance as uttered by said requester do not match each other to such a high degree that they are deemed to have been mechanically generated.

Abstract: The process for detection and masking of bad frames in a coded speech signal resulting from channel transmission errors has been improved. The coded speech signal has a first group of bits comprising the most perceptually significant bits of the coded speech signal, a second group of bits comprising the second most perceptually significant bits and a third group of bits comprising the least perceptually significant bits. The coded speech signal is de-interleaved to obtain a first series of bits comprising the first and second group and a second series of bits comprising the third group of bits. The first series of bits are convolutionally decoded for recovering the first and second group of bits, with the first group of bits containing error protected bits. A CRC check is performed by sending the recovered bits of the first group to cyclic redundancy decoding means. The first group of bits is forwarded to speech decoder means if the CRC check is successful.

Abstract: A multiprocessor system includes a plurality of central subsystem (CSS) units, a plurality of memory units and input/output units which connect in common to a system bus for transferring requests between a pair of units on a priority basis defined by a distributed bus priority network included as part of the system bus. A private bus (P bus) connects all of the CSS units and memory units in common for high speed block data transfers. Each CSS unit includes input circuits which couple to the priority network for detecting when the system bus is in an idle state. P bus logic circuits couple to the P bus and generate a transfer request in response to a request from its CSS unit only when the P bus is detected to be in an idle state. The idle signals from both buses are used to generate a system bus request for P bus access only when both buses are in an idle state so as to eliminate the need to contend for system bus use.

Abstract: The present invention is directed to a programmable logic circuit used as an arbiter to control access to a shared resource, e.g. a system bus, by N devices in a computer system. The programmable arbiter according to the present invention, implements a logic design with sufficient flexibility to accommodate and selectively incorporate features of several different arbitration schemes including a straight priority scheme, a programmable arbitration, and a rotating priority arbitration scheme. In addition to these arbitration schemes, the arbiter of the present invention supports an extended programmable arbitration scheme whereby a device which is requesting access to the shared resource may be granted access to the resource even if it has used up its allocated share of bandwidth if there are no other devices requesting access to the shared resource. Furthermore, bus bandwidth may be allocated to particular device or to a group of devices at a particular priority level.

Abstract: A transform encoder, a transform decoder, and a transform encoder/decoder system utilize complex pre- and post-transform multiplication of input signal samples to implement concurrent application of a modified Discrete Cosine Transform and a modified Discrete Sine Transform according to the Evenly-Stacked Time Domain Aliasing Cancellation technique against two channels of input signal samples, and to reduce the computational complexity of a digital filter bank of a modified Discrete Cosine Transform.