Patents Examined by Tasnima Matin
  • Patent number: 9875187
    Abstract: A first operation associated with a request for a page miss handler may be identified. A second operation associated with a current execution of the page miss handler may also be identified. An age of the first operation and an age of the second operation may be determined. The page miss handler may be interrupted based on the age of the first operation and the age of the second operation by stopping the current execution of the page miss handler for the second operation and starting execution of the page miss handler for the first operation.
    Type: Grant
    Filed: December 10, 2014
    Date of Patent: January 23, 2018
    Assignee: Intel Corporation
    Inventors: Christopher D. Bryant, Stephen J. Robinson
  • Patent number: 9852073
    Abstract: In one embodiment, a computing system includes a cache and a cache manager. The cache manager is able to receive data, write the data to a first portion of the cache, write the data to a second portion of the cache, and delete the data from the second portion of the cache when the data in the first portion of the cache is flushed.
    Type: Grant
    Filed: August 7, 2012
    Date of Patent: December 26, 2017
    Assignee: DELL PRODUCTS L.P.
    Inventors: Scott David Peterson, Phillip E. Krueger
  • Patent number: 9841912
    Abstract: A first tree data structure is used to track an allocation state for each block included in a first set of storage blocks. Upper level nodes in a given tree present the allocation state of connected lower level nodes in the given tree, such that each allocation state indicates whether any associated storage blocks are free. A second tree data structure is used to track an allocation state for each block included in a second set of storage blocks. The first tree data structure and the second tree data structure each have a number of leaf nodes corresponding to a maximum number of blocks that can be included in a superset of storage blocks, wherein the first set of storage blocks and second set of storage blocks are included in the superset of storage blocks.
    Type: Grant
    Filed: December 18, 2015
    Date of Patent: December 12, 2017
    Assignee: EMC IP Holding Company LLC
    Inventor: Shuang Liang
  • Patent number: 9830097
    Abstract: A method, a computing device, and a non-transitory machine-readable medium for identifying a set of transactions directed to a contiguous chunk of data, even if received out of order, determining the data chunk size from the set of transactions, and for sequentially retrieving data chunks using the data chunk size is provided. In some embodiments, the method includes receiving, by a storage system, a set of data transactions from an initiator. The storage system identifies a subset of the set of data transactions that is directed to accessing a first chunk of data and determines, from the subset of transactions, a chunk size of the first chunk of data. The storage system sequentially retrieves a second chunk of data based on the determined chunk size.
    Type: Grant
    Filed: February 12, 2016
    Date of Patent: November 28, 2017
    Assignee: NetApp, Inc.
    Inventors: Sai Susarla, Sandeep Ummadi
  • Patent number: 9823846
    Abstract: Systems and methods are disclosed for expanding memory for a system on chip (SoC). A memory card is loaded in an expandable memory socket electrically and is coupled to a system on chip (SoC) via an expansion bus. The memory card comprises a first volatile memory device. In response to detecting the memory card, an expanded virtual memory map is configured. The expanded virtual memory map comprises a first virtual memory space associated the first volatile memory device and a second virtual memory space associated with a second volatile memory device electrically coupled to the SoC via a memory bus. One or more peripheral images associated with the second virtual memory space are relocated to a first portion of the first virtual memory space. A second portion of the first virtual memory space is configured as a block device for performing swap operations associated with the second virtual memory space.
    Type: Grant
    Filed: August 20, 2014
    Date of Patent: November 21, 2017
    Assignee: QUALCOMM Incorporated
    Inventors: Dexter Tamio Chun, Suryanarayana China Chittuluri, Yanru Li
  • Patent number: 9811284
    Abstract: A method for data storage includes preparing first data having a first size for storage in a memory device that stores data having a nominal size larger than the first size, by programming a group of memory cells to multiple predefined levels using a one-pass program-and-verify scheme. The first data is combined with dummy data to produce first combined data having the nominal size, and is sent to the memory device for storage in the group. The dummy data is chosen to limit the levels to which the memory cells in the group are programmed to a partial subset of the predefined levels. In response to identifying second data to be stored in the group, the second data is combined with the first data to obtain second combined data having the nominal size, and is sent to the memory device for storage, in place, in the group.
    Type: Grant
    Filed: December 20, 2015
    Date of Patent: November 7, 2017
    Assignee: APPLE INC.
    Inventors: Charan Srinivasan, Eyal Gurgi
  • Patent number: 9811261
    Abstract: A processing device determines configuration data associated with a device. The processing device analyzes the configuration data with respect to storage usage data collected over a previous time period. The processing device determines a maximum amount of storage space of a storage component for the device that is predicted to be written to in a future time period. The processing device determines a free space buffer threshold for a free space buffer of the storage component to be greater than the maximum amount of storage space that is predicted to be written to in the future time period.
    Type: Grant
    Filed: September 13, 2015
    Date of Patent: November 7, 2017
    Assignee: Amazon Technologies, Inc.
    Inventors: Ishwar VenkataManikanda Ramani, Michael Wendling, Mridula Karumuru, James Robert Wright
  • Patent number: 9798665
    Abstract: A method that may include determining, for each user of a group of users, a time difference between an event of a first type that is related to a storage of a user data unit of the user within a cache of a storage system and to an eviction of the user data unit from the cache, in response to (a) a service-level agreement (SLA) associated with the user and to (b) multiple data hit ratios associated with multiple different values of a time difference between events of the first type and evictions, from the cache, of multiple user data units of the user; and evicting from the cache, based upon the determination, one or more user data units associated with one or more users of the group.
    Type: Grant
    Filed: December 20, 2015
    Date of Patent: October 24, 2017
    Assignee: INFINIDAT LTD.
    Inventor: Yechiel Yochai
  • Patent number: 9798471
    Abstract: Embodiments of the present invention relate to a method and apparatus for improving performance of a de-clustered disk array by making statistics on a number and types of active input/output (I/O) requests of each of the plurality of physical disks; dividing the plurality of physical disks at least into a first schedule group and a second schedule group based on the statistic number and types of the active I/O requests of the each physical disk for a predetermined time period, the first schedule group having a first schedule priority, the second schedule group having a second schedule priority higher than the first schedule priority; and selecting, in a decreasing order of the schedule priority, a physical disk for schedule from one of the resulting schedule groups thereby preventing too many I/O requests from concentrating on some physical disks and thereby improve overall performance of a de-clustered RAID.
    Type: Grant
    Filed: September 28, 2015
    Date of Patent: October 24, 2017
    Assignee: EMC IP Holding Compnay LLC
    Inventors: Alan Zhongjie Wu, Colin Yong Zou, Chris Zirui Liu, Fei Wang, Zhengli Yi
  • Patent number: 9778856
    Abstract: The subject disclosure is directed towards one or more parallel storage components for parallelizing block-level input/output associated with remote file data. Based upon a mapping scheme, the file data is partitioned into a plurality of blocks in which each may be equal in size. A translator component of the parallel storage may determine a mapping between the plurality of blocks and a plurality of storage nodes such that at least a portion of the plurality of blocks is accessible in parallel. Such a mapping, for example, may place each block in a different storage node allowing the plurality of blocks to be retrieved simultaneously and in its entirety.
    Type: Grant
    Filed: August 30, 2012
    Date of Patent: October 3, 2017
    Assignee: MICROSOFT TECHNOLOGY LICENSING, LLC
    Inventors: Bin Fan, Asim Kadav, Edmund Bernard Nightingale, Jeremy E. Elson, Richard F. Rashid, James W. Mickens
  • Patent number: 9760283
    Abstract: Systems and methods for managing sparsely updated counters in memory include, for a given interval of time and N counters associated with the given interval, managing a first set of the N counters in a first level of storage in the memory, wherein the first level of storage utilizes a hash table to store a counter identifier and a value for each of the first set; and responsive to filling up the first level of storage for a given user in the given interval, managing the first set and a second set of the N counters in a second level of storage in the memory, wherein the set utilizes memory buckets to incrementally store the first set and the second set.
    Type: Grant
    Filed: September 28, 2015
    Date of Patent: September 12, 2017
    Assignee: Zscaler, Inc.
    Inventors: Satish Kalipatnapu, Sushil Pangeni, Kumar Gaurav, Chakkaravarthy Periyasamy Balaiah
  • Patent number: 9747057
    Abstract: A processing device receives a first notice after a first time period, the first notice indicating that an amount of available free space on a storage component is below a first free space buffer threshold. The processing device determines a first amount of data to delete from an unsolicited content storage area of the storage component. The processing device receives a second notice after a second time period, the second notice indicating that the amount of available free space on the storage component is below the first free space buffer threshold. The processing device then determines a second amount of data to delete from the unsolicited content storage area, where the second amount is larger than the first amount.
    Type: Grant
    Filed: September 28, 2015
    Date of Patent: August 29, 2017
    Assignee: Amazon Technologies, Inc.
    Inventors: Ishwar VenkataManikanda Ramani, Michael Wendling, Mridula Karumuru
  • Patent number: 9734081
    Abstract: A compute server accomplishes physical address to virtual address translation to optimize physical storage capacity via thin provisioning techniques. The thin provisioning techniques can minimize disk seeks during command functions by utilizing a translation table and free list stored to both one or more physical storage devices as well as to a cache. The cached translation table and free list can be updated directly in response to disk write procedures. A read-only copy of the cached translation table and free list can be created and stored to physical storage device for use in building the cached translation table and free list upon a boot of the compute server. The copy may also be used to repair the cached translation table in the event of a power failure or other event affecting the cache.
    Type: Grant
    Filed: December 10, 2014
    Date of Patent: August 15, 2017
    Assignee: Advanced Micro Devices, Inc.
    Inventor: Sean Lie
  • Patent number: 9696940
    Abstract: A method includes receiving a request at a hypervisor from an application, where the application and the hypervisor are executed by a computing node. The request identifies a memory location in a memory device of the computing node, and the memory location is associated with a virtual machine executed by the computing node. The method also includes obtaining a snapshot of contents of the memory location in the memory device, where the snapshot is obtained by the hypervisor directly from the memory device. The method further includes providing the snapshot to the application. The application could form part of a second virtual machine that is executed by the computing node.
    Type: Grant
    Filed: December 9, 2013
    Date of Patent: July 4, 2017
    Assignee: Forcepoint Federal LLC
    Inventors: Matthew D. Neumann, Irby J. Thompson, Jr., Michael Simms
  • Patent number: 9678677
    Abstract: Provided are a computer program product, system and method for determining adjustments to the spare space in a storage device unavailable to a user based on a current consumption profile of a storage device. A current write amplification is based on storage writes to a media at a storage device and host writes from a host to the storage device. An adjustment to the current write amplification is determined to produce an adjusted write amplification based on an estimated lifespan of the storage device, a maximum storage writes for the storage device, and the storage writes at the storage device since the storage device was powered-on. A determination is made to an adjustment to spare space based on the adjusted write amplification. The spare space and the free space available to the user are reconfigured to adjust the spare space by the determined adjustment to the spare space.
    Type: Grant
    Filed: December 9, 2014
    Date of Patent: June 13, 2017
    Assignee: INTEL CORPORATION
    Inventor: Knut S. Grimsrud
  • Patent number: 9665442
    Abstract: A storage system, including: (a) a primary storage entity utilized for storing a data-set of the storage system; (b) a secondary storage entity utilized for backing-up the data within the primary storage entity; (c) a flushing management module adapted to identify within the primary storage entity two groups of dirty data blocks, each group is comprised of dirty data blocks which are arranged within the secondary storage entity in a successive sequence, and to further identify within the primary storage entity a further group of backed-up data blocks which are arranged within the secondary storage entity in a successive sequence intermediately in-between the two identified groups of dirty data blocks; and (d) said flushing management module is adapted to combine the group of backed-up data blocks together with the two identified groups of dirty data blocks to form a successive extended flush sequence and to destage it to the secondary storage entity.
    Type: Grant
    Filed: March 29, 2011
    Date of Patent: May 30, 2017
    Assignee: KAMINARIO TECHNOLOGIES LTD.
    Inventors: Benny Koren, Erez Zilber, Avi Kaplan, Shachar Fienblit, Guy Keren, Eyal Gordon
  • Patent number: 9658896
    Abstract: A method to optimize workload across a plurality of storage devices of a storage system, where the method monitors a workload of a first storage device belonging to a first tier of the storage system, calculates a performance of the workload of the first storage device belonging to a first tier of the storage system, interpolates a performance threshold for the first storage device using the workload pattern of the first storage device and a profile of the first storage device, the profile identifying a benchmark performance of the first storage device, and optimizes a usage of the first storage device within the storage system to improve a performance of the first storage device.
    Type: Grant
    Filed: May 16, 2012
    Date of Patent: May 23, 2017
    Assignee: International Business Machines Corporation
    Inventors: Lawrence Y. Chiu, Chao Guang Li, Yang Liu, Paul H. Muench
  • Patent number: 9634689
    Abstract: A computer-implemented method for arranging numeric data for compression is described. The method is implemented using a computing device in communication with a memory and a measurement device. The method includes receiving, by the computing device and from the measurement device, numeric data that includes a sequence of numbers, each number including at least a first byte followed by a second byte. The method additionally includes arranging the first bytes into a first contiguous set, arranging the second bytes into a second contiguous set, and storing the first contiguous set and the second contiguous set in a file in the memory, such that the first contiguous set is contiguous with the second contiguous set.
    Type: Grant
    Filed: August 20, 2014
    Date of Patent: April 25, 2017
    Assignee: SunEdison Semiconductor Limited (UEN201334164H)
    Inventor: Markus Jan Peter Siegert
  • Patent number: 9612972
    Abstract: Apparatuses and methods for a cache memory are described. In an example method, a transaction history associated with a cache block is referenced, and requested information is read from memory. Additional information is read from memory based on the transaction history, wherein the requested information and the additional information are read together from memory. The requested information is cached in a segment of a cache line of the cache block and the additional information in cached another segment of the cache line. In another example, the transaction history is also updated to reflect the caching of the requested information and the additional information. In another example, read masks associated with the cache tag are referenced for the transaction history, the read masks identifying segments of a cache line previously accessed.
    Type: Grant
    Filed: December 3, 2012
    Date of Patent: April 4, 2017
    Assignee: Micron Technology, Inc.
    Inventors: David Roberts, J. Thomas Pawlowski
  • Patent number: 9606910
    Abstract: Embodiments of the invention provide data reduction in storage systems. In one embodiment, a computer comprises: a memory; and a controller operable to manage information, which corresponds to a plurality of addresses, of one or more volumes provided from a storage system to the computer and including at least one set of multiple storage areas sharing same data to be stored in the storage system. The controller is operable to manage storing of the shared same data in the memory of the computer by using the information of the storage areas.
    Type: Grant
    Filed: January 17, 2013
    Date of Patent: March 28, 2017
    Assignee: Hitachi, Ltd.
    Inventor: Akira Deguchi