Abstract: A tunneling field-effect transistor (TFET) device is disclosed. A protrusion structure is disposed over the substrate and protrudes out of the plane of substrate. Isolation features are formed on the substrate. A drain region is disposed over the substrate adjacent to the protrusion structure and extends to a bottom portion of the protrusion structure as a raised drain region. A drain contact is disposed over the drain region and overlap with the isolation feature.

Abstract: At the time of clamping, excessive stress is applied to bonding parts between substrates and input/output terminals, which may cause the bonding parts to be detached and cause the substrates to be cracked. A lower electrode of a power semiconductor element 11 is connected via a bonding material 13 to a first interconnection layer 12 arranged on a lower surface of the power semiconductor element 11, and an upper electrode 14 of the power semiconductor element 11 is connected via the bonding material 13 to a second interconnection layer 15 arranged on an upper surface. Also, a second main terminal 16 electrically connected to the upper electrode 14 of the power semiconductor element 11 is connected via the bonding material 13 to the second interconnection layer 15 and contacts and is positioned on a third interconnection layer 24 (spacer) arranged to be parallel to the first interconnection layer 12 on the lower surface.

Abstract: A semiconductor device containing an enhancement mode GaN FET on a III-N layer stack includes a low-doped GaN layer, a barrier layer including aluminum over the low-doped GaN layer, a stressor layer including indium over the barrier layer, and a cap layer including aluminum over the stressor layer. A gate recess extends through the cap layer and the stressor layer, but not through the barrier layer. The semiconductor device is formed by forming the barrier layer with a high temperature MOCVD process, forming the stressor layer with a low temperature MOCVD process and forming the cap layer with a low temperature MOCVD process. The gate recess is formed by a two-step etch process including a first etch step to remove the cap layer, and a second etch step to remove the stressor layer.

Abstract: Provided is a semiconductor package of a package on package (PoP) type having an improved electromagnetic wave shielding property. The semiconductor package includes: a first sub-package including a first package base substrate on which a first semiconductor chip is mounted, and an electromagnetic wave shielding member having a top portion and side portions respectively at a top surface and side surfaces of the first sub-package, wherein a groove space extends inward from a bottom surface of the first sub-package; and a second sub-package including a second package base substrate in the groove space and on which a second semiconductor chip is mounted, wherein the second sub-package is connected to the first sub-package through an inter-package connection terminal attached to a first package connection pad at a bottom surface of the groove space of the first sub-package.

Abstract: A method of forming elevationally-elongated conductive structures of integrated circuitry comprises providing a substrate comprising a plurality of spaced elevationally-extending conductive vias. Conductive material is formed directly above and directly against the conductive vias. The conductive material has an upper surface and a first sidewall that are directly above individual of the conductive vias in a vertical cross-section. The conductive material has a second sidewall that is not directly above the individual conductive vias. Covering material is formed directly above individual of the upper surfaces and against individual of the first sidewalls directly above the individual conductive vias. The covering material comprises a composition different from that of at least some of the conductive material.

Abstract: A device and method for manufacturing a two-dimensional electrostrictive field effect transistor having a substrate, a source, a drain, and a channel disposed between the source and the drain. The channel is a two-dimensional layered material and a gate proximate the channel. The gate has a column of an electrostrictive or piezoelectric or ferroelectric material, wherein an electrical input to the gate produces an elongation of the column that applies a force or mechanical stress on the channel and reduces a bandgap of two-dimensional material such that the two-dimensional electrostrictive field effect transistor operates with a subthreshold slope that is less than 60 mV/decade.

Abstract: A method of producing an optoelectronic device includes providing an optical element including an optical lens and including a frame, wherein the frame projects with a receptacle section beyond a first side of the lens, the receptacle section of the frame surrounds a receptacle space, and the receptacle section of the frame includes a bearing face at an inner side; inserting an optoelectronic component and a transparent intermediate element into the receptacle space; placing the intermediate element onto the bearing face; and securing the component and the intermediate element to the frame.

Abstract: A semiconductor package includes a substrate, a master chip on the substrate, a first slave chip on a top surface of the master chip and partially exposing the top surface of the master chip, the first slave chip having a same size as the master chip and having a same storage capacity as the master chip, and a first chip connector on the exposed top surface of the master chip and coupled to the master chip and the first slave chip.

Abstract: A novel thin film encapsulated OLED panel architecture and a method for making the panels with improved shelf life is disclosed. The OLED panel consists of a plurality of OLED pixels; each OLED pixel is individually hermetically sealed and isolated from its neighboring pixels. The organic stack of the OLED pixel is contained within its own hermetically sealed structure, achieved by making the structure on a barrier coated substrate and using a first barrier material as the grid and a second barrier for encapsulating the entire OLED pixel. The first barrier material provides the edge seal while the second barrier disposed over the pixel provides protection from top down moisture diffusion. By isolating and hermetically sealing individual pixels; any damage such as moisture and oxygen ingress due to defects or particles, delamination, cracking etc. can be effectively contained within the pixel thereby protecting other pixels in the panel.

Abstract: A bezel-free display comprises a display substrate and an array of pixels. Pixel rows and pixel columns are separated by row and column distances and connected by row and column lines, respectively. A column driver is electrically connected to each of the column lines and a row driver is electrically connected to each of the row lines. Row-connection lines are electrically connected to each of the row lines or row drivers. In certain embodiments, each pixel in the column of pixels closest to a display substrate edge is spatially separated from the edge by a distance less than or equal to the column distance. At least one row driver is spatially separated from the corresponding row by a distance less than the column or row distance, at least one column driver is spatially separated from the corresponding column by a distance less than the column or row distance, or both.

Abstract: A semiconductor device has a leadframe with a plurality of bodies extending from the base plate. A first semiconductor die is mounted to the base plate of the leadframe between the bodies. An encapsulant is deposited over the first semiconductor die and base plate and around the bodies of the leadframe. A portion of the encapsulant over the bodies of the leadframe is removed to form first openings in the encapsulant that expose the bodies. An interconnect structure is formed over the encapsulant and extending into the first openings to the bodies of the leadframe. The leadframe and bodies are removed to form second openings in the encapsulant corresponding to space previously occupied by the bodies to expose the interconnect structure. A second semiconductor die is mounted over the first semiconductor die with bumps extending into the second openings of the encapsulant to electrically connect to the interconnect structure.

Abstract: There is provided a flexible display having a plurality of innovations configured to allow bending of a portion or portions to reduce apparent border size and/or utilize the side surface of an assembled flexible display.

Abstract: A tiling display device includes a plurality of display modules arranged on one plane. The display module includes a substrate, a signal line, an open hole, a filling layer, and a circuit board. The substrate has a display area in which subpixels are defined. The signal line is positioned on the top surface of the substrate within the display area to deliver a predetermined signal to the subpixels. The open hole is provided to penetrate the substrate within the display area. The filling layer fills the open hole. The circuit board is positioned on the back surface of the substrate and electrically connected to the signal line through the filling layer.

Abstract: An image sensor includes an insulating pattern disposed on a semiconductor substrate and having an opening, a color filter disposed within the opening of the insulating pattern, a capping insulating layer disposed on the color filter, a first electrode disposed on the capping insulating layer and having a portion overlapping with the color filter, a separation structure surrounding a side surface of the first electrode, and a photoelectric layer disposed on the first electrode. The separation structure includes a first insulating layer and a second insulating layer formed of different material.

Abstract: A semiconductor device includes a field effect transistor including: a semiconductor substrate including a channel forming region; a gate insulating film formed at the channel forming region on the semiconductor substrate; a gate electrode formed over the gate insulating film; a first stress application layer formed over the gate electrode and applying stress to the channel forming region; a source/drain region formed on a surface layer portion of the semiconductor substrate at both sides of the gate electrode and the first stress application layer; and a second stress application layer formed over the source/drain region in a region other than at least a region of the first stress application layer and applying stress different from the first stress application layer to the channel forming region.

Abstract: An FSI image sensor device structure is provided. The FSI image sensor device structure includes a pixel region formed in a substrate and a storage region formed in the substrate and adjacent to the pixel region. The FSI image sensor device structure further includes a first gate structure formed over the storage region and a metal shield structure formed over the first gate structure. The FSI image sensor device structure further includes a conductive structure formed adjacent to the first gate structure. In addition, the conductive structure is electrically connected to the metal shield structure through a via.

Abstract: A chip part according to the present invention includes a substrate having a penetrating hole, a pair of electrodes formed on a front surface of the substrate and including one electrode overlapping the penetrating hole in a plan view and another electrode facing the one electrode, and an element formed on the front surface side of the substrate and electrically connected to the pair of electrodes.

Abstract: At least one embodiment relates to a method for photolithographic patterning of an organic layer on a substrate. The method includes providing a water-soluble shielding layer over the organic layer. In addition, the method includes providing a photoresist layer on the water-soluble shielding layer. The method also includes photolithographic patterning of the photoresist layer to form a patterned photoresist layer. Further, the method includes etching the water-soluble shielding layer and the organic layer, using the patterned photoresist layer as a mask, to form a patterned water-soluble shielding layer and a patterned organic layer. Still further, the method includes removing the patterned water-soluble shielding layer. The method includes, before providing the water-soluble shielding layer, providing a hydrophobic protection layer having a hydrophobic upper surface on the organic layer.

Abstract: A semiconductor device may include a substrate, a first nanowire, a second nanowire, a first gate insulating layer, a second gate insulating layer, a first metal layer and a second metal layer. The first gate insulating layer may be along a periphery of the first nanowire. The second gate insulating layer may be along a periphery of the second nanowire. The first metal layer may be on a top surface of the first gate insulating layer along the periphery of the first nanowire. The first metal layer may have a first crystal grain size. The second metal layer may be on a top surface of the second gate insulating layer along the periphery of the second nanowire. The second metal layer may have a second crystal grain size different from the first crystal grain size.

Abstract: An organic light emitting diode display device includes a substrate on which first, second and third pixel regions are defined; a first electrode in each of the first, second and third pixel regions on the substrate; a hole auxiliary layer on the first electrode; a first light emitting material layer on the hole auxiliary layer and emitting first light; an electron auxiliary layer on the first light emitting material layer; a second electrode on the electron auxiliary layer; and a color changing layer under the first electrode or on the second electrode, wherein the color changing layer includes first, second and third portions corresponding to the first, second and third pixel regions, respectively, and wherein the first portion absorbs the first light and outputs second light, the second portion absorbs the first light and outputs third light, and the third portion passes the first light as it is.