Patents Examined by Thuy-Trang N. Huynh
  • Patent number: 5844768
    Abstract: A charging device which can suppress elevation of the grid plate under tension is obtained. In the charging device, elevation suppression means is provided at the opposing ends of the regulation member for regulating the distance between the surface of the photoreceptor and the grid plate. By the elevation suppression means, the breadthwise outer edge portions of the plate are forced to bend up toward the photoreceptor and the central portion thereof deflects in the opposite direction toward the regulation member and is brought into close contact therewith, so that grid plate is kept flat on a level with the regulation member.
    Type: Grant
    Filed: September 13, 1995
    Date of Patent: December 1, 1998
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Toshio Yamanaka
  • Patent number: 5790365
    Abstract: An apparatus and concomitant method that applies an oscillating voltage to at least one electrode of an electrostatic chuck. The apparatus is a switching circuit connected between the electrostatic chuck power supply and an electrode or electrodes of an electrostatic chuck. In one contact position, the relay applies the electrostatic chuck chucking voltage to the electrode(s). While in a second contact position, the electrode(s) is connected through an inductor to a predetermined potential, e.g., ground. To dechuck a wafer from the chuck surface, the relay is switched from the first position to the second position connecting the electrode(s) through the inductor to ground. Because the wafer and the chuck electrode(s) form a parallel plate capacitor, this inductor and capacitor combination forms a tank circuit that oscillates at a resonant frequency.
    Type: Grant
    Filed: July 31, 1996
    Date of Patent: August 4, 1998
    Assignee: Applied Materials, Inc.
    Inventor: Viktor Shel
  • Patent number: 5771010
    Abstract: A data processing system having a compression and decompression apparatus based on the Lempel-Ziv algorithm. The compression apparatus includes an array section having a circular history CAM unit for receiving and storing one or more data elements and a coding unit for determining whether received data elements previously have been stored in the history CAM unit and are a candidate for compression. If a received data element matches at least one of the stored data elements, a PS logic section determines whether there is the presence of a string. An encoding section identifies the address of the matching stored data element in a string and the length of the string. The compression apparatus generates a compression token comprising an identification of whether a data element is compressed, the length of the coded data within a plurality of predetermined data length categories and an address. The compression apparatus uses a particular hardware implementation of the PS logic section.
    Type: Grant
    Filed: March 22, 1995
    Date of Patent: June 23, 1998
    Assignee: IBM Corporation
    Inventor: Charles J. Masenas
  • Patent number: 5757605
    Abstract: A pulse-width modulation control system having a power source, driver circuits connected to the power source, and two solenoids, such as those for a vehicle automatic transmission, connected to the power source through the driver circuits, and pulse trains of a predetermined PWM duty ratio are supplied. The supplied currents are detected and A-D converted. In the system, one pulse train lags behind the other at the leading edge. When PWM controls two solenoids at the same time using an on-board microcomputer, two voltage memory circuits are additionally needed, since the microcomputer ordinarily has only one A-D converter. With the arrangement, only one voltage memory circuit is needed, rendering the system configuration simple.
    Type: Grant
    Filed: February 29, 1996
    Date of Patent: May 26, 1998
    Assignee: Honda Giken Kogyo Kabushiki Kaisha
    Inventor: Hideo Furukawa
  • Patent number: 5754130
    Abstract: An ultrahigh-speed analog-to-digital converter that does not use optical signals is implemented by means of simple circuit configurations. To achieve this, phase differences between a carrier and modulated signals are detected, the modulated signals having been obtained by modulating the phase of the carrier with an analog signal. Analog-to-digital conversion is then performed by applying binary weighting to the modulation factors of the phase modulations. Alternatively, different relative delays are applied stepwise in 2.sup.n -1 stages (where n is the resolution) between the carrier and the signal that has been phase modulated by the analog signal. The phase of the signals with these delays and the phase of the signal without any delay are respectively compared in 2.sup.n -1 stages. An n-bit digital signal is formed and output on the basis of the results of these comparisons.
    Type: Grant
    Filed: September 27, 1995
    Date of Patent: May 19, 1998
    Assignee: Teratec Corporation
    Inventor: Hiroshi Sakayori
  • Patent number: 5748436
    Abstract: An electrostatic chuck and method for electrostatically clamping a working member such as a semiconductor wafer to the chuck. The elcetrostatic chuck includes at least one conductive electrode and an insulating layer for separating the conductive electrode from the working member. The insulating layer is composed of a composition containing pyrolytic boron nitiride (PBN) and a carbon dopant in an amount above 0 wt % and less than about 3 wt % such that its electrical resistivity is smaller than 10.sup.14 .OMEGA.-cm. A source of voltage is impressed across the conductive electrode to generate an electrostatic field which causes the working member to be clamped to the chuck.
    Type: Grant
    Filed: January 21, 1997
    Date of Patent: May 5, 1998
    Assignee: Advanced Ceramics Corporation
    Inventors: Junich Honma, Kotaro Mino, Hisayuki Miyata, Haruhide Inoue
  • Patent number: 5742467
    Abstract: A method of controlling movements of an armature in an electromagnetic circuit which includes at least one holding solenoid applying magnetic forces to the armature and at least one resetting arrangement for applying a resetting force to the armature. The method includes the following cyclical steps: switching on a holding current to flow through the solenoid for holding the armature at the solenoid; after a predetermined period, switching off the holding current for causing the armature to begin a motion away from the solenoid; after switch-off of the holding current detecting, across the solenoid, a voltage change caused by the displacement of the armature for recognizing a starting moment of armature motion from the solenoid; and deriving a control signal from signals representing the voltage change ascertained in the course of the detecting step.
    Type: Grant
    Filed: September 28, 1995
    Date of Patent: April 21, 1998
    Assignee: FEV Motorentechnik GmbH & Co. KG
    Inventor: Gunter Schmitz
  • Patent number: 5739778
    Abstract: Digital data formatting/deformatting circuits perform digital data formatting/deformatting operations separately from a digital signal processor to reduce the required time and power consumption in formatting and deformatting digital data. In the formatting operation, the data to be formatted are arranged in a line and then outputted in the unit of a desired number of bits. In the deformatting operation, the formatted data are arranged in a line and then outputted in the unit of the original number of bits.
    Type: Grant
    Filed: April 25, 1995
    Date of Patent: April 14, 1998
    Assignee: LG Electroncis Inc.
    Inventor: Won Kun Tae
  • Patent number: 5731946
    Abstract: A device for driving a load, in particular an electromagnetic load. The device includes a current detector for detecting the current flowing through the load, a power transistor connected in series to the load, which is triggered in dependence upon the current flowing through the load, and a further transistor arranged in parallel to the power transistor. The device has the advantage of reducing the power dissipation in the power transistor.
    Type: Grant
    Filed: December 26, 1995
    Date of Patent: March 24, 1998
    Assignee: Robert Bosch GmbH
    Inventor: Viktor Kahr
  • Patent number: 5726845
    Abstract: In a power factor correction circuit using a control power MOSFET connected in series between the boost converter and the output, overcurrent damage to the power MOSFET upon occurrence of a short circuit in the output is prevented by sensing a drop in the output voltage below a predetermined level above the peak of the rectified AC boost converter input, and shutting the power MOSFET off when such a drop is sensed.
    Type: Grant
    Filed: February 28, 1996
    Date of Patent: March 10, 1998
    Assignee: Astec International Limited
    Inventor: Simon Mo Chan Ho
  • Patent number: 5724037
    Abstract: A computed tomography imaging method includes receiving an analog beam intensity signal from a computed tomography scanner and converting the signal into a series of digital representations of the signal at successive points in time using a predetermined sample rate. Indications that a portion of the scanner has reached a certain position relative to the beam are received asynchronously with respect to the sample rate. The value of at least one of the digital representations is adjusted in response to the indications to obtain a corrected digital representation of the analog signal.
    Type: Grant
    Filed: May 23, 1995
    Date of Patent: March 3, 1998
    Assignee: Analog Devices, Inc.
    Inventor: Wai L. Lee
  • Patent number: 5719569
    Abstract: A coder includes a measuring rule (R3) carried by one object and having at least two tracks (X, Y). The tracks are provided with simple marks distributed in a substantially identical manner over the two tracks. At least two specific marks (M1, M2) are located on two distinct tracks. Each mark limit defines a spacing change on the measuring rule. At least two mark readers (LX, LY) are carried by another object, each associated with a track whose marks it detects. A processor is connected to the readers for determining the distance and direction of the movement. The invention is useful in robotics and metrology.
    Type: Grant
    Filed: May 10, 1995
    Date of Patent: February 17, 1998
    Assignee: Commissariat a l'Energie Atomique
    Inventor: Miguel Saro
  • Patent number: 5715129
    Abstract: An electronic overload relay has an intrinsic power supply connected in parallel with the NC contact of the relay between wire attachment terminals. The power supply is a parallel connected zener diode and capacitor, connected to the processor in parallel with a low voltage sensing circuit that detects the charge on the capacitor, whereby the processor operates to turn on a unijunction transistor for low voltage coil applications to shunt the power supply during contactor closing and turn off a predetermined interval later by which time the contactor should have closed.
    Type: Grant
    Filed: December 5, 1995
    Date of Patent: February 3, 1998
    Assignee: Eaton Corporation
    Inventor: Mark E. Innes
  • Patent number: 5708557
    Abstract: The invention includes a puncture-resistant electrostatic chuck with a flat surface and a method of making the same. The electrostatic chuck includes a conductive layer such as copper foil that is laminated to a first insulation layer such as a polyimide. A puncture-resistant layer is placed over the conductive layer and includes random or woven fibers held together by a resin. The puncture-resistant layer has an uneven topography on a top surface due to the fibers contained therein. A second insulation layer overlies the puncture-resistant layer and has a top surface which is substantially flat. The flat top surface of the second insulation layer is made by laminating layers together with a mandrel which is polished and free of irregularities such as pits, dents and high spots. Preferably the mandrel has a uniform thickness over its entire surface.
    Type: Grant
    Filed: August 22, 1996
    Date of Patent: January 13, 1998
    Assignee: Packard Hughes Interconnect Company
    Inventors: Haim Feigenbaum, Bao Le, Randy Lee Thomas, Dong Vo
  • Patent number: 5706157
    Abstract: A communication power distribution system including a single power regulator which feeds a plurality of transmission lines current limited by corresponding active current limiters.
    Type: Grant
    Filed: February 26, 1996
    Date of Patent: January 6, 1998
    Assignee: Reltec Corporation
    Inventors: Steven M. Galecki, Victor A. Falk
  • Patent number: 5703745
    Abstract: The voltage and current conditions on a power transmission line are monitored to determine the coincidence of a low voltage condition and a lack of a high current condition. The coincidence of those two conditions is indicative of a CCVT transient, and the tripping action from zone 1 distance elements is delayed for a period of 1.375 cycles. The tripping delay is supervised by a fault impedance determination, which, if a threshold is exceeded, the remaining portion of the time delay is eliminated, so that a trip is allowed if the time delay period has not expired.
    Type: Grant
    Filed: October 20, 1995
    Date of Patent: December 30, 1997
    Assignee: Schweitzer Engineering Laboratories, Inc.
    Inventors: Jeffrey B. Roberts, Daqing Hou
  • Patent number: 5699218
    Abstract: A hybrid or combination solid state/electromechanical relay circuit combines the advantageous features of solid state and electromechanical relays but avoids their disadvantageous features. An electromechanical relay includes a coil and a pair of contacts which close in response to energization of the relay coil; this pair of contacts being coupled between the load and the ac source. The relay coil is coupled through a switch to a source of dc coil voltage and is also connected to ground. A triac has its first and second main electrodes coupled in parallel to the pair of contacts of the electromechanical relay between the ac source and the load. A capacitor has one lead connected to the first lead of the relay coil and a second lead connected to the gate of the triac. On application of power to the coil, the capacitor charges through the triac, mining it on prior to the coil voltage of the relay reaching its design pick-up voltage. Then during switch dormancy, the coil-energized relay contacts carry the load.
    Type: Grant
    Filed: January 2, 1996
    Date of Patent: December 16, 1997
    Inventor: Andrew S. Kadah
  • Patent number: 5696506
    Abstract: An apparatus for decoding variable-length codewords has a FIFO memory which stores a bitstream and outputs an N-bit sequence from the first bit position in the stored bitstream in response to a carry signal. The number of bits "N" corresponds to the longest variable-length codeword. A barrel shifter receives part of a 2N-bit sequence in response to the carry signal, and outputs an N-bit sequence in response to the accumulated codeword length. Another barrel shifter outputs an N-bit sequence in response to the codeword length for storing the 2N-bit sequence from the first barrel shifter. The decoder generates a run-length and a level corresponding to a variable-length codeword starting at a first bit position in the N-bit sequence. The decoder generates a second run equivalent signal during a run-length interval, and then outputs data of "0" in response to the second run equivalent signal, and outputs a level in response to the first run equivalent signal.
    Type: Grant
    Filed: May 8, 1995
    Date of Patent: December 9, 1997
    Assignee: Samsung Electronics, Co., Ltd.
    Inventor: Pil-ho Yu
  • Patent number: 5696510
    Abstract: The disclosure is an analog-to-digital converter of half-flash type providing for the multiplexing of two analog input signals and therefore requiring only one converter module. It includes a coarse comparator block used to determine the most significant bits of the converted signals and also determining the voltage range for two fine comparator blocks that determine the least significant bits of the converted signals, wherein each of the input signals is connected to a fine comparator block and said coarse comparator block compares alternatively the first and second input signals with a reference voltage. The analog-to-digital converter can be advantageously used for processing television signals.
    Type: Grant
    Filed: May 18, 1995
    Date of Patent: December 9, 1997
    Assignee: Thomson Multimedia S.A.
    Inventors: Frederic Paillardet, Francis Dell'Ova, Bruno Bonhoure
  • Patent number: 5689258
    Abstract: A digital-analog converter has unit current source cells each having a differential switch circuit and a constant current source. The differential switch circuit made of two switches is driven by a pair of complementary driving circuits controlled by a bit signal and the inverted bit signal corresponding to that signal and entered simultaneously. The constant current source outputs a constant current to a first and a second current output terminal via the switch circuit. The signals for controlling the driving circuits that drive the switches are such that the delay time for the switch closing operation will be longer than the delay time for the switch opening operation. As a result, the cross point of the two signals to open and close the switches in a complementary manner becomes greater than the median between the maximum and minimum signal levels.
    Type: Grant
    Filed: September 21, 1995
    Date of Patent: November 18, 1997
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Yasuyuki Nakamura, Hiroyuki Kouno, Takahiro Miki