Abstract: One example includes a method for measuring a quiescent current in a switching voltage regulator. The method includes generating a mathematical model of a circuit design associated with the switching voltage regulator. The mathematical model includes measurable parameters to describe a switching current of a power switch of the switching voltage regulator. The method also includes fabricating a circuit comprising the switching voltage regulator based on the circuit design. The fabricated circuit includes the power switch and conductive I/O. The method also includes coupling the conductive I/O of the fabricated circuit to a circuit test fixture and providing electrical signals to the conductive I/O via the circuit test fixture. The method also includes measuring the measurable parameters in response to the electrical signals and applying the measurable parameters to the mathematical model to calculate the switching current.

Abstract: A particle monitoring system may include a flow passage, a particle imager to image a targeted particle within the flow passage, electrodes supported proximate the flow passage, a power source connected to the electrodes and a controller to cause the power source to charge to electrodes so as to (1) apply an electric field balanced with respect to gravity so as to hold, levitate and rotate a targeted particle within the flow passage during imaging and (2) release the targeted particle following the imaging.

Abstract: The present invention relates to switching element protection of a BLDC motor, such as used with a power tool. The present invention checks each switching element of a power stage individually for a short circuit when a trigger of the tool is actuated. Each switching element is turned ON for a period of time (such as 1-5 microseconds, for example), current flowing through the half-bridge or the full power stage is measured, and that switching element is turned OFF. When the current is greater than or equal to a threshold (such as 5 A, for example), the controller stops and indicates a fault condition. By testing each switching element in order, the controller is able to determine whether the shorted switching element is the opposite one in the half-bridge being tested.

Abstract: A test and measurement instrument switch matrix including a first cable including a center conductor and a guard connected to a first output of the test and measurement instrument; a second cable including a center conductor and a guard connected to a second output of the test and measurement instrument; a third cable including a center conductor and a guard connected to the device under test; and a fourth cable including a center conductor connected to the device under test and a guard connected to the device under test.

Abstract: The present application relates to a technical field of determining an irreversible demagnetization of a grain boundary diffusion NdFeB magnet, and more particularly, to a method for identifying an irreversible demagnetization of a grain boundary diffusion NdFeB magnet by magnetic field distribution. After applying a reverse magnetic field to a saturatedly magnetized grain boundary diffusion NdFeB magnet, if a number of magnetic poles on a non-diffusion face of the grain boundary diffusion NdFeB magnet is increased, it is determined that there is an irreversible demagnetization in the grain boundary diffusion NdFeB magnet.

Abstract: An absolute encoder preferable in being made compact is provided. The absolute encoder includes a first drive gear, a first permanent magnet, a first angle sensor, and a first driven gear of a central axis that is perpendicular to a central axis of the first drive gear, the first driven gear engaging with the first drive gear. The absolute encoder includes a second drive gear coaxially provided with the first driven gear, the second drive gear being configured to rotate in accordance with rotation of the first driven gear. The absolute encoder includes a second driven gear of which a central axis is perpendicular to the central axis of the first driven gear, the second driven gear engaging with the second drive gear. The absolute encoder includes a second permanent magnet provided on a top end side of the second driven gear.

Abstract: A burn-in board for burn-in testing of semiconductor devices includes a strip socket mounted to a PCB. The strip socket includes a socket base configured to receive a device strip including an array of semiconductor devices, and a socket lid including at least one heating block. The socket lid is movable moved between (a) an open position allowing the device strip to be mounted on the socket base and (b) a closed position in which the socket lid including the heating block(s) is closed down on the mounted device strip. The strip socket includes conductive contacts configured to contact individual semiconductor devices on the device strip to allow selective monitoring of individual semiconductor devices during a burn-in test process. The burn-in board may also include heating control circuitry to control the heating block(s) during the burn-in test process.

Abstract: An optical detection system and a laser providing module without using an optical fiber thereof are provided. The optical detection system includes a carrier module, a laser light providing module, and an electrical detection module. The carrier module is configured to carry a plurality of photodiodes. The laser light providing module is disposed above the carrier module. The electrical detection module is adjacent to the carrier module. The laser light providing module is configured to convert a laser light source into a plurality of laser light beams, thereby simultaneously and respectively exciting two corresponding ones of the photodiodes. The electrical detection module is configured to simultaneously and electrically contact the corresponding photodiodes so as to obtain an electrical signal generated by each of the photodiodes.

Abstract: A testing module for a semiconductor wafer-form package includes a circuit board structure, first connectors, a first connecting structure, second connectors, third connectors and a first bridge connector. The circuit board structure includes two edge regions and a main region located therebetween. The first connectors are located over the edge regions and connected to the circuit board structure. The first connecting structure is located over and distant from the circuit board structure. The second connectors and third connectors are located over and connected to the first connecting structure, where the third connectors are configured to transmit electric signals for testing the semiconductor wafer-form package being placed over the main region. The first bridge connector is electrically coupling the circuit board structure and the first connecting structure by connecting the second connectors and the first connectors.

Abstract: The present application provides a structure and method for online detection of a metal via open circuit, a contact layer is on the substrate, a first metal layer is on the contact layer, a first metal via layer is on the first metal layer, a second metal via layer is on the first metal via layer metal layer, the contact layer comprises a plurality of contacts, the plurality of contacts are connected to the first metal layer, the first metal via layer comprises a plurality of first vias, the plurality of first vias are filled with metal; detecting by means of an E-beam technology. A problem in the process can be found in advance, so as to solve the problem in time and thus stop losses as soon as possible.

Abstract: An example test system includes test sites comprising test sockets for testing devices under test (DUTs) and pickers for picking DUTs from the test sockets or placing the DUTs into the test sockets. Each picker may include a picker head for holding a DUT. The test system also includes a gantry on which the pickers are mounted. The gantry may be configured to move the pickers relative to the test sites to position the pickers for picking the DUTs from the test sockets or placing the DUTs into the test sockets. The test sockets are arranged in at least one array that is accessible to the pickers on the gantry.

Abstract: A method monitors a supply system of a robot having a robot arm and a robot hand movable relative thereto. The supply system has a supply chain, in particular a cable assembly, and a guide for the supply chain. The supply chain is guided along the robot arm in order to supply the robot hand. The supply system also has a number of sensors for monitoring at least one state variable of the supply system. The functional capability of the supply system is concluded, inferred or predicted from values for the state variable that are determined by the sensors.

Abstract: A universal measurement input for connecting a small signal transformer to an electrical device includes an electrical input for connecting a connection line of the small signal transformer, an electrical output for outputting a measurement signal to the electrical device, and a correction element having a digital filter with a filter transfer function adapted to the small signal transformer. In order to provide a measurement input with which all possible types of small signal transformers can be connected to an electrical device and which thus reduces the device variety of measurement inputs which are to be provided, the filter transfer function of the correction element is defined by a parameter set to be variably preset specifically for the small signal transformer. An electrical device with the measurement input is also provided.

Abstract: A detector for, and a method of, detecting analytes in gases in described. The detector comprises a sorbent for sorbing therein and/or thereon and/or desorbing therefrom, an analyte included in a gas exposed thereto, at a zeroth temperature, pressure (T0,P0), a controller arranged to change the zeroth temperature, pressure (T0,P0) to a first temperature, pressure (T1,P1) according to a first equation, to desorb and/or sorb at least some of the analyte; and a sensor arranged to sense at least some of the analyte and to output a response corresponding to the sensed analyte. The response comprises and/or is a characteristic response of the analyte. The first response is modified based on a first baseline response at the zeroth temperature, pressure (T0,P0).

Abstract: An integrated circuit (IC) test engine generates N-cycle at-speed test patterns for testing for candidate faults and/or defects of a first set of transition faults and/or defects of an IC design. A diagnostics engine that receives test result data characterizing application of the N-cycle at-speed test patterns to a fabricated IC chip based on the IC design by an ATE, in which the test result data includes a set of miscompare values characterizing a difference between an expected result and a result measured by the ATE for a given N-cycle at-speed test pattern. The diagnostics engine employs a fault simulator to fault-simulate the N-cycle at-speed test patterns against a fault model that includes a first set of transition faults and/or defects and fault-simulate a subset of the N-cycle at-speed test patterns against a fault model that includes multicycle transition faults and/or defects utilizing sim-shifting.

Abstract: Embodiments of the present application provide a testing equipment and a testing method. The testing equipment includes: a plurality of pad groups and a plurality of source measure units. Each of the pad groups has a stress pad. The stress pad is configured to connect an element under test. The source measure unit is configured to send an input signal to the element under test through the stress pad and measure an output signal of the element under test to acquire performance parameters of the element under test. The stress pads of at least two of the pad groups are connected to the corresponding source measure units at the same time. The embodiments of the present application help improve the testing efficiency.

Abstract: The present disclosure relates to a semiconductor device, and a test apparatus and method thereof, capable of accurately detecting a defect by using a plurality of resistor circuits in a test process. The test apparatus of a semiconductor device according to an aspect of the present disclosure may include semiconductor chips each including an external resistor circuit disposed to be dispersed along an outer region of a chip and an internal resistor circuit disposed in an inner region of the chip in order to test cracks, and test equipment that drives the external resistor circuit and the internal resistor circuit and compares an output of the external resistor circuit with an output of the internal resistor circuit to detect whether a defect occurs in each of the semiconductor chips.

Abstract: In a described example, a circuit includes a sensor circuit including multiple magnetic field sensors having respective sensor outputs. The magnetic field sensors are configured to provide magnetic field sensor signals at the respective sensor outputs representative of a measure of current flow through a conductive structure. A combiner interface has combiner inputs and a combiner output. The combiner inputs are coupled to the respective sensor outputs. The combiner interface is configured to provide an aggregate sensor measurement at the combiner output responsive to the magnetic field sensor signals, in which the aggregate sensor measurement is decoupled from magnetic fields generated responsive to the current flow through the conductive structure.

Abstract: The present disclosure relates to a device for carrying a chip, and a device and a method for testing a chip. The device for carrying a chip is configured to fasten chips of different sizes, and includes a support box and a plurality of first elastic snap rings. The support box is configured to carry a chip. A first connection terminal of the first elastic snap ring is provided on a first inner side wall of the support box, a second connection terminal of the first elastic snap ring is suspended, and is configured to be in contact with the chip and provide a pressure in a first direction for the chip because an elastic body of the first elastic snap ring is in an elastically compressed state.

Abstract: A signal detection circuit is provided, and includes an input switch circuit, an amplitude detection circuit, a clock generating circuit, and an integration circuit. The input switch circuit receives a reference voltage and an input voltage and selectively outputs the reference voltage or the input voltage. The amplitude detection circuit detects an output of the input switch circuit to generate an amplitude voltage. The clock generating circuit controls the input switch circuit to alternately enter first and second phases, the input switch circuit is controlled to output the reference voltage in the first phase, and output the input voltage in the second phase. The integration circuit receives the amplitude voltage as an input, and generates an integration voltage corresponding to an accumulation result within a predetermined time interval. The predetermined time interval includes at least one period that cycles between the first phase and the second phase.