Abstract: An electroluminescent display device includes a display panel including a display region, which includes a plurality of pixel arrangement regions and a plurality of scan circuit regions between the plurality of pixel arrangement regions, and a non-display region around the display region; a scan driving circuit formed in the plurality of scan circuit regions, and a clock signal line transferring a clock signal, and a first voltage line and a second voltage line located at both sides of the clock signal line, the clock signal line and the first and second voltage lines being located in the scan circuit region, wherein the first voltage line transfers a low potential driving voltage which is supplied to a cathode corresponding to the display region.

Abstract: There is provided a gate driving circuit including cascaded Gate Driver On Array (GOA) units, each GOA unit drives a row of pixels and includes a starting sub-unit, an output sub-unit and an output terminal, in the GOA unit at a first stage, the starting sub-unit is coupled with a starting signal, a first control signal, a second control signal and a constant voltage potential, and the output sub-unit is coupled with a first clock signal and a first power supply signal; in the GOA unit at an nth stage, the starting sub-unit is coupled with the starting signal, the first control signal, the second control signal and the output terminal of the GOA unit at an (n?1)th stage, the output sub-unit is coupled with the first power supply signal and the output terminal of the GOA unit at an (n+1)th stage, n is an integer greater than 1.

Abstract: The present application provides a GOA circuit and an array substrate. The GOA circuit includes a plurality of cascaded gate driving units, wherein an N-th level gate driving unit includes an inversion module, and a portion of a clock signal can be output from an output terminal of the inversion module. Since a frequency of the clock signal is much higher than a frequency of a low-frequency control signal, a duration during which an output signal of the inversion module is kept at a same potential is reduced.

Abstract: A display panel and a display device are provided. The display panel includes a driving circuit. The driving circuit includes N-level shift registers cascaded with each other, where N is greater than or equal to two. the display panel further includes a first voltage signal line, providing a first voltage signal for the driving circuit; a second voltage signal line, providing a second voltage signal for the driving circuit; a third voltage signal line, providing a third voltage signal for the driving circuit; and a fourth voltage signal line, providing a fourth voltage signal for the driving circuit. At least one of the third voltage signal line and the fourth voltage signal line is disposed on a side of at least one of the first voltage signal line and the second voltage signal line facing toward a display region of the display panel.

Abstract: Disclosed are a driving method of an array substrate and an array substrate. The driving method of the array substrate controls a data drive signal line to output a first polarity data drive signal in a first time period and output a second polarity data drive signal in a second time period alternately. In the first time period, the first polarity data drive signal is output to drive the first sub-pixels of each pixel group to make the first sub-pixel of each pixel group to be a first polarity. In the second time period, the second polarity data drive signal is output to drive the second sub-pixel of each pixel group to make the second sub-pixel of each pixel group to be a second polarity. Polarities of sub-pixels of each column are the same.

Abstract: An embodiment of the present application provides a source driver chip and a display device. Specifically, the source driver chip includes a first pre-charging module for pre-charging first data lines to a first preset voltage and pre-charging second data lines to a second preset voltage when a voltage of a first data signal is greater than a preset reference voltage.

Abstract: A GOA circuit and a display panel are provided. The GOA circuit includes a first pull-down module for pulling down a voltage level of a current-stage gate driving signal, a second pull-down module for pulling down a voltage level of the first node, a third pull-down module for pulling down a voltage level of the second node, and a fourth pull-down module for pulling down the voltage level of the current-stage gate driving signal. The GOA circuit raises the effect of pulling down the current-stage gate driving signal.

Abstract: The flicker performance manager disclosed herein implements a method including measuring a liquid crystal (LC) common voltage (VCOM) over a predetermined period of operation an LCD panel having a plurality of LCs, determining a shift in the VCOM (VCOM shift) over the predetermined period based at least in part on the measured VCO, storing the VCOM shift as a function of time in a table of an embedded controller, receiving a power-on signal for the LCD panel and adjusting a VCOM reference level applied to the LCs based at least in part on the stored values of the VCOM shift.

Abstract: The present disclosure relates to a data-driving device and a system for driving a display device and, more specifically, a data-driving device and a system for reducing power consumption of a display device by reducing a static current of the data-driving device.

Abstract: A pixel includes: a capacitor connected between a first voltage line and a first node; a light emitting diode including a first electrode connected to a second node, and a second electrode connected to a second voltage line; a first transistor; a second transistor; a third transistor including a first electrode connected to the first node, a second electrode connected to the second node, and a gate electrode to receive a first scan signal; a fourth transistor including a first electrode connected to the first node, a second electrode connected to a third voltage line to receive a third voltage, and a gate electrode to receive a second scan signal; and a compensation transistor including a first electrode connected to the first node, a second electrode connected to a fourth voltage line to receive a compensation voltage, and a gate electrode to receive a compensation control voltage.

Abstract: A capacitive touch sensor is disclosed for use with input signal. The capacitive touch sensor includes a number n of input/output lines. Each of the number n of input/output lines is electrically disconnected from every other of the number n of input/output lines. Each of the number n of input/output lines is arranged to cross every other of the number n of input/output lines. Each of a number ? of positions includes one of the number n of input/output lines crossing another of the number n of input/output lines.

Abstract: In a GOA circuit provided by the present disclosure, a unidirectional feedback circuit is adopted between a first node and a second node of the GOA circuit of the present disclosure, which can reduce complexity of circuit design, make it easier to achieve linear design and in-plane integration, prevent point competition of the first node and the second node, and improve stability of the circuit.

Abstract: In a display device, transistors are disposed on a display panel. When the display panel has a short-circuit, the timing controller sends a signal to the level shifter to disconnect the transistors, causing the display panel to no longer receive scanning signals transmitted from GOA circuits, causing the display panel enter an overcurrent protection state, and thus preventing GOA wirings in the display panel from burning out in an event of the short-circuit.

Abstract: A scan driver including a plurality of scan stages. A first scan stage among the plurality of scan stages includes first-to-sixth transistors and a first capacitor. The first transistor is connected to a first Q node, a first scan clock line, and a first scan line. A second transistor is connected to a first scan carry line and the first Q node. A third transistor is connected to a first sensing carry line and a second sensing carry line. A fourth transistor is connected to a first control line and the third transistor. A fifth transistor is connected to the fourth transistor, a second control line, and a first node. A first capacitor is connected to the fifth transistor. A sixth transistor is connected to a third control line, the first node, and the first Q node.

Abstract: A liquid crystal writing device is erased by a stylus. The liquid crystal writing device includes a liquid crystal layer including cholesteric liquid crystal material. A user applies pressure to a flexible substrate that changes reflectivity of the cholesteric liquid crystal material to form images on the liquid crystal writing device. The liquid crystal layer is disposed between electrically conductive layers. Writing device terminals are electrically conductive and connected to the electrically conductive layers. The stylus includes stylus electronics adapted to apply an erase voltage or erase voltage waveform to the writing device terminals.

Abstract: A computer system including an electronic device and an input device is disclosed. The electronic device includes a touch display area and a control unit. The input device includes a plurality of positioning structures and a grounding piece. The positioning structures are electrically connected to the grounding piece. When the input device is disposed on the touch display area of the electronic device, the control unit detects positions of the positioning structures on the touch display area, calculates a coverage area covered by the input device on the touch display area according to the positions, and determines a range of a display area of the touch display area according to the coverage area.

Abstract: In a GOA circuit and a display panel provided by embodiments of the present application, a reset module is provided in each level of GOA units, so that each level of the GOA units can output a high potential before an end of a frame, all gates in a display area are turned on, and a charge of all pixels in the display area is discharged; after that, each level of the GOA units outputs a low potential, and all of the gates in the display area are set to the low potential.

Abstract: A display panel and a display device are provided. A shift register of the display panel includes a first control unit, configured to receive an input signal and control a signal of a first node in response to a first clock signal; a second control unit, configured to receive a first voltage signal and control a signal of a second node in response to the input signal and the first clock signal; a third control unit, configured to receive the first voltage signal and a second voltage signal and control a signal of a fourth node in response to the signal of the second node and a signal of a third node; and a fourth control unit, configured to receive a third voltage signal and a fourth voltage signal and generate an output signal in response to the signals of the second node and the fourth node.

Abstract: A digital-to-analog conversion circuit, a data driver including the same, and a display device are provided. The circuit includes: a reference voltage generation part, generating a reference voltage group having different voltage values; a decoder, selecting and outputting multiple reference voltages with overlapping from the reference voltage group based on the digital data signal; an amplification circuit, where m (m being an integer of 1 or more and less than x) of first to xth input terminals respectively receive m of multiple reference voltages, and, as an output voltage, a voltage amplified by averaging the voltages respectively received by the first to xth input terminals with predetermined weighting ratios is output; and a selector, which, in a first selection state, supplies the output voltage to (x-m) input terminals among the first to xth input terminals, and in a second selection state, supplies the reference voltages to the (x-m) input terminals.

Abstract: A display apparatus which includes a driver with low power consumption and in which an output voltage of the driver is boosted by a pixel is provided. The source driver in which a logic unit and an amplifier unit operate appropriately by the same low voltage is included, and the pixel has a function of retaining first data, a function of adding second data to the first data to generate third data, and a function of supplying the third data to a display device. Thus, even when a voltage output from the source driver is low, the voltage can be boosted by the pixel; accordingly, the display device can operate appropriately.