Abstract: A trace branch prediction unit includes a trace branch target buffer connected to a trace cache. The trace cache stores traces of micro-ops, with the micro-ops being stored non-sequentially. The trace branch target buffer generally reads a buffer entry corresponding to a particular trace line one clock cycle before the trace line is read to a processor. Using the entry, the trace branch target buffer predicts whether the trace cache should follow the existing trace or leave the trace. If the trace branch target buffer predicts that the trace cache should leave a trace, the trace branch target buffer provides a target address for a new trace. The trace branch target buffer also predicts when a trace is ending and provides a target address for the next trace.

Abstract: A parallel computing system and method having improved performance where a program is concurrently run on a plurality of nodes for reducing total processing time, each node having a processor, a memory, and a predetermined number of communication channels connected to the node and independently connected directly to other nodes. The present invention improves performance of performance of the parallel computing system by providing a system which can provide efficient communication between the processors and between the system and input and output devices. A method is also disclosed which can locate defective nodes with the computing system.