Patents Examined by Wai-Sing Louie
  • Patent number: 8373204
    Abstract: A semiconductor device and method of manufacturing the device is disclosed. In one aspect, the device includes a semiconductor substrate and a GaN-type layer stack on top of the semiconductor substrate. The GaN-type layer stack has at least one buffer layer, a first active layer and a second active layer. Active device regions are definable at an interface of the first and second active layer. The semiconductor substrate is present on an insulating layer and is patterned to define trenches according to a predefined pattern, which includes at least one trench underlying the active device region. The trenches extend from the insulating layer into at least one buffer layer of the GaN-type layer stack and are overgrown within the at least one buffer layer, so as to obtain that the first and the second active layer are continuous at least within the active device regions.
    Type: Grant
    Filed: October 29, 2010
    Date of Patent: February 12, 2013
    Assignee: IMEC
    Inventors: Kai Cheng, Stefan Degroote
  • Patent number: 8368153
    Abstract: A wafer level package of micro electromechanical system (MEMS) microphone includes a substrate, a number of dielectric layers stacked on the substrate, a MEMS diaphragm, a number of supporting rings and a protective layer. The MEMS diaphragm is disposed between two adjacent dielectric layers. A first chamber is between the MEMS diaphragm and the substrate. The supporting rings are disposed in some dielectric layers and stacked with each other. An inner diameter of the lower supporting ring is greater than that of the upper supporting ring. The protective layer is disposed on the upmost supporting ring and covers the MEMS diaphragm. A second chamber is between the MEMS diaphragm and the protective layer. The protective layer defines a number of first through holes for exposing the MEMS diaphragm. The wafer level package of MEMS microphone has an advantage of low cost.
    Type: Grant
    Filed: April 8, 2010
    Date of Patent: February 5, 2013
    Assignee: United Microelectronics Corp.
    Inventors: Chien-Hsin Huang, Li-Che Chen, Ming-I Wang, Bang-Chiang Lan, Hui-Min Wu, Tzung-I Su
  • Patent number: 8368126
    Abstract: Remote contacts to the polysilicon regions of a trench metal oxide semiconductor (MOS) barrier Schottky (TMBS) device, as well as to the polysilicon regions of a MOS field effect transistor (MOSFET) section and of a TMBS section in a monolithically integrated TMBS and MOSFET (SKYFET) device, are employed. The polysilicon is recessed relative to adjacent mesas. Contact of the source metal to the polysilicon regions of the TMBS section is made through an extension of the polysilicon to outside the active region of the TMBS section. This change in the device architecture relieves the need to remove all of the oxides from both the polysilicon and silicon mesa regions of the TMBS section prior to the contact step. As a consequence, encroachment of contact metal into the sidewalls of the trenches in a TMBS device, or in a SKYFET device, is avoided.
    Type: Grant
    Filed: April 7, 2008
    Date of Patent: February 5, 2013
    Assignee: Vishay-Siliconix
    Inventors: Deva N. Pattanayak, Kyle Terrill, Sharon Shi, Misha Lee, Yuming Bai, Kam Lui, Kuo-In Chen
  • Patent number: 8362603
    Abstract: Light-emitting structures, and related components, systems, and methods associated therewith are provided. In one embodiment, a light-emitting structure includes at least one LED, a contact bond pad supported by the at least one LED, and a flexible circuit member bonded to the contact bond pad.
    Type: Grant
    Filed: September 14, 2007
    Date of Patent: January 29, 2013
    Assignee: Luminus Devices, Inc.
    Inventors: Michael Lim, Mark J. Czoschke, Alexei A. Erchak
  • Patent number: 8362469
    Abstract: An organic light emitting display apparatus capable of preventing or reducing an IR drop and a decrease in a contrast ratio, and a method of manufacturing the same. The organic light emitting display apparatus includes: a substrate; a plurality of thin film transistors on the substrate; a plurality of organic light emitting diodes, each of the organic light emitting diodes including: a pixel electrode electrically connected to a corresponding one of the thin film transistors, a portion of an opposite electrode, the opposite electrode being above the substrate and covering all of the substrate, and an intermediate layer between the pixel electrode and the opposite electrode and comprising at least an organic light emitting layer; an opposite electrode bus line between adjacent pixel electrodes of the organic light emitting diodes on the opposite electrode of the organic light emitting diodes; and a black matrix surrounding the opposite electrode bus line.
    Type: Grant
    Filed: August 10, 2010
    Date of Patent: January 29, 2013
    Assignee: Samsung Display Co., Ltd.
    Inventor: Min-Chul Suh
  • Patent number: 8361856
    Abstract: A memory cell includes a vertically oriented transistor having an elevationally outer source/drain region, an elevationally inner source/drain region, and a channel region elevationally between the inner and outer source/drain regions. The inner source/drain region has opposing laterally outer sides. One of a pair of data/sense lines is electrically coupled to and against one of the outer sides of the inner source/drain region. The other of the pair of data/sense lines is electrically coupled to and against the other of the outer sides of the inner source/drain region. An access gate line is elevationally outward of the pair of electrically coupled data/sense lines and is operatively adjacent the channel region. A charge storage device is electrically coupled to the outer source/drain region. Other embodiments and additional aspects, including methods, are disclosed.
    Type: Grant
    Filed: November 1, 2010
    Date of Patent: January 29, 2013
    Assignee: Micron Technology, Inc.
    Inventors: Lars Heineck, Jaydip Guha
  • Patent number: 8362507
    Abstract: An optic assembly is provided. The assembly includes a housing having an upstream end and a downstream end. An LED is positioned in the upstream end of the housing. The LED is configured to generate excitation light therefrom. The excitation light has a first wavelength. An optic is positioned in the downstream end of the housing. The optic is positioned remotely from the LED so that a cavity is formed between the LED and the optic. The excitation light generated from the LED passes downstream through the cavity to the optic. Quantum dots are positioned on the optic. The excitation light excites the quantum dots so that the quantum dots produce emitted light having a second wavelength that is different than the first wavelength of the excitation light.
    Type: Grant
    Filed: November 1, 2010
    Date of Patent: January 29, 2013
    Assignee: Tyco Electronics Corporation
    Inventor: Ronald Martin Weber
  • Patent number: 8362388
    Abstract: A multi-gas mixer for supplying a gas mixture that can uniformly mix a plurality of gases according to the proportional percentages determined by the mass flow rate of each gas is disclosed. The multi-gas mixer comprises a mixer chamber, a plurality of gas inlets, a gas mixture outlet, and at least one gas rotating and mixing unit. The present invention also provides a method for controlling the percentage of each gas to be mixed by use of a plurality of mass flow rate controllers to control the gas flow to produce a gas mixture according to a predetermined proportionality. When the multi-gas mixer delivers a gas mixture to a high-speed plasma torch, the torch can be stably operated under a high voltage (>85V) and a medium current (<650 A) so that a long-arc, high-temperature and high-speed plasma flame can be generated.
    Type: Grant
    Filed: October 29, 2009
    Date of Patent: January 29, 2013
    Assignee: Institute of Nuclear Energy Research Atomic Energy Council, Executive Yuan
    Inventors: Chang-Sing Hwang, Chun-Huang Tsai, Nian-Tzu Suen, Jen-Feng Yu
  • Patent number: 8354704
    Abstract: A method of processing a flash memory device provides a semiconductor substrate including a surface region and forming a gate dielectric layer overlying the surface region. The method forms a floating gate layer having a thickness and including a first floating gate structure overlying a first portion of the gate dielectric layer and a second floating gate structure overlying a second portion of the gate dielectric layer. The method forms a trench region interposed between the first and second floating gate structures and extending through the entire thickness and through a portion of the surface region into a depth of the substrate. The method fills the entire depth of the trench region in the substrate and a portion of the trench region over the substrate using a dielectric fill material. The method forms an oxide on nitride on oxide (ONO) layer overlying the first and second floating gate structures and the dielectric material and a control gate overlying the ONO layer.
    Type: Grant
    Filed: November 1, 2010
    Date of Patent: January 15, 2013
    Assignee: Semiconductor Manufacturing International (Shanghai) Corporation
    Inventors: Li Jiang, Hong Xiu Peng, Jong Woo Kim
  • Patent number: 8354711
    Abstract: Improved MOSFET structures and processes, where multiple polysilicon embedded regions are introduced into the n+ source contact area. A top poly Field Plate is used to shield the electric field from penetrating into the channel, so that a very short channel can be used without jeopardizing the device drain-source leakage current. A bottom poly Field Plate is used to modulate the electric field distribution in the drift region such that a more uniform field distribution can be obtained.
    Type: Grant
    Filed: January 11, 2010
    Date of Patent: January 15, 2013
    Assignee: MaxPower Semiconductor, Inc.
    Inventors: Jun Zeng, Mohamed N. Darwish, Richard A Blanchard
  • Patent number: 8354296
    Abstract: A semiconductor structure including an ordered array of parallel graphene nanoribbons located on a surface of a semiconductor substrate is provided using a deterministically assembled parallel set of nanowires as an etch mask. The deterministically assembled parallel set of nanowires is formed across a gap present in a patterned graphene layer utilizing an electric field assisted assembly process. A semiconductor device, such as a field effect transistor, can be formed on the ordered array of parallel graphene nanoribbons.
    Type: Grant
    Filed: January 19, 2011
    Date of Patent: January 15, 2013
    Assignee: International Business Machines Corporation
    Inventors: Christos D. Dimitrakopoulos, Alfred Grill, Timothy J. McArdle
  • Patent number: 8354332
    Abstract: A micro-electromechanical resonator includes a resonator body having a semiconductor region therein doped with boron to a level greater than about 1×1018 cm?3 and even greater than about 1×1019 cm?3, in order to obtain reductions in the temperature coefficient of frequency (TCF) of the resonator over a relatively large temperature range. Still further improvements in TCF can be achieved by degenerately doping the resonator body with boron and/or by boron-assisted aluminum doping of the resonator body.
    Type: Grant
    Filed: September 30, 2009
    Date of Patent: January 15, 2013
    Assignee: Georgia Tech Research Corporation
    Inventors: Farrokh Ayazi, Ashwin Samarao
  • Patent number: 8350302
    Abstract: An organic light emitting display apparatus is disclosed. The organic light emitting display apparatus includes: a substrate, a seal facing the substrate, bonded to the substrate, a display area disposed on the substrate configured to produce an image, a pad area disposed on the substrate, present on at least one side of the display area, an insulating layer directly extending from the display area, formed on the pad area, a first adhesive layer surrounding the display area, which bonds the substrate to the seal, and comprising an organic material, and a second adhesive layer insulated from the pad area by the insulating layer, disposed outside the first adhesive layer, which bonds the substrate to the seal.
    Type: Grant
    Filed: November 1, 2010
    Date of Patent: January 8, 2013
    Assignee: Samsung Display Co., Ltd.
    Inventors: Sun-Young Lee, Jong-Hyuk Lee, Yoon-Hyeung Cho, Min-Ho Oh, Byoung-Duk Lee, So-Young Lee
  • Patent number: 8349718
    Abstract: According to certain embodiments, a silicide layer is formed after the fabrication of a functional gate electrode using a gate-last scheme. An initial semiconductor structure has at least one impurity regions formed on a semiconductor substrate, a sacrifice film formed over the impurity region, an isolation layer formed over the sacrifice film and a dielectric layer formed over the isolation film. A via is patterned into the dielectric layer of the initial semiconductor structure and through the thickness of the isolation layer such that a contact opening is formed in the isolation layer. The sacrifice film underlying the isolation layer is then removed leaving a void space underlying the isolation layer. Then, a metal silicide precursor is placed within the void space, and the metal silicide precursor is converted to a silicide layer through an annealing process.
    Type: Grant
    Filed: March 24, 2011
    Date of Patent: January 8, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Yoshihiro Uozumi
  • Patent number: 8349707
    Abstract: A process for producing electrical contact connections for a component integrated in a substrate material is provided, the substrate material having a first surface region, and at least one terminal contact being arranged at least partially in the first surface region for each component, which is distinguished in particular by application of a covering to the first surface region and production of at least one contact passage which, in the substrate material, runs transversely with respect to the first surface region, in which process, in order to form at least one contact location in a second surface region which is to be provided, at least one electrical contact connection from the contact location to at least one of the terminal contacts is produced via the respective contact passages.
    Type: Grant
    Filed: September 30, 2010
    Date of Patent: January 8, 2013
    Assignee: Wafer-Level Packaging Portfolio LLC
    Inventors: Dipl.-Ing. Florian Bieck, Jürgen Leib
  • Patent number: 8344404
    Abstract: To provide a wavelength conversion member having good surface accuracy and dimensional accuracy even when processed in various shapes, and a method for manufacturing the same. A method for manufacturing a wavelength conversion member, including the steps of: subjecting a preform made of a powder mixture containing a glass powder and an inorganic phosphor powder to heat treatment, thereby obtaining a sintered powder product; and re-press molding the sintered powder product with a die.
    Type: Grant
    Filed: January 28, 2009
    Date of Patent: January 1, 2013
    Assignee: Nippon Electric Glass Co., Ltd.
    Inventors: Shunsuke Fujita, Yoshio Umayahara, Akihiko Sakamoto
  • Patent number: 8344365
    Abstract: Embodiments of the present invention are directed to a heterocyclic compound and an organic light-emitting device including the heterocyclic compound. The organic light-emitting devices using the heterocyclic compounds have high-efficiency, low driving voltage, high luminance and long lifespan.
    Type: Grant
    Filed: August 10, 2010
    Date of Patent: January 1, 2013
    Assignee: Samsung Display Co., Ltd.
    Inventors: Young-Kook Kim, Seok-Hwan Hwang, Yoon-Hyun Kwak, Hye-Jin Jung, Jong-Hyuk Lee, Jin-O Lim, Hee-Joo Ko
  • Patent number: 8342963
    Abstract: A method for controlling an artificial-intelligence (AI) character includes entering a command mode which enables control of the AI character, and occurs while substantially maintaining an existing display of the game, thereby preserving the immersive experience of the video game for the player. A plurality of locations are sequentially specified within a virtual space of the game, the plurality of locations defining a path for the AI character. The AI character is moved along the path to the plurality of locations in the order they were specified. The plurality of locations may be specified by maneuvering a reticle, and selecting each of the locations. A node can be displayed in the existing display of the game at each of the plurality of locations. A series of lines connecting the nodes can also be displayed in the existing display of the game.
    Type: Grant
    Filed: April 10, 2009
    Date of Patent: January 1, 2013
    Assignee: Sony Computer Entertainment America Inc.
    Inventors: Travis Steiner, Eric Housden, Robbie Klapka, Tom Sternberg, Brandon Whitley
  • Patent number: 8340319
    Abstract: A playback device includes: a playback portion that plays back content and outputs at least an audio signal; an acquisition portion that acquires an external audio signal; a generating portion that, based on noise collected by a sound collecting device, generates a noise cancellation signal to reduce the noise; a switching portion that, if the acquisition portion has acquired the external audio signal when the playback portion is playing back content, switches an output signal from the audio signal to the external audio signal; and a synthesizing portion that synthesizes the output signal from the switching portion with the noise cancellation signal.
    Type: Grant
    Filed: November 21, 2008
    Date of Patent: December 25, 2012
    Assignee: Sony Corporation
    Inventors: Takashi Kinouchi, Kiminobu Ichimura
  • Patent number: 8338824
    Abstract: By doping an organic compound functioning as an electron donor (hereinafter referred to as donor molecules) into an organic compound layer contacting a cathode, donor levels can be formed between respective LUMO (lowest unoccupied molecular orbital) levels between the cathode and the organic compound layer, and therefore electrons can be injected from the cathode, and transmission of the injected electrons can be performed with good efficiency. Further, there are no problems such as excessive energy loss, deterioration of the organic compound layer itself, and the like accompanying electron movement, and therefore an increase in the electron injecting characteristics and a decrease in the driver voltage can both be achieved without depending on the work function of the cathode material.
    Type: Grant
    Filed: January 6, 2011
    Date of Patent: December 25, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takeshi Nishi, Satoshi Seo