Patents Examined by Xiaoliang Chen
  • Patent number: 10925166
    Abstract: A fixture and method are directed to releasably couple the fixture to a semi-flexible printed circuit board (PCB)/printed circuit board assembly (PCBA) at a flexible PCB/PCBA portion. The fixture includes a body with a first arm and a second arm extending from a base, an interior surface of the first arm facing an interior surface of the second arm. A first ridge extends from the interior surface of the first arm and defines a first gap between the first ridge and the interior surface of the second arm. The first gap is sized to receive and support a flexible PCB/PCBA portion. At least one second ridge extends from the interior surface of the first arm and defines a second gap between the at least one second ridge and the interior surface of the second arm. The second gap is sized to receive and support a rigid PCB/PCBA portion.
    Type: Grant
    Filed: December 20, 2019
    Date of Patent: February 16, 2021
    Assignee: QUANTA COMPUTER INC.
    Inventors: Yaw-Tzorng Tsorng, Chen-Chien Kuo, Jui-Tang Chang
  • Patent number: 10920946
    Abstract: An in-mold electronics package includes a printed circuit board (PCB) having a first side and a second side, the PCB defining an opening, a light emitting diode (LED) disposed on the second side adjacent the opening, a light guide disposed on the second side of the PCB and partially disposed within the opening, a film disposed on the first side of the PCB, and a cover disposed over the film, the cover connected to the light guide, and wherein the cover and the light guide cooperate to form at least one sealed perimeter wall of the in-mold electronics package.
    Type: Grant
    Filed: May 30, 2019
    Date of Patent: February 16, 2021
    Inventor: Indraneel Page
  • Patent number: 10917965
    Abstract: A display panel includes: a substrate including a display area and a peripheral area outside the display area; and a first conductive layer in the peripheral area, an entire upper surface of which is exposed to an outside of the display device. The first conductive layer includes a main part and a plurality of protrusions protruding from the main part in a direction parallel to an upper surface of the substrate.
    Type: Grant
    Filed: September 26, 2019
    Date of Patent: February 9, 2021
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Hyunae Park, Wonkyu Kwak, Dongsoo Kim, Jieun Lee, Soyoung Lee, Wonmi Hwang
  • Patent number: 10917976
    Abstract: A method may include obtaining a printed circuit board (PCB) that includes a set of vias that include a set of stub regions. The PCB may include a set of layers perpendicular to the set of vias. The set of layers may include a signal layer and a ground layer. The ground layer may be located between the set of stub regions and the signal layer. The method may include drilling to remove at least a portion of a stub region of a via of the set of vias. The method may include performing an electrical test to determine whether a sliver of conductive material is included within the via after drilling to remove the at least a portion of the stub region of the via.
    Type: Grant
    Filed: July 12, 2017
    Date of Patent: February 9, 2021
    Assignee: Juniper Networks, Inc.
    Inventors: Steve M. Wilkinson, Daniel J. Prezioso
  • Patent number: 10912187
    Abstract: A printed board including an external interface, a frame ground trace electrically connected to the external interface, a circuit member spaced from the frame ground trace, and a resonance trace disposed between the frame ground trace and the circuit member with a gap present between the resonance trace and the frame ground trace. The resonance trace is connected to the circuit member at at least two positions. The resonance trace and the circuit member together form a loop member configured in the form of a closed circuit of the resonance trace and the circuit member.
    Type: Grant
    Filed: May 31, 2018
    Date of Patent: February 2, 2021
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Norihiko Akashi, Yudai Yoneoka, Nobuyuki Haruna, Yoshiaki Irifune, Satoshi Ohdaira, Takashi Miyasaka
  • Patent number: 10905000
    Abstract: A display device includes a display module, a protective film, and a cover member. The display module includes a non-bending area, and a bending area bent from the non-bending area. The protective film is peelably attached to a bottom surface of the display module, the protection film being configured to be peeled off the bottom surface. The cover member includes a first contact portion coupled to one area of the protective film, a bending protection portion supporting one end of the display module, and a connecting portion having one end connected to the first contact portion and another end connected to the bending protection portion. A planar shape of the first contact portion includes a curved edge.
    Type: Grant
    Filed: June 4, 2019
    Date of Patent: January 26, 2021
    Assignee: Samsung Display Co., Ltd.
    Inventors: Seung Hyeon Lee, Yun Ho Kim
  • Patent number: 10905008
    Abstract: A wiring board includes: a wiring-board body including a first surface and a second surface opposite to the first surface, and including at least one insulator layer; pads formed at at least one of an internal layer boundary plane and the first surface and the second surface defining a first plane; and via conductors connected to corresponding ones of the pads, and arranged in parallel to extend in a thickness direction of the wiring-board body. Each of first and second ones of the pads adjacent to each other in planar view at the first plane is connected to corresponding ones of the via conductors. The via conductors corresponding to the first pad are arranged differently from the via conductors corresponding to the second pad, in planar view.
    Type: Grant
    Filed: May 11, 2018
    Date of Patent: January 26, 2021
    Assignee: NGK SPARK PLUG CO., LTD.
    Inventors: Takahiro Hayashi, Takuya Hando
  • Patent number: 10901253
    Abstract: A button deck assembly includes a button deck having at least one mechanical pushbutton, the pushbutton includes a lens cap, a liquid-crystal display (LCD) panel, and an optical block configured to transmit images from the LCD panel for display through the lens cap, a bottom surface of the optical block is positioned on the LCD panel, an air gap is defined between a top surface of the optical block and the lens cap. The assembly also includes a printed circuit board (PCB) assembly defining a PCB aperture, the PCB aperture is sized to receive the optical block, and an elastomeric membrane defining a membrane aperture sized to receive the optical block, the optical block extends from the LCD panel through the PCB and membrane apertures, the membrane channels fluid flow to outer edges of the membrane and around the PCB assembly and the LCD panel.
    Type: Grant
    Filed: September 23, 2019
    Date of Patent: January 26, 2021
    Assignee: Aristocrat Technologies Australia Pty Limited
    Inventor: Timothy Seckel
  • Patent number: 10897813
    Abstract: A differential trace pair system includes a board having a first, a second, a third, and a fourth board structure member. A differential trace pair in the board includes a first differential trace extending between the first and the third board structure members, and a second differential trace extending between the second and the fourth board structure members. The differential trace pair includes a serpentine region that includes a first portion and a second portion where the first and the second differential traces have a first width, are substantially parallel, and spaced apart by a first differential trace pair spacing, and a third portion in which the second differential trace includes a second width that is greater than the first width, the first and second differential traces are substantially parallel and spaced apart by a second differential trace pair spacing that is greater than the first differential trace pair spacing.
    Type: Grant
    Filed: November 18, 2019
    Date of Patent: January 19, 2021
    Assignee: Dell Products L.P.
    Inventors: Umesh Chandra, Bhyrav M. Mutnury, Chun-Lin Liao
  • Patent number: 10896861
    Abstract: An HPA MMIC assembly includes a MMIC device coupled to a thermal spreader. A ground plane is provided on the thermal spreader and coupled to FETs in the MMIC device. The multiple levels of metal separated by multiple dielectric layers provide low-loss broad-band microstrip circuits. The thermal spreader may include diamond, an air/wire-edm spreader or a multi-layer board (MLB) with heat sink vias and ground vias.
    Type: Grant
    Filed: April 22, 2019
    Date of Patent: January 19, 2021
    Assignee: Raytheon Company
    Inventors: David D. Heston, John G. Heston, Claire E. Mooney, Mikel J. White, Jon Mooney, Tiffany Cassidy
  • Patent number: 10893605
    Abstract: A printed circuit board includes a substrate and at least one electrical circuit provided at least partially on a surface layer of the printed circuit board. The electrical circuit includes an electrical trace that is in electrical connection with a test pad provided for accessibility on the surface layer, the test pad being sized and shaped for probing to test an aspect of the circuit, the test pad having a conductive probe surface that is structured to provide at least one vertical surface that extends from the probe surface toward the surface layer and thus providing an edge between the vertical surface and the probe surface, the probe surface having a coating of a material to protect the conductive probe surface from corrosion.
    Type: Grant
    Filed: May 28, 2019
    Date of Patent: January 12, 2021
    Assignee: Seagate Technology LLC
    Inventors: Michael Richard Fabry, William Bradford Green
  • Patent number: 10885811
    Abstract: A method of using a hand-made circuit board for learning includes: providing a hand-made circuit board which comprises a substrate; and a medium layer disposed on a surface of the substrate to form a pattern, wherein the medium layer has a notably paintable non-conductive zone configured with a plurality of electrical blocks, and the electrical blocks are discontinuously distributed in the notably paintable non-conductive zone, so that the electrical blocks on at least one cross-section of the notably paintable non-conductive zone are not electrically connected; and drawing a drawn conductive layer on the notably paintable non-conductive zone of the pattern by an end user, wherein the drawn conductive layer has conductive particles linking the electrical particle blocks in the notably paintable non-conductive zone, thereby electrically connecting the electrical particle blocks to complete a circuit line.
    Type: Grant
    Filed: April 27, 2020
    Date of Patent: January 5, 2021
    Assignee: Aidmics Biotechnology (HK) Co., Limited
    Inventor: Chang-Ching Yeh
  • Patent number: 10881001
    Abstract: An interconnect component is configured as an adapter or interposer providing mechanical and electrical interconnects between conductive threads, such as those woven within fabrics, and electrical connection points, such as contact pads on a printed circuit board (PCB), a flexible printed circuit (FPC), and/or a rigid-flex circuit board.
    Type: Grant
    Filed: March 2, 2018
    Date of Patent: December 29, 2020
    Assignee: Flex Ltd.
    Inventors: Mark Bergman, Yolita Nugent
  • Patent number: 10876471
    Abstract: A genset enclosure assembly comprises a first enclosure defining a first internal volume. A genset engine is positioned within the first internal volume. A first opening is defined in a first sidewall of a first side of the first enclosure. The genset enclosure assembly also includes a second enclosure defining a second internal volume. The second enclosure is positioned adjacent to the first side and removably coupled to the first side of the first enclosure. A first genset module is positioned in the second internal volume and operably coupled to the genset engine through the first opening.
    Type: Grant
    Filed: April 11, 2017
    Date of Patent: December 29, 2020
    Assignee: Cummins Power Generation Limited
    Inventors: Peter A. Goleczka, Gordon A. Read
  • Patent number: 10881008
    Abstract: A multi-layered circuit board proofed against conductor loss or diminution when heated includes first and second circuit base boards. Each first circuit base board includes a first dielectric layer and a first wiring layer formed thereon and a first stepped paste block as a conductor formed in the first dielectric layer. The first stepped paste block is electrically connected to the first dielectric layer. Each second circuit base board includes a second dielectric layer and a second wiring layer, a second stepped paste block as a conductor is formed in the second dielectric layer. When pressed together for an electrical interconnection, the paste blocks are sealed and thus captive between the first and second circuit base boards.
    Type: Grant
    Filed: January 13, 2020
    Date of Patent: December 29, 2020
    Assignees: Avary Holding (Shenzhen) Co., Limited., QING DING PRECISION ELECTRONICS (HUAIAN) CO., LTD
    Inventors: Zhi Guo, Chao-Feng Huang
  • Patent number: 10859326
    Abstract: A heatsink may include multiple fin portions soldered together. The fin portions may have stair-stepped surfaces that provide improved thermal dissipation over conventional singular block heatsinks. The portions may be made of different materials, which can allow the heatsink to be made of materials that can be manufactured thinner. The thinner fins can further improve thermal dissipation performance.
    Type: Grant
    Filed: January 9, 2019
    Date of Patent: December 8, 2020
    Assignee: Dell Products L.P.
    Inventors: Ting-Chiang Huang, Tse-An Chu
  • Patent number: 10863625
    Abstract: A flexible printed circuit board includes: a base material including a principal face; at least one first wiring pattern disposed on the principal face of the base material and extending along a first direction; and a first member and a second member disposed on the first wiring pattern so as to be spaced from each other in the first direction. In the first direction, the first member and the second member divide the flexible printed circuit board into: a first region located opposite to the second member with respect to the first member in the first direction, a second region located between the first member and the second member, a third region located opposite to the first member with respect to the second member, a fourth region in which the first member is disposed, and a fifth region in which the second member is disposed.
    Type: Grant
    Filed: April 19, 2018
    Date of Patent: December 8, 2020
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Takumi Nagamine, Yoichi Kitamura
  • Patent number: 10856403
    Abstract: A power electronics module and a method of producing a power electronics module. The power electronics module includes multiple of power electronic semiconductor chips incorporated in a housing and attached to a substrate, and a heat transfer structure attached to the substrate and having a bottom surface which forms an outer surface of the module and which is adapted to receive a surface of a cooling device, wherein the heat transfer structure includes a compressible base plate.
    Type: Grant
    Filed: January 31, 2019
    Date of Patent: December 1, 2020
    Assignee: ABB Schweiz AG
    Inventors: Jorma Manninen, Mika Silvennoinen, Joni Pakarinen, Kjell Ingman
  • Patent number: 10856404
    Abstract: A signal processing circuit includes: a printed circuit board (PCB) including a first surface layer, a second surface layer, a first reference layer, and a second reference layer, wherein the first and second surface layers are positioned on opposing side of the PCB while the first reference layer and the second reference layer are positioned between the first and second surface layers; a memory chip positioned on the first surface layer; a controller chip positioned on the second surface layer; a first set of signal lines arranged on the first surface layer and coupled with the memory chip, wherein all signal lines in the first set of signal lines does not cross each other; and a second set of signal lines arranged on the second surface layer and coupled with the controller chip, wherein all signal lines in the second set of signal lines does not cross each other.
    Type: Grant
    Filed: January 13, 2020
    Date of Patent: December 1, 2020
    Assignee: REALTEK SEMICONDUCTOR CORP.
    Inventors: Shou-Te Yen, Chao-Min Lai, Ping-Chia Wang
  • Patent number: 10849220
    Abstract: A circuit board has an edge connector with signal traces. The signal traces are formed on a dielectric layer of the circuit board. A reference trace is formed within the dielectric layer or on another surface of the dielectric layer. Parameters of the reference trace are adjusted to set an impedance of a single-ended signal trace or a differential impedance of two adjacent signal traces.
    Type: Grant
    Filed: January 23, 2020
    Date of Patent: November 24, 2020
    Assignee: Super Micro Computer, Inc.
    Inventors: Manhtien V. Phan, Mau-Lin Chou, Chih-Hao Lee