Patents Examined by Y. J. Han
  • Patent number: 5986905
    Abstract: A voltage clamp for a single-ended flyback converter provides partial leakage energy recovery and noise suppression. The voltage clamp is an improved version of a conventional RCD clamp. The voltage clamp includes two switches with different turn-off speeds. The voltage clamp includes a capacitor and two resistors. One resistor is connected in parallel with a capacitor and the other resistor is connected in parallel with the faster switch. The faster switch enables at least partial recovery of energy dissipated in a clamp resistor immediately after turn OFF of the slower switch. When the main switch opens after the faster switch closes, noise in the circuit is suppressed by a damping resistor which thereby remains effectively in a current path after the faster switch has re-opened.
    Type: Grant
    Filed: October 29, 1997
    Date of Patent: November 16, 1999
    Assignee: PI Electronics (H.K.) Limited
    Inventor: Kim Tung Cheng
  • Patent number: 5986441
    Abstract: The circuit configuration captures the load current of a field effect-controllable power semiconductor component. The drain and gate terminals of a further field effect-controllable semiconductor component are connected to the drain and gate terminals, respectively, of the first semiconductor component. A fraction of the load current flows through the further semiconductor component. The load current of the further semiconductor component is set as a function of the drain-to-source voltage of the two semiconductor components. The load current flowing through the further semiconductor component is compared with a reference current and an output signal is generated if the load current falls below a set value.
    Type: Grant
    Filed: February 16, 1999
    Date of Patent: November 16, 1999
    Assignee: Siemens Aktiengesellschaft
    Inventors: Adam-Istvan Koroncai, Jenoe Tihanyi
  • Patent number: 5986384
    Abstract: A self-oscillation type signal converter includes a piezoelectric ceramic, four electrodes P.sub.A, P.sub.B, Q.sub.C and Q.sub.D, a load resistance R consisting of N parts R.sub.i (i=1, 2, . . . , N), N-1 terminals T.sub.i {i=1, 2, . . . , (N-1)} between two parts R.sub.i and R.sub.(i+1), two terminals T.sub.0 and T.sub.N, formed on the electrodes Q.sub.C and Q.sub.D, respectively, a switch, a vibration circuit connected between the electrodes P.sub.A and P.sub.B, and a rectification circuit connected between two of all the terminals T.sub.0, T.sub.i and T.sub.N, via the switch. The electrodes P.sub.A, P.sub.B, Q.sub.C and Q.sub.D are formed on four side surfaces A, B, C and D, of the piezoelectric ceramic, respectively. The load resistance R is connected between the terminals T.sub.0 and T.sub.N. The piezoelectric ceramic, the electrodes P.sub.A, P.sub.B, Q.sub.C and Q.sub.D, form a piezoelectric vibrator. When a high-frequency electric signal E.sub.IN with a voltage V.sub.IN is applied to the electrodes P.
    Type: Grant
    Filed: December 17, 1998
    Date of Patent: November 16, 1999
    Inventor: Kohji Toda
  • Patent number: 5986910
    Abstract: The present invention provides a voltage-current converter which can decrease the circuit scale excluding the capacitor for the stability operation, and which can select one from among two or more output currents is disclosed. Constant voltage Vr generated in constant voltage source 90 is supplied to non-reversing input of op-amp 10, output Vo of op-amp 10 returns to the reversing input of op-amp 10, and the output Vo is connected with resistance R. The gate voltage Va of the P channel MOS transistor and the gate voltage Vb of the N-channel MOS transistor which configure the output circuit of the op-amp 10 is outputted and is supplied to the constant current generation circuit 30. Constant current generation circuit 30 outputs constant current I2 from these voltages Va and Vb.
    Type: Grant
    Filed: November 20, 1998
    Date of Patent: November 16, 1999
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Junji Nakatsuka
  • Patent number: 5986898
    Abstract: Switched-mode power supplies require a power factor correction circuit in order to comply with anticipated regulations for the harmonic load on the line network. In its second current path, which produces a connection between a rectifier element and a tap on the primary winding of a transformer, the switched-mode power supply contains a capacitor which produces current limiting for an inductance in this current path. When the switching transistor is in the switching mode the inductance is charged, when the switching transistor is switched on, in the sense of an energy store until the capacitor is charged. When the switching transistor is switched off, the inductance and the capacitor are discharged via a diode in the direction of an energy-storage capacitor.
    Type: Grant
    Filed: October 15, 1998
    Date of Patent: November 16, 1999
    Assignee: Deutsche Thomson-Brandt GmbH
    Inventors: Michael Meitzner, Jean-Paul Louvel
  • Patent number: 5982162
    Abstract: An internal voltage-down power supply circuit includes a voltage-down circuit, a comparator circuit (current mirror amplifier), and a current source control circuit. The comparator circuit (current mirror amplifier) includes a current source (NMOS). When an external power supply voltage is increased, the current source control circuit reduces a control voltage applied to the gate of the current source to reduce the current from the current source. When the temperature becomes lower, the current source control circuit reduces the control voltage applied to the gate of the current source to reduce the current from the current source. Therefore, the closed loop gain of the internal voltage-down power supply circuit can be suppressed from increasing, and unnecessary oscillation of the internal power supply voltage can be prevented even when the external power supply voltage is increased and the temperature during operation is low.
    Type: Grant
    Filed: January 9, 1997
    Date of Patent: November 9, 1999
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Tadaaki Yamauchi
  • Patent number: 5982640
    Abstract: In a switched-mode power supply, when the controller and the switching device are encapsulated together with a heat sink, in which the drain of the switching device is connected to the heat sink, the heat sink and the paths to the various pins of the controller forms various parasitic capacitances which, when the switching device switches, injects and withdraws inordinately large currents into and from the pins of the controller. In the case of the V.sub.CTRL pin to which is connected a discharge capacitor, the resulting under voltage across the capacitor may be used by circuitry connected to the V.sub.CTRL pin to control the switching of the switching device resulting in throwing the switched-mode power supply out of regulation. A track-and-hold circuit is now connected between the V.sub.CTRL pin and the circuitry to mirror the voltage across the discharge capacitor.
    Type: Grant
    Filed: February 3, 1998
    Date of Patent: November 9, 1999
    Assignee: Philips Electronics North America Corporation
    Inventors: Majid Naveed, Edwin Kluter, Erwin Seinen, Robert J. Fronen, Ton Mobers
  • Patent number: 5982641
    Abstract: A high-voltage power supply of a video display apparatus provides an ultor voltage and a focus voltage to a cathode ray tube. A low-voltage power supply provides a variable voltage to a primary winding of a flyback transformer of the high-voltage power supply. The magnitude of the variable voltage is responsive to first and second feedback signals provided by first and second negative feedback paths. The first feedback signal is derived from the ultor voltage and is used to regulate the ultor voltage. The second feedback signal is provided by the low-voltage power supply via a path that bypasses the high-voltage power supply, and is summed with the first feedback signal to ensure that the focus voltage remains at or above a predetermined minimum voltage.
    Type: Grant
    Filed: August 7, 1998
    Date of Patent: November 9, 1999
    Assignee: Thomson Consumer Electronics, Inc.
    Inventor: David Ross Jackson
  • Patent number: 5977758
    Abstract: In an overcurrent protection circuit, when a control section turns on a switch in response to a signal from a microcomputer so that power is supplied from a power source to an IC card, a signal controlling section prevents the overcurrent protection circuit from functioning even if a current greater than a predetermined level is detected by a current detecting section, until a voltage of the IC card is stabilized. When the control section turns off the switch in response to a signal from the microcomputer, the power supply from the power source to the IC card is stopped, thereby preventing a malfunction of the overcurrent protection circuit, even if the microcomputer goes out of control or malfunctions.
    Type: Grant
    Filed: February 27, 1998
    Date of Patent: November 2, 1999
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Minoru Noguchi, Takahiro Katsumi, Toshiyuki Suzuki, Toshiyuki Kawagishi
  • Patent number: 5973943
    Abstract: A protection circuit for preventing non zero-voltage switching of a lamp resonant output circuit driven by upper and lower half-bridge switches. The protection circuit includes a sense resistor disposed between the lower half bridge switch and ground for developing a voltage corresponding to the current flowing through the lower switch. A comparator compares the voltage developed across the sense resistor against a fixed reference voltage and generates an output indicative of a non zero-voltage switching condition when the voltage across the sense resistor exceeds the fixed reference voltage. A latch is connected to the output of the comparator and generates a latch output signal which disables the generation of drive signals to the upper and lower switches in the event of a non zero-voltage switch condition.
    Type: Grant
    Filed: July 27, 1998
    Date of Patent: October 26, 1999
    Assignee: International Rectifier Corporation
    Inventors: Thomas J. Ribarich, Talbott M. Houk
  • Patent number: 5969964
    Abstract: A power circuit includes at least a high side and low side MOS gated transistor operable to form a bridge circuit across high and low power terminals of a power source; a high side driver circuit having an output operable to change conduction characteristics of the high side MOS gated transistor; and a series coupled diode and capacitor configured in a bootstrap arrangement with the high side and low side transistors to provide an operating voltage to the high side driver circuit.
    Type: Grant
    Filed: April 21, 1998
    Date of Patent: October 19, 1999
    Assignee: International Rectifier Corporation
    Inventor: Vijay Mangtani
  • Patent number: 5945816
    Abstract: A self-biased power isolator system is disclosed that provides a fault tolerant power system without the need for auxiliary power. Enhancement-mode MOSFET 120 includes a drain coupled to a first node, a source coupled to a second node, and a gate. Amplifier 50 includes inputs for comparing the voltages from the first and second nodes and an output coupled to the gate of MOSFET 120 by which amplifier 50 controls the state of enhancement-mode MOSFET 120. Amplifier 50 further includes a positive power input coupled to the second node and a negative power input coupled to ground. In one embodiment, the first node is operable to be coupled to a power supply 10 and the second node is operable to be coupled to a load 18. A further embodiment allows the architecture to be replicated, each coupled at the second node to provide an N+1 fault tolerant power system.
    Type: Grant
    Filed: April 21, 1998
    Date of Patent: August 31, 1999
    Assignee: Alcatel Network Systems, Inc.
    Inventor: C. Lee Marusik
  • Patent number: 5946208
    Abstract: A PWM power converter includes a first switching branch of a first switching device and a first inductor between a positive source terminal and a load terminal and a second switching branch of a second inductor and a second switching device between the load terminal and a negative source terminal.
    Type: Grant
    Filed: September 16, 1998
    Date of Patent: August 31, 1999
    Assignee: Kabushiki Kaisha Meidensha
    Inventors: Yasuhiro Yamamoto, Yoshihiro Murai
  • Patent number: 5946020
    Abstract: A method and apparatus for maximizing print quality in a thermal printer uses a ribbon condition monitor to detect the condition of a multipass thermal ribbon. Data related to the condition of the thermal ribbon at each individual pixel is used to determine a custom energization signal for each thermal print element. In one embodiment, the system utilizes a history memory to track the prior heating history of each thermal print element and an ink memory to track the prior use of each location on the thermal print ribbon corresponding to the thermal print elements. The data from the history memory and the ink memory are combined to form an index to a table memory containing data corresponding to a plurality of energization signal levels for a particular print medium. The data in the table memory provides the custom energization signal for each of the thermal print elements. In an alternative embodiment, a light source and detector are used to determine the thickness of ink remaining on the thermal ribbon.
    Type: Grant
    Filed: April 3, 1996
    Date of Patent: August 31, 1999
    Assignee: Intermec Corporation
    Inventors: Thomas A. Rogers, Joel A. Schoen, Christopher A. Wiklof
  • Patent number: 5942881
    Abstract: A power supply unit has an output transistor and two resistors connected in series between a power source line and a ground potential point. The output electrode of the output transistor is connected to an output terminal. Between the output terminal and the ground potential point, a capacitor is connected. When a starting switch is turned on, the output transistor starts conducting. A current limiting circuit is also provided to limit the current that flows through the output transistor when it starts conducting. The current limiting circuit bypasses part of the output current of a comparator to the ground potential point.
    Type: Grant
    Filed: December 22, 1997
    Date of Patent: August 24, 1999
    Assignee: Rohm Co. Ltd.
    Inventors: Hiroyuki Okada, Koichi Inoue
  • Patent number: 5936854
    Abstract: In a direct-current power supply system, an alternating current outputted from an AC power supply is converted by a second diode bridge circuit into a direct current. The direct current is smoothed by voltage doubler capacitors and a smoothing capacitor. A reactor is inserted into an input side of the second diode bridge in series. Detecting circuit is operatively connected to the AC power supply for detecting a zero-crossing point. When the zero-crossing point is detected by the detecting circuit, control means is adapted to firstly switch a switching element on for a first predetermined period of time and, after a predetermined delay period of time has passed since the switching element is firstly switched on, adapted to secondly switch the switching element on for a second predetermined period of time.
    Type: Grant
    Filed: June 24, 1998
    Date of Patent: August 10, 1999
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Michika Uesugi, Atsuyuki Hiruma
  • Patent number: 5933342
    Abstract: A rectification circuit comprises a diode full-wave bridge rectifier, a freewheeling current path and a blocking diode coupled between the rectifier and the freewheeling current path to cause freewheeling current of the bridge rectifier to at least partially flow through the freewheeling current path instead of through the diodes of the bridge rectifier. A result is reduced "reverse recovery" power dissipation in the rectifier diodes.
    Type: Grant
    Filed: June 2, 1998
    Date of Patent: August 3, 1999
    Assignee: Ford Motor Company
    Inventor: Robert Joseph Callanan
  • Patent number: 5933336
    Abstract: A boost converter having multiple L-C branches and a method of operating the same. The boost converter includes first, second and third phase inputs and an output. In one embodiment, the boost converter includes first and second switches coupled between corresponding rails of the output. The boost converter also includes first, second and third capacitors that form first, second and third L-C series branches, respectively, with a first inductor. The first, second and third L-C series branches are coupled between the first, second and third phase inputs, respectively, and a node between the first and second switches. The first and second switches cooperate progressively to employ a voltage across the rails less a voltage across the first, second and third capacitors to discharge currents through the first inductor and thereby reduce input current total harmonic distortion (THD) on all three of the phase inputs.
    Type: Grant
    Filed: July 17, 1998
    Date of Patent: August 3, 1999
    Assignee: Lucent Technologies Inc.
    Inventors: Yimin Jiang, Hengchun Mao
  • Patent number: 5932994
    Abstract: A solar cell power source device is disclosed which optimizes the power output of the solar cell by detecting a maximum power point of the solar cell and controlling the duty cycle of a switching transistor in a switching power converter such that the output current of the solar cell follows the maximum power point. Also shown is a pulse width modulation controller which multiplies the output voltage of the solar cell by the output current of the solar cell to obtain a power detecting signal, samples the power detecting signal during two different sample periods to determine if the power output is decreasing, and modulating the pulses output to the switching transistor of the switching power converter in order to maintain the power output of the solar cell at the maximum power point.
    Type: Grant
    Filed: May 8, 1997
    Date of Patent: August 3, 1999
    Assignee: Samsung Electronics, Co., Ltd.
    Inventors: Hyun-min Jo, Yong-ho Kim
  • Patent number: 5930133
    Abstract: A tunnel diode is used as a rectifying device. The tunnel diode is so implemented as to suppress a flow of a current relative to an applied forward voltage of AC which is greater than a voltage at a peak value of a tunnel current. Stated in another word, use is made of a semiconductor of a wide forbidden band width so as to enable the forward turn-on voltage of the diode to be made greater than a maximum value of the applied voltage. Upon application of a reverse voltage to the diode, on the other hand, a greater tunnel current flows from a zero bias time. By connecting the tunnel diode, unlike an ordinary diode, in a reverse-bias fashion in the rectifying circuit, it is possible to realize a rectifying device whose turn-on voltage is zero and to prevent less rectifying efficiency at a power supply circuit of low voltage.
    Type: Grant
    Filed: March 27, 1998
    Date of Patent: July 27, 1999
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Kouhei Morizuka