Patents Examined by Yusef A Ahmed
  • Patent number: 10840799
    Abstract: The power supply apparatus includes a switching element configured to drive a transformer, a primary side and a secondary side of the transformer being insulated from each other, a control unit configured to output a pulse signal for driving the switching element, and a comparing unit configured to compare a target voltage of an output voltage that is output from the secondary side of the transformer and the output voltage, and to control the output voltage to be the target voltage, wherein the comparing unit cuts off an input of the pulse signal to the switching element in a case where the output voltage is larger than the target voltage, and wherein the control unit determines a frequency or an on-duty ratio of the pulse signal according to the target voltage.
    Type: Grant
    Filed: May 21, 2019
    Date of Patent: November 17, 2020
    Assignee: CANON KABUSHIKI KAISHA
    Inventor: Jun Hirabayashi
  • Patent number: 10840796
    Abstract: A power module including first and second switching elements connected in a half-bridge configuration, an integrated circuit including high-side and low-side circuits that respectively drive the first and second switching elements, high-side and low-side programmable circuits that are respectively configured to implement first and second logic functions or parameters to be used by the high-side and low-side circuits. The integrated circuit includes a write port that receives data to be written to the high-side and low-side programmable circuits, internal wiring that connects the high-side and low-side programmable circuits in a daisy chain configuration, and a level shifter that is provided in the internal wiring connecting the low-side programmable circuit to the high-side programmable circuit, and that connects a low-side signal system and a high-side signal system.
    Type: Grant
    Filed: April 22, 2020
    Date of Patent: November 17, 2020
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventor: Masashi Akahane
  • Patent number: 10840806
    Abstract: The clock input of a buck converter is delayed, and the delay is controlled proportionally to the preceding high-side output switch on time. In the steady state, the high-side switch on time is uniform, and the clock is offset by a fixed amount. When sub-harmonic oscillation begins to occur, the high-side switch on time may increase during a cycle. The longer high-side on time causes the clock to be delayed by an increased amount. This has the effect of increasing the following low-side output switch on time. This further increases the subsequent high-side on time, and counteracts the effects of sub-harmonic oscillation. If the system is properly controlled, loop compensation is implemented correctly and sub-harmonic oscillation is prevented. In addition, the scheme may also be configured for the delay to be controlled proportionally to the preceding low-side output switch on time of the buck converter.
    Type: Grant
    Filed: May 25, 2017
    Date of Patent: November 17, 2020
    Assignee: Dialog Semiconductor (UK) Limited
    Inventors: Mark Childs, Jens Masuch
  • Patent number: 10833589
    Abstract: A half bridge circuit is disclosed. The circuit includes low side and high side power switches selectively conductive according to one or more control signals. The circuit also includes a low side power switch driver, configured to control the conductivity state of the low side power switch, and a high side power switch driver, configured to control the conductivity state of the high side power switch. The circuit also includes a controller configured to generate the one or more control signals, a high side slew detect circuit configured to prevent the high side power switch driver from causing the high side power switch to be conductive while the voltage at the switch node is increasing, and a low side slew detect circuit configured to prevent the low side power switch driver from causing the low side power switch to be conductive while the voltage at the switch node is decreasing.
    Type: Grant
    Filed: March 4, 2019
    Date of Patent: November 10, 2020
    Assignee: NAVITAS SEMICONDUCTOR LIMITED
    Inventors: Santosh Sharma, Thomas Ribarich, Victor Sinow, Daniel Marvin Kinzer
  • Patent number: 10819240
    Abstract: A power converter including: a dual output resonant converter including a first output, a second output, a common mode control input, and a differential mode control input, wherein a voltage/current at the first output and a voltage/current at the second output are controlled in response to a common mode control signal received at the common mode control input and a differential mode control signal received at the differential mode control input; a dual output controller including a first error signal input, a second error signal input, a common mode control output, and a differential mode control output, wherein the dual output controller is configured to generate the common mode control signal and the differential mode control signal in response to a first error signal received at the first error signal input and a second error signal received at the second error signal input, wherein the first error signal is a function of the voltage/current at the first output and the second error signal is a function of
    Type: Grant
    Filed: January 25, 2018
    Date of Patent: October 27, 2020
    Assignee: NXP B.V.
    Inventor: Hans Halberstadt
  • Patent number: 10819217
    Abstract: A power conversion device includes: power conversion circuitry including a plurality of submodules connected in series to each other; a protection device generating a protection command for protecting each submodule; and one or more relay devices outputting the protection command to each submodule. The relay device includes: a first communication circuit for communicating with the protection device; and a second communication circuit for communicating with the power conversion circuitry. The first communication circuit transmits the stop command to the second communication circuit through a first communication channel, and transmits different information different from the stop command to the second communication circuit through a second communication channel. The communication speed of communication through the first communication channel is higher than that of communication through the second communication channel.
    Type: Grant
    Filed: March 3, 2017
    Date of Patent: October 27, 2020
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Yasunori Ido, Muneharu Tokunaga, Hideaki Ohashi
  • Patent number: 10811986
    Abstract: A power converter includes an input side to receive an input voltage, and an output side to provide an output voltage, a main switch, a controller, a transformer having a primary winding that couples the main switch to the input side, an active clamp switch coupled to the input side by an active clamp capacitor, and an active clamp controller circuit. The active clamp controller circuit includes a sampling circuit to generate a sampled main switch voltage, a delay circuit to generate a delayed sampled main switch voltage, a voltage comparison circuit, and an active clamp switch controller circuit configured to i) enable the active clamp switch based on a first comparison between the sampled main switch voltage and the delayed sampled main switch voltage, and ii) disable the active clamp switch based on a second comparison between the sampled main switch voltage and the delayed sampled main switch voltage.
    Type: Grant
    Filed: September 13, 2019
    Date of Patent: October 20, 2020
    Assignee: Appulse Power Inc.
    Inventor: Aleksandar Radic
  • Patent number: 10811981
    Abstract: A power converter including: a dual output resonant converter including a first output, a second output, a common mode control input, and a differential mode control input, wherein a voltage/current at the first output and a voltage/current at the second output are controlled in response to a common mode control signal received at the common mode control input and a differential mode control signal received at the differential mode control input; and a dual output controller including a first error signal input, a second error signal input, a delta power signal input, a common mode control output, and a differential mode control output, wherein the dual output controller is configured to generate the common mode control signal and the differential mode control signal in response to a first error signal received at the first error signal input and a second error signal received at the second error signal input, wherein the first error signal is a function of the voltage/current at the first output and the seco
    Type: Grant
    Filed: January 25, 2018
    Date of Patent: October 20, 2020
    Assignee: NXP B.V.
    Inventor: Hans Halberstadt
  • Patent number: 10800044
    Abstract: A conveyor employs electrostatic force to selectively adhere packages to an inclined conveying surface and selectively release packages from the inclined conveying surface to separate the packages from each other. A pair of electrodes embedded in the body of a conveyor belt module are selectively energized via electrically conductive hinge rods used to connect conveyor belt modules together to generate the electrostatic force.
    Type: Grant
    Filed: August 22, 2018
    Date of Patent: October 13, 2020
    Assignee: Laitram, L.L.C.
    Inventor: Matthew L. Fourney
  • Patent number: 10804258
    Abstract: An ESD protection device that includes a semiconductor substrate that has a first main surface, terminal electrodes formed on the first main surface, a terminal electrode that is connected to the ground, and a wiring electrode that connects the terminal electrodes to each other and that forms a part of a main line. Moreover, the semiconductor substrate has a rectangular cuboid shape in a plan view and further includes a first semiconductor region that is connected to the wiring electrode, a second semiconductor region that is connected to the third terminal electrode, and a third semiconductor region. The first semiconductor region and the second semiconductor region are arranged along short sides of the semiconductor substrate and electrically connected to each other with the third semiconductor region that extends along the short sides interposed therebetween.
    Type: Grant
    Filed: October 16, 2018
    Date of Patent: October 13, 2020
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Noriyuki Ueki
  • Patent number: 10804186
    Abstract: Provided are a semiconductor module capable of further increasing an effect of canceling out a parasitic inductance by a current and a power converter including the semiconductor module. The semiconductor module includes a first leadframe, a second leadframe, a third leadframe, an insulating material, a first semiconductor element, and a second semiconductor element. The first leadframe is a plate-shaped wiring path to which a first potential is applied. The second leadframe is a plate-shaped wiring path including an output terminal. The third leadframe is a plate-shaped wiring path to which a second potential is applied. The first semiconductor element is directly joined to the first leadframe with a joint material therebetween, and the second semiconductor element is directly joined to the second leadframe with a joint material therebetween. The first leadframe and the second leadframe face each other with the insulating material therebetween.
    Type: Grant
    Filed: January 12, 2018
    Date of Patent: October 13, 2020
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Shinya Yano, Yasushi Nakayama
  • Patent number: 10794982
    Abstract: A method for dynamic calibration of current sense for switching converters includes biasing a reference transistor with a Zero Temperature Coefficient current source, and a respective gate of each of the reference transistor and a power transistor with a gate voltage. The reference transistor and the power transistor each comprise a matching temperature coefficient. A reference voltage sensed across the reference transistor is multiplied by a gain, thereby generating a first calibration voltage, wherein the gain is determined by a gain coefficient. A transistor voltage sensed across the power transistor is multiplied by the gain, thereby generating a second calibration voltage. The first calibration voltage is compared to a target voltage to generate an error voltage. The gain coefficient is determined with an Analog to Digital Converter in response to the error voltage, thereby minimizing a difference between the target voltage and each of the calibration voltages.
    Type: Grant
    Filed: November 21, 2018
    Date of Patent: October 6, 2020
    Assignee: NXP USA, Inc.
    Inventor: Trevor Mark Newlin
  • Patent number: 10790746
    Abstract: The present disclosure provides a DC-DC switching converter architecture that utilizes the chip's thermal capacity effectively by implementing adaptive switching frequency scaling over the operation region, keeping the die/package temperature constant. The power budget is effectively utilized, and the external components such as capacitors, inductors, and pass device sizes are reduced, thereby increasing the efficiency of the switching converter. An adaptive frequency scalar is optimized, avoiding losses, especially at high loads. The larger the input and output voltage ranges, the bigger the benefit the disclosure becomes.
    Type: Grant
    Filed: August 4, 2017
    Date of Patent: September 29, 2020
    Assignee: Dialog Semiconductor (UK) Limited
    Inventors: Turev Acar, Selcuk Talay
  • Patent number: 10784796
    Abstract: An electronic device and a power supply method thereof are provided. The electronic device includes a plurality of power terminals, a plurality of bridge rectifiers, a detector, a power supply circuit, and a basic device. The detector detects current directions of currents flowing through the power terminals. The power supply circuit is electrically coupled to the power terminals through the bridge rectifiers. The basic device obtains power from the power supply circuit. At least two of the power terminals are selectively electrically coupled to an external power line. The power supply circuit supplies power to the basic device from the external power line through the bridge rectifiers. The basic device controls the power supply circuit according to the current directions of the at least two of the power terminals electrically coupled to the external power line, so as to output power between another at least two of the power terminals.
    Type: Grant
    Filed: February 26, 2019
    Date of Patent: September 22, 2020
    Assignee: Wistron Corporation
    Inventor: Wei-Lun Liu
  • Patent number: 10778089
    Abstract: An active electromagnetic interference (EMI) filter includes a first amplifier and a second amplifier. The first amplifier is configured to sense noise signals on a power conductor. The second amplifier is coupled to the first amplifier and is configured to drive a cancellation signal onto the power conductor. The cancellation signal is to reduce the amplitude of the noise signals sensed by the first amplifier. An output impedance of the second amplifier is lower than an output impedance of the first amplifier.
    Type: Grant
    Filed: September 26, 2017
    Date of Patent: September 15, 2020
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Yongbin Chu, Yogesh Ramadass, Saurav Bandyopadhyay, Todd Allen Toporski, Jeffrey Anthony Morroni
  • Patent number: 10778103
    Abstract: An apparatus for controlling a power converter includes an analog-to-digital converter to generate a digital representation of a voltage sense signal indicative of an input voltage of the power converter. The apparatus includes a first comparison circuit to generate a first comparison signal using a current sense signal indicative of a current through a primary-side switch of the power converter. The apparatus includes a gate driver to provide a gate drive signal to the primary-side switch based on a control signal, and a digital controller. The digital controller is configured to produce a time scalar value using the digital representation of the voltage sense signal, produce a timing signal using the control signal and the first comparison signal, scale the timing signal using the time scalar value, and adjust a timing of the control signal to limit a peak current through the primary-side switch based on the scaled timing signal.
    Type: Grant
    Filed: April 1, 2020
    Date of Patent: September 15, 2020
    Assignee: Silanna Asia Pte Ltd
    Inventor: Aleksandar Radic
  • Patent number: 10775819
    Abstract: A multi-loop voltage regulator with load tracking compensation includes a first closed-loop feedback network configured to receive a supply voltage from a power supply and drive an output voltage that is smaller than the supply voltage to a load. The multi-loop voltage regulator includes a second closed-loop feedback network connected to the first closed-loop feedback network and configured to regulate the output voltage between a first supply voltage rail and a second supply voltage rail for a given load current, in which the second closed-loop feedback network produces a gain that is greater than that of the first closed-loop feedback network. The multi-loop voltage regulator also includes a load tracking compensation circuit configured to detect a load current, and to increase the gain of the second closed-loop feedback network based on a dominant pole in the second closed-loop feedback network being a function of the detected load current.
    Type: Grant
    Filed: January 16, 2019
    Date of Patent: September 15, 2020
    Assignee: Avago Technologies International Sales Pte. Limited
    Inventors: Kevin Roy Vannorsdel, Yongjie Jiang, John Lynn McNitt, Jay Edward Ackerman
  • Patent number: 10770968
    Abstract: An adaptive pulse frequency modulation for a switching power converter is provided that varies the switching frequency across a cycle of a rectified input voltage for the switching power converter From a beginning of the cycle of the rectified input voltage, the switching frequency decreases from a maximum value to a minimum value at a mid-point of the cycle and then increases from the mid-point back to the maximum value at an end of the cycle.
    Type: Grant
    Filed: August 21, 2019
    Date of Patent: September 8, 2020
    Assignee: DIALOG SEMICONDUCTOR INC.
    Inventors: Laiqing Ping, Nan Shi, Xiaoyan Wang
  • Patent number: 10756647
    Abstract: A power converter includes: a converter circuit converting an alternating current to a direct current; a reactor electrically connected to one of output terminals of the converter circuit; a capacitor electrically connected to the other output terminal of the converter circuit and the reactor; and an inverter circuit electrically connected to the capacitor converting the direct current to an alternating current. The capacitor is a film capacitor. The capacitor and the reactor are mounted on an identical circuit board.
    Type: Grant
    Filed: January 22, 2018
    Date of Patent: August 25, 2020
    Assignee: DAIKIN INDUSTRIES, LTD.
    Inventors: Masahide Fujiwara, Nobuyasu Hiraoka, Keito Kotera, Shinichi Ishizeki
  • Patent number: 10748702
    Abstract: A transformer system includes a transformer and a transformer tank. The transformer tank houses the transformer in a bath of a dielectric fluid. The transformer system also includes a controller, and a fiber optic pressure sensor communicatively coupled to the controller. The fiber optic sensor is disposed in the dielectric fluid and operative to provide an output that varies with the pressure of the dielectric fluid. The controller is operative to determine the pressure of the dielectric fluid based on the output of the fiber optic pressure sensor.
    Type: Grant
    Filed: April 28, 2017
    Date of Patent: August 18, 2020
    Assignee: ABB Power Grids Switzerland AG
    Inventor: Luiz V. Cheim