Patents Examined by Zahid Choudhury
  • Patent number: 11184994
    Abstract: According to one aspect, an apparatus includes a first component, a plurality of line card slots, a fan array, and a sensor arrangement. The first component has a first opening defined therein and a second opening defined therein. The first component includes a first configurable line card flapper is arranged to at least partially cover the first opening and a second configurable line card flapper is arranged to at least partially cover the second opening. The plurality of line card slots includes a first line card slot associated with the first opening and a second line card slot associated with the second opening. The fan array includes a plurality of fans. The sensor arrangement includes at least one sensor arranged to monitor at least one condition. The first and second configurable line card flappers are arranged to be configured using information obtained from the sensor arrangement.
    Type: Grant
    Filed: May 18, 2018
    Date of Patent: November 23, 2021
    Assignee: CISCO TECHNOLOGY, INC.
    Inventors: Mandy Hin Lam, Vic Hong Chia, M. Baris Dogruoz
  • Patent number: 11176256
    Abstract: A capability-based data processing architecture (100) integrating an attesting module (120) are disclosed, together with subroutines for: securing the booting phase of a replicated or unreplicated subsystem (150) of computing units (130, 140) in the architecture and attesting to same; for adding and removing computing units (140) to and from booted systems 150; for relabelling authentication tokens when the booted subsystem (150) comprises computing units; for sealing and unsealing a memory storing data structures that are processed by the other subroutines described herein; and for recovering a booted subsystem (150) beset by faults.
    Type: Grant
    Filed: May 17, 2019
    Date of Patent: November 16, 2021
    Assignee: Université du Luxembourg
    Inventors: Marcus Völp, Paulo Esteves-Veríssimo
  • Patent number: 11176009
    Abstract: A method and apparatus for implementing power up detection in a power down cycle to dynamically determine whether a failed component in a system prevents another Initial Program Load (IPL) or re-IPL, or result in a loss of resources. Predefined mandatory functions are called to collect power down/up data that prevents re-IPL, or results in the reduction of resources. A user is notified, allowing the customer to continually utilize the system, while ordering hardware to be replaced.
    Type: Grant
    Filed: October 16, 2018
    Date of Patent: November 16, 2021
    Assignee: International Business Machines Corporation
    Inventors: Lee N. Helgeson, Derek Howard, Russel L. Young, George J. Romano, Mussie T. Negussie
  • Patent number: 11170111
    Abstract: An information handling system may include a management controller configured to direct a basic input/output system to generate an advanced configuration power interface (ACPI) event that is triggered by an update of a host interface attribute. A processor provides at least one function to publish and configure a host interface, where the host interface is associated with a management service. The processor may also detect the ACPI event triggered by the update of the host interface attribute. Subsequent to the detection of the ACPI event, a structure of the host interface associated with the management service and a supported authentication type and security information associated with the supported authentication type may be determined. The processor may authenticate to the host interface via the supported authentication type using the security information and update an operating system variable associated with the update of the host interface attribute.
    Type: Grant
    Filed: June 15, 2020
    Date of Patent: November 9, 2021
    Assignee: Dell Products L.P.
    Inventors: Srinivas Giri Raju Gowda, Syama Sundar Poluri
  • Patent number: 11163349
    Abstract: A Power over Ethernet (PoE) adaptive powering system includes a powered device that identifies a first operating mode in which the powered device is currently operating, determines a first power amount that is required to enable the first operating mode in which the powered device is currently operating, and transmits a first power amount request message that requests the first power amount via a power/data connection. The adaptive PoE powering system also includes a powering device that is connected to the powered device via the power/data connection, and that receives the first power amount request message via the power/data connection, and transmits the first power amount via the power/data connection to the powered device.
    Type: Grant
    Filed: December 6, 2019
    Date of Patent: November 2, 2021
    Assignee: Dell Products L.P.
    Inventors: Aravind Prasad Sridharan, Vigneshwar Kalyanaraman, Ramesh Ganapathi
  • Patent number: 11144327
    Abstract: A method for operating a control unit including a start-up of the control unit in order to bring it into an operative state, and a first start sequence is optionally carried out during the start-up of the control unit in order to set the control unit to a first mode, or a second start sequence is carried out in order to set the control unit to a second mode, the first start sequence including an additional self-test in contrast to the second start sequence.
    Type: Grant
    Filed: July 2, 2018
    Date of Patent: October 12, 2021
    Assignee: Robert Bosch GmbH
    Inventor: Alfred Kuttenberger
  • Patent number: 11137809
    Abstract: A plurality of thermal electric cooler (TEC) elements are formed in a TEC grid structure. Control logic dynamically varies a supply current supplied to each TEC element (or group of TEC elements) in the TEC grid based on changes in power density respectively associated with areas cooled by each of the TEC elements or group of TEC elements.
    Type: Grant
    Filed: December 20, 2018
    Date of Patent: October 5, 2021
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Karthik Rao, Wei Huang, Xudong An, Manish Arora, Joseph L. Greathouse
  • Patent number: 11126251
    Abstract: The present disclosure includes apparatuses and methods related to power management in memory. Memory devices with multiple input/output ports may have the ports separately managed to transfer data from the various to a host or other components of the module based on certain power management signaling or constraints. For example, a memory device with multiple ports may be managed to transfer data to a host from one set of ports in response to power management (or other) signaling, and the device may be managed to transfer other data to another memory device in response to different power management (or other signaling). Power management may be done onboard a memory module with or without direction from a host. Power management may be performed by a dedicated integrated circuit. Data may be transferred from or between different classes of memory devices, using different ports, based on power management, e.g., criteria.
    Type: Grant
    Filed: March 1, 2019
    Date of Patent: September 21, 2021
    Assignee: Micron Technology, Inc.
    Inventors: Frank F. Ross, Matthew A. Prather
  • Patent number: 11126237
    Abstract: According to one embodiment, an electric power supply system includes a processor, a power circuit and an embedded controller. The processor includes a first controller configured to modify an operating frequency of the processor and a second controller configured to modify an operating power of the processor. The power circuit and the embedded controller detect a presence or an absence of a battery in parallel. The power circuit instructs the first controller to modify the operating frequency when removal of the battery is detected. The embedded controller causes the second controller to modify the operating power via a Basic Input/Output System (BIOS) when the removal of the battery is detected, and causes the first controller to stop modify the operating power via the power circuit.
    Type: Grant
    Filed: December 11, 2018
    Date of Patent: September 21, 2021
    Assignee: TOSHIBA CLIENT SOLUTIONS CO., LTD.
    Inventors: Hideki Hirosawa, Tomonori Tsutsui
  • Patent number: 11119556
    Abstract: The present disclosure includes apparatuses and methods for providing indications associated with power management events. An example apparatus may include a plurality of memory units coupled to a shared power management signal. In this example apparatus, each of the plurality of memory units may be configured to provide to the other of the plurality of memory units, via the shared power management signal, an indication of whether the one of the plurality of memory units is entering a power management event. Further, each of the plurality of memory units may be configured to, if the one of the plurality of memory units is entering the power management event, an indication of a particular operation type associated with the power management event.
    Type: Grant
    Filed: August 26, 2019
    Date of Patent: September 14, 2021
    Assignee: Micron Technology, Inc.
    Inventor: Vipul Patel
  • Patent number: 11119562
    Abstract: A method comprises receiving, by a computing device, a desired usage plan for a plurality of user devices associated with a group of users; determining, by the computing device, whether an amount of power available across the plurality of user devices is sufficient to implement the desired usage plan; generating, by the computing device and based on the amount of power available across the plurality of user devices for the desired usage rules, usage rules that allocate the usage of the plurality of the user devices by each user in the group of users; and outputting to the plurality of user devices, the usage rules to cause the plurality of user devices to limit the usage of the plurality of user devices by each user in the group of users based on the allocation.
    Type: Grant
    Filed: April 25, 2019
    Date of Patent: September 14, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: James E. Bostick, John M. Ganci, Jr., Martin G. Keen, Sarbajit K. Rakshit
  • Patent number: 11112846
    Abstract: Embodiments of the present disclosure relate to detecting undervoltage conditions at a subcircuit. A power supply current of a first subcircuit is determined over a first number of previous clock cycles. A cross current flowing between the first subcircuit and a second subcircuit is determined over the first number of previous clock cycles. An estimated momentary supply voltage present at the first subcircuit is then determined based on the power supply current of the first subcircuit over the first number of previous clock cycles and the cross current flowing between the first subcircuit and the second subcircuit over the first number of previous clock cycles.
    Type: Grant
    Filed: December 19, 2018
    Date of Patent: September 7, 2021
    Assignee: International Business Machines Corporation
    Inventors: Thomas Strach, Preetham M. Lobo, Tobias Webel
  • Patent number: 11106195
    Abstract: A communication unit (S1, S2) for industrial automation for use in a communication system (10) of series-connected communication units (M, S1, S2). The communication unit includes a first input (E1) and a first output (A1) and being configured to receive, via the input (E1), an input serial data stream having payload data and to output, via the output (A1), an output serial data stream (ADS) having payload data. The communication unit (S1, S2) is configured to determine clock information (TI) on the basis of an internal reference clock signal of the communication unit (S1, S2) and an input symbol clock of the input data stream and, using the clock information (TI), to provide the output data stream (ADS) with an output symbol clock whose clock rate is equal to the clock rate of the input symbol clock.
    Type: Grant
    Filed: November 13, 2019
    Date of Patent: August 31, 2021
    Assignee: FESTO SE & CO. KG
    Inventors: Danny Schneider, Christian Waldeck, Eduard Faber, Thomas Lederer
  • Patent number: 11099620
    Abstract: A fail-safe power limit (FSPL) can be applied to components that lose communication with a management module (MM) to determine a safe power level at which to operate. The FSPL may be computed by the management module (MM) for the information handling system and distributed to components in the information handling system. By computing a FSPL and transmitting the FSPL to the components, a larger amount of the available power can be used by the components. This allows the components to continue operating at performance levels closer to or equivalent to levels available when the management module (MM) is operating normally. The FSPL may be updated at set times and/or on a periodic schedule such that the FSPL used by the components when communication is lost with the management module (MM) reflects a recent operating state of the components.
    Type: Grant
    Filed: December 14, 2018
    Date of Patent: August 24, 2021
    Assignee: Dell Products L.P.
    Inventors: Douglas E. Messick, Kyle Eric Cross, Dan Rao, Shawn Joel Dube
  • Patent number: 11086376
    Abstract: Method for activating a feature of a chip having an interface comprising at least two power pins. The method comprises the following steps: the chip measures a series of voltage values between said power pins, the chip detects a series of sync signals different from clock signals, said sync signals being interleaved with said voltage values, the chip identifies a data sequence from said series of voltage values, and the chip activates the feature only if the data sequence matches a predefined pattern.
    Type: Grant
    Filed: December 4, 2018
    Date of Patent: August 10, 2021
    Assignee: THALES DIS FRANCE SA
    Inventors: Alexandre Berzati, Loïc Bonizec, Alaa Dou Nassre
  • Patent number: 11068596
    Abstract: During a power-on self-test (POST), a basic input/output system (BIOS) retrieves an attribute value associated with the persistent memory device, and compares the attribute value to a default value. In response to the attribute value matching the default value, the BIOS may determine that a firmware management protocol was not executed during a previous POST. In response to the attribute value not matching the default value, the BIOS may compare the attribute value to a current firmware version of firmware within the persistent memory device.
    Type: Grant
    Filed: May 10, 2019
    Date of Patent: July 20, 2021
    Assignee: Dell Products L.P.
    Inventors: Xi Li, Ching-Lung Chao
  • Patent number: 11042213
    Abstract: Embodiments include an autonomous core perimeter, configured to save the state of a core of a multi-core processor prior to the processor package being placed into a low-power state. The autonomous core perimeter of each core is configured to save an image of a microcontroller firmware to an external store if it has not been previously saved by another core, along with the unique working state information of that core's microcontroller. Upon restore, the single microcontroller firmware image is retrieved from the external store and pushed to each core along with each core's unique working state.
    Type: Grant
    Filed: March 30, 2019
    Date of Patent: June 22, 2021
    Assignee: Intel Corporation
    Inventors: Alexander Gendler, Yoni Aizik, Chen Ranel, Ido Melamed, Edward Vaiberman
  • Patent number: 11042644
    Abstract: The disclosure is related to a method and a system for security verification in a booting process of a computer system. A multi-core processor of the computer system is utilized to perform a security verification operation initiated by a UEFI BIOS. The security verification operation is configured to test if the computer system is qualified as a secure system for a specific use. In one aspect, the multi-core processor architecture has the benefit of providing a more efficient way to allow each of the multiple cores to perform one verification task for one of the peripherals of the system. An embodiment shows that the multiple cores can be individually assigned to perform different tasks such as verifying security of various medium in parallel processes when the computer system is in the booting process.
    Type: Grant
    Filed: February 1, 2018
    Date of Patent: June 22, 2021
    Assignee: QUIXANT PLC
    Inventor: Wang Chih Sheng
  • Patent number: 11029972
    Abstract: An information handling system operating a performance optimization system may comprise a processor executing computer program code instructions that interact with a plurality of computer operations and that is configured for iteratively sampling field performance data of the information handling system during learning windows having a preset duration and occurring at a preset frequency according to optimal learning window parameters, and adjusting the performance of the information handling system via adjustment of optimized system configurations based on application of a predetermined statistical model to the iteratively sampled field performance data. The optimal learning window parameters may be determined based on accuracy of previous application of the predetermined statistical model to test performance data of the information handling system.
    Type: Grant
    Filed: February 1, 2019
    Date of Patent: June 8, 2021
    Assignee: Dell Products, LP
    Inventors: Nikhil M. Vichare, Farzad Khosrowpour
  • Patent number: 11023022
    Abstract: The present disclosure relates to an apparatus and method for improving thermal cycling reliability of a multicore microprocessor, and a method for a method for improving thermal cycling reliability of a multicore microprocessor according to an embodiment of the present disclosure includes determining an optimal temperature of a microprocessor to maximize a mean time to failure of the microprocessor, and increasing at least one of an operating frequency of the microprocessor or a processor utilization of the microprocessor to make a temperature of the microprocessor equal to or higher than the optimal temperature.
    Type: Grant
    Filed: January 24, 2020
    Date of Patent: June 1, 2021
    Assignee: AJOU UNIVERSITY INDUSTRY-ACADEMIC COOPERATION FOUNDATION
    Inventors: Hoeseok Yang, Beomsik Kim