Patents by Inventor Aaron Cook

Aaron Cook has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20130346628
    Abstract: A method for assigning Media Access Control (MAC) addresses to devices of a computing system includes: for each of a plurality of devices of the computing system, determining particular information regarding that device during a boot process for that device, and dynamically generating a MAC address for each device that indicates the determined particular information regarding that device. The particular information regarding each device may include, for example, information regarding the location of the device in the system (e.g., slot information), device type information, device number information, etc.
    Type: Application
    Filed: June 21, 2012
    Publication date: December 26, 2013
    Inventors: Rodney S. Canion, Brent Aaron Cook, Jonathan Stroud
  • Publication number: 20130343181
    Abstract: A method for processing data packets in a computer system may include receiving a data packet at a configurable logic device (e.g., an FPGA), each packet including header information regarding the data packet, the configurable logic device automatically identifying particular information elements in the header information of the data packet, the configurable logic device automatically executing a hash function programmed on the configurable logic device to calculate a hash value for the data packet based on the particular information elements, and processing the data packet based on the calculated hash value for the data packet. The calculate hash value may be used for various purposes, e.g., routing and/or load balancing of traffic across multiple interfaces. The configurable logic device may be able to execute the hash function at line rate, thus freeing up processor cycles in one or more related processors.
    Type: Application
    Filed: June 21, 2012
    Publication date: December 26, 2013
    Inventors: Jonathan Stroud, Brent Aaron Cook
  • Publication number: 20130346736
    Abstract: A method for booting devices in a multi-card computing system comprising a plurality of cards connected to a shared backplane may include: dynamically generating a Media Access Control (MAC) addresses for at least some of the devices in the computing system, the dynamically generated MAC address for each device including information regarding the location of that device within the multi-card computing system; a boot management system receiving a boot-related information request from a particular device in the multi-card system, the boot-related information request comprising a request for particular boot-related information for facilitating a boot process for the requesting device, and including the MAC address of the requesting device; and the boot management system determining whether to send a response to the requesting device with the requested boot-related information based at least on the information in the MAC address regarding the location of the requesting device within the multi-card computing syste
    Type: Application
    Filed: June 21, 2012
    Publication date: December 26, 2013
    Inventors: Brent Aaron Cook, Jonathan Stroud
  • Publication number: 20130346756
    Abstract: A computer implemented method for branding a commodity drive may include reading a unique identifier from a drive, partitioning the drive into a first partition and a second partition, combining the unique identifier with a secret to form an encoded value, and writing the encoded value to the first partition.
    Type: Application
    Filed: June 21, 2012
    Publication date: December 26, 2013
    Inventors: Brent Aaron Cook, Gregory L. Singleton, Kristopher Len Raney, Jonathan Stroud
  • Publication number: 20130343379
    Abstract: A method of communicating between devices within a card in a computing system comprises sending a command network packet from a first instruction executing device to a second instruction executing device via an Ethernet network, wherein the command network packet contains an instruction to be executed on the second instruction executing device, and receiving a responsive network packet sent from the second instruction executing device to the first instruction executing device via the Ethernet network, wherein the responsive network packet indicates a result of the instruction.
    Type: Application
    Filed: June 21, 2012
    Publication date: December 26, 2013
    Inventors: Jonathan Stroud, Mark Veteikis, Brent Aaron Cook
  • Publication number: 20130343387
    Abstract: A method of routing internal network traffic within a computing system comprises receiving a network packet at a configurable logic device (CLD), parsing the network packet to obtain a destination address, searching a predetermined range of a routing table wherein each row of the routing table specifies a range of possible destination addresses and routing information, identifying a matching row of the routing table wherein the destination address falls within the range of possible destination addresses of the matching row, and routing the packet according to the routing information.
    Type: Application
    Filed: June 21, 2012
    Publication date: December 26, 2013
    Inventors: Jonathan Stroud, Michael Moriarty, Brent Aaron Cook
  • Publication number: 20130343207
    Abstract: An automated method for analyzing a plurality of network messages received by a network testing device is disclosed. The method may comprise, during a current window of time, receiving from a target network device a network message associated with an original network message determining a latency value for the received network message comparing the determined latency value with the threshold latency value; and incrementing either the first counter or the second counter based on the comparison of the determined latency value with a threshold latency value. The method may further comprise, at the end of the current window of time, storing the first and second counter values resulting from the analysis of the plurality of original network messages.
    Type: Application
    Filed: June 21, 2012
    Publication date: December 26, 2013
    Inventors: Brent Aaron Cook, Ryan Clifton, Kristopher Len Raney, Mark Veteikis, Michael Moriarty
  • Publication number: 20130343407
    Abstract: A method offloading data intensive tasks from a processor comprises receiving at a configurable logic device (CLD) a network packet, parsing the network packet to determine that the packet is a TCP segment, searching a partially assembled packet table to locate an associated partially assembled packet data structure, inserting the network packet into the associated partially assembled packet data structure, recognizing that the partially assembled packet data structure contains every segment produced from an original TCP packet, assembling a fully assembled TCP packet from the data in the partially assembled packet data structure, and transmitting the fully assembled TCP packet to a processor in the same computer system as the CLD.
    Type: Application
    Filed: June 21, 2012
    Publication date: December 26, 2013
    Inventors: Jonathan Stroud, Brent Aaron Cook
  • Publication number: 20130343408
    Abstract: A method of offloading data intensive tasks from a processor, comprises, at a processor, preparing a TCP packet comprising a TCP header and a data payload, transmitting the TCP packet to a configurable logic device (CLD); and at the CLD, receiving the TCP packet, generating set of TCP segment packets containing, a copy of the TCP header, an incrementing segment sequence identifier, and a portion of the data payload, and transmitting the set of TCP segment packets on an external network interface.
    Type: Application
    Filed: June 21, 2012
    Publication date: December 26, 2013
    Inventors: Brent Aaron Cook, Michael Moriarty
  • Publication number: 20130346415
    Abstract: A computer-implemented method of storing data for fast lookup comprises forming a first and a second array of pointers, forming a record to store, the record comprising fields for, a first list pointer, a second list pointer, which is not the first field in the record, a first key, and a second key. The method further comprises determining a first index based at least in part the first key, setting the value of the pointer at the first index in the first array to the location of the first pointer field of the record, determining a second index based at least in part the second key, and setting the value of the pointer at the second index in the second array to the location of the second pointer field of the record.
    Type: Application
    Filed: July 3, 2012
    Publication date: December 26, 2013
    Inventors: Alexander I. Tomlinson, Brent Aaron Cook
  • Publication number: 20130346700
    Abstract: A method of accessing data in a shared-memory, parallel-processing computing system, comprises, on a first processing unit, receiving a reference for a data structure stored in a memory and a first value of a generation attribute associated with the data structure, waiting to receive an exclusive lock on the data structure, obtaining an exclusive lock on the data structure, receiving a second value of a second generation attribute associated with the data structure; and accessing the data structure only if the first generation attribute value and the second generation attribute value are identical.
    Type: Application
    Filed: August 28, 2012
    Publication date: December 26, 2013
    Inventors: Alexander I. Tomlinson, Brent Aaron Cook, Rodney S. Canion
  • Publication number: 20130116945
    Abstract: An integrated circuit sensor includes circuitry and methods for generating a high speed delay fault test clock signal. A trimmable oscillator generates a master clock signal for use by an output protocol processor to provide the sensor output signal. A fault test clock signal generator is responsive to the master clock signal and to a test trigger signal for generating the test clock signal having a launch pulse and a capture pulse, each having edges substantially coincident with like edges of pulses of the master clock signal and a spacing between launch and capture pulses established by the trimmable master clock signal.
    Type: Application
    Filed: November 7, 2011
    Publication date: May 9, 2013
    Applicant: Allegro Microsystems, Inc.
    Inventors: Glenn A. Forrest, Aaron Cook, Dana Briere, Devon Fernandez, Naota Nakayama