Abstract: An apparatus, according to one embodiment, includes non-volatile memory configured to store data, and a controller and logic integrated with and/or executable by the controller, the logic being configured to: determine, by the controller, that at least one block of the non-volatile memory and/or portion of a block of the non-volatile memory meets a retirement condition, re-evaluate, by the controller, the at least one block and/or the portion of a block to determine whether to retire the at least one block and/or the portion of a block, indicate, by the controller, that the at least one block and/or the portion of a block remains usable when a result of the re-evaluation is not to retire the block, and indicate, by the controller, that the at least one block and/or the portion of a block is retired when the result of the re-evaluation is to retire the block.

Abstract: Performing a calibration of a NAND flash memory block that is in an open state. An open state of the NAND flash memory block is detected, the NAND flash memory block comprising a plurality of memory pages, each of which comprising a plurality of memory cells. A group of pages of the NAND flash memory block being in an open state having comparable characteristics is identified. A calibration of read voltage values to pages of the group of identified pages is performed.

Abstract: A method of optimizing a read threshold voltage shift value for non-volatile memory units organized as memory pages may be provided. An ECC check is performed for active page reads. The method comprises, as part of the read operation, determining a status of the memory page, and reading a memory page with a current threshold voltage shift (TVS) value. Additionally, the method comprises, upon determining that a read memory page command passed an ECC check, returning corrected data read, and upon determining that the read memory page did not pass the ECC check, adjusting the current TVS value based on the status of the memory page to be read. Furthermore, the method comprises, while the read memory pages continues to not pass the ECC check, repeating the adjusting the current TVS value and the determining that the read memory page passes ECC check until a stop condition is met.

Abstract: A computer-implemented method, according to one embodiment, includes: detecting that a calibration of a first page group has been triggered, and evaluating a hierarchical page mapping to determine whether the first page group correlates to one or more other page groups in non-volatile memory. In response to determining that the first page group does correlate to one or more other page groups in the non-volatile memory, a determination is made as to whether to promote at least one of the one or more other page groups for calibration. In response to determining to promote at least one of the one or more other page groups for calibration, the first page group and the at least one of the one or more other page groups are calibrated. Moreover, each of the page groups includes one or more pages in non-volatile memory.

Abstract: A computer-implemented method, according to one embodiment, includes: receiving a stream of data, and selecting more than one block of memory to write the stream of data to. The selected blocks of memory are in a memory that includes a plurality of blocks. Moreover, the data is written across the selected blocks of memory in parallel. The blocks of memory are also selected such that no two or more of the selected blocks of memory have an effect on a read apparent voltage of a same one of the plurality of blocks in the memory. Other systems, methods, and computer program products are described in additional embodiments.

Abstract: A computer-implemented method, according to one embodiment, includes: performing a first read of one or more pages in a first page region of a first block. In response to determining that the highest RBER experienced during the first read is not in a first predetermined range, a first calibration procedure is performed on the one or more pages. A second read of the one or more pages is performed. In response to determining that the highest RBER experienced during the second read is not in a second predetermined range, a second calibration procedure on the one or more pages is performed, and a third read of the one or more pages is performed. In response to determining that the highest RBER experienced during the third read is not in the second predetermined range, a reliability counter which corresponds to the first page region of the first block is incremented.

Abstract: A computer-implemented method, according to one embodiment, includes: receiving a multi-page read request and predicting whether using a multi-plane read operation to read pages of storage space in memory which correspond to the multi-page read request will result in a bit error rate that is in a predetermined range. In response to predicting that using the multi-plane read operation to read the pages will not result in a bit error rate that is in the predetermined range, a threshold voltage shift (TVS) value is computed for the multi-plane read operation. Furthermore, the pages are read using the multi-plane read operation with the computed TVS. Other systems, methods, and computer program products are described in additional embodiments.

Abstract: A computer-implemented method, according to one embodiment, includes: retrieving a physical block address corresponding to a logic block address, extracting information from the physical block address, and performing a lookup operation in cache using the extracted information. A range check of the physical block address is further performed in response to the lookup operation succeeding, while data is read from the cache in response to the range check succeeding. An architecture of the cache supports separation of data streams, as well as parallel writes to different non-volatile memory channels. The cache architecture further supports pipelining of the parallel writes to different non-volatile memory planes. Moreover, the non-volatile memory controller is configured to perform a direct memory lookup in the cache based on a physical block address.

Abstract: In at least one embodiment, a controller of a non-volatile memory having a plurality of blocks of physical memory estimates a current value of a block health metric of the particular block based on a previous value of the block health metric and a reference block wear curve. The controller assigns the particular block a health grade based on the estimated current value of the block health metric and performs data placement in the block in accordance with the assigned health grade. The controller may calibrate a set of read threshold voltages of the particular block prior to estimating the current value of the block health metric.

Abstract: Non-volatile memory block management. A method according to one embodiment includes calculating an error count margin threshold for each of the at least some non-volatile memory blocks of a plurality of non-volatile memory blocks. A determination is made as to whether the error count margin threshold of any of the at least some of the non-volatile memory blocks has been exceeded. A memory block management function is triggered upon determining that the error count margin threshold of any of the at least some of the non-volatile memory blocks has been exceeded.

Abstract: A non-volatile memory includes a plurality of blocks of physical memory, including a target block and at least one source block containing at least some valid data and some invalid data. Responsive to determining to perform garbage collection for the non-volatile memory, the controller transfers valid data from the at least one source block to the target block. The controller ends garbage collection on the at least one source block with at least some valid data present in the at least one source block and all interfaces of the target block closed at the boundary of independent layers. In at least some embodiments, the target block may be configured to store more bits per cell than the at least one source block.

Abstract: A non-volatile memory includes a plurality of physical blocks of storage each including a respective plurality of cells, where each of the plurality of cells is individually capable of storing multiple bits of data. A controller assigns physical blocks among the plurality of physical blocks to a first pool containing physical blocks operating in a first (e.g., QLC) mode for storing a greater number of bits per cell and assigns other physical blocks among the plurality of physical blocks to a second pool containing physical blocks operating in a second (e.g., SLC) mode for storing a lesser number of bits per cell. The controller transfers physical blocks between the first pool and the second pool based on at least bit error rates measured for the transferred physical blocks.

Abstract: A computer-implemented method, according to one embodiment, includes: calibrating a first block of storage space in memory, identifying a page in the calibrated first block having a highest RBER, and determining whether the RBER of the identified page is greater than an error correction code limit. In response to determining that the RBER of the identified page is not greater than the error correction code limit, a determination is made as to whether the RBER of the identified page is greater than a relocation limit. In response to determining that the RBER of the identified page is not greater than a relocation limit, another determination is made as to whether the first block has been excessively calibrated. Furthermore, in response to determining that the first block has been excessively calibrated, data in the first block relocated to a second block of storage space in the memory.

Abstract: A technique for garbage collection in a storage system includes generating regrouping metadata for one or more pages of at least two logical erase blocks (LEB). The regrouping metadata indicates an associated stream for each of the pages. Multiple of the LEBs that include valid pages associated with a first stream are selected, based on the regrouping metadata, for regrouping. The valid pages associated with the first stream from the selected LEBs are regrouped into a new LEB.

Abstract: A non-volatile memory includes a plurality of physical blocks of storage each including a respective plurality of cells, where each of the plurality of cells is individually capable of storing multiple bits of data. A controller assigns physical blocks among the plurality of physical blocks to a first pool containing physical blocks operating in a first (e.g., QLC) mode for storing a greater number of bits per cell and assigns other physical blocks among the plurality of physical blocks to a second pool containing physical blocks operating in a second (e.g., SLC) mode for storing a lesser number of bits per cell. The controller transfers physical blocks between the first pool and the second pool based on at least bit error rates measured for the transferred physical blocks.

Abstract: A computer program product, according to one embodiment, includes a computer readable storage medium having program instructions embodied therewith. The computer readable storage medium is not a transitory signal per se. Moreover, the program instructions are readable and/or executable by a controller to cause the controller to perform a method which includes: assigning data having a first heat to a first data stream, assigning data having a second heat to a second data stream, and writing the data streams simultaneously, in parallel, to page-stripes having a same index across a series of planes of memory. The writing of the first data stream begins at an opposite end of the series of planes as the writing of the second data stream, the writing of the streams being toward one another. Other systems, methods, and computer program products are described in additional embodiments.

Abstract: A computer-implemented method, according to one embodiment, includes: performing a first read of one or more pages in a first page region of a first block. In response to determining that the highest RBER experienced during the first read is not in a first predetermined range, a first calibration procedure is performed on the one or more pages. A second read of the one or more pages is performed. In response to determining that the highest RBER experienced during the second read is not in a second predetermined range, a second calibration procedure on the one or more pages is performed, and a third read of the one or more pages is performed. In response to determining that the highest RBER experienced during the third read is not in the second predetermined range, a reliability counter which corresponds to the first page region of the first block is incremented.

Abstract: A computer-implemented method, according to one embodiment, includes: detecting that an error count resulting from reading a first page in a block of storage space in memory is above a first threshold, and reading a second page in the block of storage space. The second page is one which had a highest error count of the pages in the block of storage space following a last calibration of the block of storage space. Moreover, a determination is made as to whether an error count resulting from reading the second page is above the first threshold. In response to determining that the error count resulting from reading the second page is above the first threshold, the block of storage space is calibrated. Other systems, methods, and computer program products are described in additional embodiments.

Abstract: Read Apparent Voltage (RAV) is an anomality in which an apparent threshold voltage of a storage cell transistor does not equal the actual threshold voltage of that same transistor by a large enough magnitude that the binary state of transistor is not read correctly. An infector page may cause the RAV anomality within a different infected page. To determine whether any page is an infector, each page is programmed, a page within each block is read, an acting infector page within an acting infector block is set, a possible infected page within a possible infected block is set, the acting infector page is read a predetermined plurality of instances, the possible infected page is read, a raw bit error rate (RBER) of the read of the possible infected page is determined, and the acting infector page is set as an actual infector page based upon the determined RBER.

Abstract: A non-volatile memory includes a plurality of blocks of physical memory, including a target block and at least one source block containing at least some valid data and some invalid data. Responsive to determining to perform garbage collection for the non-volatile memory, the controller transfers valid data from the at least one source block to the target block. The controller ends garbage collection on the at least one source block with at least some valid data present in the at least one source block and all interfaces of the target block closed at the boundary of independent layers. In at least some embodiments, the target block may be configured to store more bits per cell than the at least one source block.