Abstract: Methods and apparatus for use of a fill on demand ampoule are disclosed. The fill on demand ampoule may refill an ampoule with precursor concurrent with the performance of other deposition processes. The fill on demand may keep the level of precursor within the ampoule at a relatively constant level. The level may be calculated to result in an optimum head volume. The fill on demand may also keep the precursor at a temperature near that of an optimum precursor temperature. The fill on demand may occur during parts of the deposition process where the agitation of the precursor due to the filling of the ampoule with the precursor minimally effects the substrate deposition. Substrate throughput may be increased through the use of fill on demand.

Abstract: A method for processing a substrate is provided, wherein the substrate is located below a showerhead in a processing chamber. A deposition layer is deposited on the substrate, wherein at least one deposition gas is provided through the showerhead. A secondary purge gas is flowed during the depositing the deposition layer from a location outside of the showerhead in the processing chamber forming a flow curtain around an outer edge of the showerhead, wherein the secondary purge gas comprises at least one component gas. A partial pressure of the at least one component gas is changed over time during the depositing the deposition layer, wherein the depositing the deposition layer has a non-uniformity, wherein the changing the partial pressure changes the non-uniformity over time during the depositing the deposition layer.

Abstract: Semiconductor processing tools with multi-station processing chambers are provided that include a rotational bearing mechanism that allows a top plate assembly thereof to be rotated during maintenance and service operations. In some implementations, a vertical displacement mechanism may be provided that may be used to transition the top plate assembly between a first configuration and a second configuration, with the top plate assembly being rotatable in at least the second configuration.

Abstract: Various embodiments herein relate to methods and apparatus for depositing doped and undoped silicon-containing films having a high degree of purity. In one example, the method includes exposing the substrate to a first reactant and a second reactant; reacting the first and second reactants with one another to form a silicon-containing material and depositing a portion of the silicon-containing film on the substrate; before the silicon-containing film is complete, performing an impurity reduction operation including: (i) generating a plasma from a plasma generation gas comprising inert gas and hydrogen, where the plasma generation gas is substantially free of oxygen, and (ii) exposing the substrate to the plasma to thereby reduce a concentration of fluorine, carbon, hydrogen, and/or nitrogen in the silicon-containing film; and repeating these operations (or a subset thereof) until the silicon-containing film is deposited to a final thickness.

Abstract: The present disclosure relates to a film formed with a metal precursor and an organic precursor, as well as methods for forming and employing such films. The film can be employed as a photopatternable film or a radiation-sensitive film. In particular embodiments, the film includes alternating layers of metal-containing layers and organic layers. In other embodiments, the film includes a matrix of deposited metal and organic constituents.

Abstract: Methods for depositing ultrathin films by atomic layer deposition with reduced wafer-to-wafer variation are provided. Methods involve exposing the substrate to soak gases including one or more gases used during a plasma exposure operation of an atomic layer deposition cycle prior to the first atomic layer deposition cycle to heat the substrate to the deposition temperature.

Abstract: Methods for making thin-films on semiconductor substrates, which may be patterned using EUV, include: depositing the organometallic polymer-like material onto the surface of the semiconductor substrate, exposing the surface to EUV to form a pattern, and developing the pattern for later transfer to underlying layers. The depositing operations may be performed by chemical vapor deposition (CVD), atomic layer deposition (ALD), and ALD with a CVD component, such as a discontinuous, ALD-like process in which metal precursors and counter-reactants are separated in either time or space.

Abstract: Vacuum-integrated photoresist-less methods and apparatuses for forming metal hardmasks can provide sub-30 nm patterning resolution. A metal-containing (e.g., metal salt or organometallic compound) film that is sensitive to a patterning agent is deposited on a semiconductor substrate. The metal-containing film is then patterned directly (i.e., without the use of a photoresist) by exposure to the patterning agent in a vacuum ambient to form the metal mask. For example, the metal-containing film is photosensitive and the patterning is conducted using sub-30 nm wavelength optical lithography, such as EUV lithography.

Abstract: Vacuum-integrated photoresist-less methods and apparatuses for forming metal hardmasks can provide sub-30 nm patterning resolution. A metal-containing (e.g., metal salt or organometallic compound) film that is sensitive to a patterning agent is deposited on a semiconductor substrate. The metal-containing film is then patterned directly (i.e., without the use of a photoresist) by exposure to the patterning agent in a vacuum ambient to form the metal mask. For example, the metal-containing film is photosensitive and the patterning is conducted using sub-30 nm wavelength optical lithography, such as EUV lithography.

Abstract: Methods and apparatuses for depositing dielectric films into features on semiconductor substrates are described herein. Methods involve depositing dielectric films by using controlled thermal chemical vapor deposition, with periodic passivation operations and densification to modulate film properties.

Abstract: Various embodiments herein relate to methods and apparatus for depositing silicon oxide using thermal ALD or thermal CVD. In one aspect of the disclosed embodiments, a method for depositing silicon oxide is provided, the method including: (a) receiving the substrate in a reaction chamber; (b) introducing a first flow of a first reactant into the reaction chamber and exposing the substrate to the first reactant, where the first reactant includes a silicon-containing reactant; (c) introducing a second flow of a second reactant into the reaction chamber to cause a reaction between the first reactant and the second reactant, (i) where the second reactant includes hydrogen (H2) and an oxygen-containing reactant, (ii) where the reaction deposits silicon oxide on the substrate, and (iii) where the reaction is initiated when a pressure in the reaction chamber is greater than 10 Torr and equal to or less than about 40 Torr.

Abstract: Various embodiments described herein relate to methods and apparatus for etching a semiconductor substrate to remove a target material from a surface of the substrate. Generally, the techniques described herein are thermal techniques that do not rely on the use of plasma. In a number of embodiments, a particular gas mixture is provided to the reaction chamber to react with the target material. The gas mixture may include a combination of a halogen source such as hydrogen fluoride (HF), an organic solvent and/or water, an additive, and a carrier gas. A number of different materials may be used for the organic solvent and/or for the additive.

Abstract: Methods of filling a gap with a dielectric material including using an inhibitor plasma during deposition. The inhibitor plasma increases a nucleation barrier of the deposited film. When the inhibitor plasma interacts with material in the feature, the material at the bottom of the feature receives less plasma treatment than material located closer to a top portion of the feature or in field. Deposition at the top of the feature is then selectively inhibited and deposition in lower portions of the feature proceeds with less inhibition or without being inhibited. As a result, bottom-up fill is enhanced, which can create a sloped profile that mitigates the seam effect and prevents void formation. In some embodiments, an underlying material at the top of the feature is protected using an integrated liner. In some embodiments, a hydrogen chemistry is used during gap fill to reduce seam formation.

Abstract: Methods for depositing ultrathin films by atomic layer deposition with reduced wafer-to-wafer variation are provided. Methods involve exposing the substrate to soak gases including one or more gases used during a plasma exposure operation of an atomic layer deposition cycle prior to the first atomic layer deposition cycle to heat the substrate to the deposition temperature.

Abstract: A method for performing a feedback sequence for patterning CD control. The method including performing a series of process steps on a wafer to obtain a plurality of features, wherein a process step is performed under a process condition. The method including measuring a dimension of the plurality of features after performing the series of process steps. The method including determining a difference between the dimension that is measured and a target dimension for the plurality of features. The method including modifying the process condition for the process step based on the difference and a sensitivity factor for the plurality of features relating change in dimension and change in process condition.

Abstract: The present disclosure relates to compositions including a mixture or solution of acetylene and a stabilizer. In particular embodiments, the composition is a stabilized composition including pressurized acetylene.

Abstract: A method for forming features over a wafer with a carbon based deposition is provided. The carbon based deposition is pretuned, wherein the pretuning causes a non-uniform removal of some of the carbon based deposition. An oxide deposition is deposited through an atomic layer deposition process, wherein the depositing the oxide deposition causes a non-uniform removal of some of the carbon based deposition. At least one additional process is provided, wherein the at least one additional process completes formation of features over the wafer, wherein the features are more uniform than features that would be formed without pretuning.

Abstract: Methods for depositing films by atomic layer deposition using aminosilanes are provided.

Abstract: Silicon-containing films, such as silicon oxide films, having high quality are deposited on semiconductor substrates using reactions of silicon-containing precursors in high temperature ALD processes. In some embodiments, provided precursors are suitable for deposition of silicon-containing films at temperatures of at least about 500° C., such as greater than about 550° C. For example, silicon oxide can be deposited at high temperature by a reaction of the silicon-containing precursor with an oxygen-containing reactant (e.g., O3 O2, H2O) on a substrate's surface. In some implementations, the suitable precursor includes at least one silicon-silicon bond, at least one leaving group (e.g., a halogen), and, optionally, at least one electron-donating group (e.g., an alkyl). The precursors are suitable, in some implementations, for both thermal ALD and for PEALD. In some embodiments, a single precursor is used in both thermal ALD and in PEALD during deposition of a single silicon oxide film.

Abstract: A NAND structure and method of fabricating the structure are described. A multi-layer ONON stack is deposited on a Si substrate and a field oxide grown thereon. A portion of the field oxide is removed, and high-aspect-ratio channels are etched in the stack. The channels are filled with a Si oxide using a thermal ALD process. The thermal ALD process includes multiple growth cycles followed by a passivation cycle. Each growth cycle includes treating the surface oxide surface using an inhibitor followed by multiple cycles to deposit the oxide on the treated surface using a precursor and source of the oxide. The passivation after the growth cycle removes the residual inhibitor. The Si oxide is recess etched using a wet chemical etch of DHF and then capped using a poly-Si cap.