Patents by Inventor Afshin Rezayee

Afshin Rezayee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9070062
    Abstract: Methods and devices for receiving a data signal transmitted via load modulation, by detecting current supplied in an amplifier feeding the antenna of the device which transmits the carrier signal.
    Type: Grant
    Filed: July 9, 2012
    Date of Patent: June 30, 2015
    Assignee: Square, Inc.
    Inventor: Afshin Rezayee
  • Publication number: 20150121086
    Abstract: Processor system with a general purpose processor and a cryptographic processor dedicated to performing cryptographic operations and enforcing the security of critical security parameters. The cryptographic processor prevents exposure of critical security parameters outside the cryptographic processor itself, and instead implements a limited scripting engine, which can be used by the general purpose processor to execute operations that require the critical security parameters.
    Type: Application
    Filed: October 31, 2013
    Publication date: April 30, 2015
    Applicant: Kili Technology Corporation
    Inventors: Malcolm Ronald Smith, Kshitiz Vadera, Mark Philip Zagrodney, Kevin Ka Wai Ng, Afshin Rezayee
  • Patent number: 8879618
    Abstract: A decision feedback equalizer, transceiver, and method are provided, the equalizer having at least one comparator, the at least one comparator comprising a first stage, comprising a main branch having two track switches with a resistive load, an offset cancellation branch, a plurality of tap branches with transistor sizes smaller than the main branch, in which previous decisions of the equalizer are mixed with the tap weights using current-mode switching, and a cross coupled latch branch; and a second stage, comprising a comparator module for making decisions based on the outputs of the first stage and a clock input, and a plurality of flip-flops for storing the output of the comparator module.
    Type: Grant
    Filed: September 13, 2011
    Date of Patent: November 4, 2014
    Assignee: Semtech Canada Corporation
    Inventors: Mohamed Abdalla, Afshin Rezayee, David Cassan, Marcus Van Ierssel, Chris Holdenried, Saman Sadr
  • Publication number: 20140101734
    Abstract: Methods and systems are provided for performing and verifying transactions involving authentication with a secure credential, such as a smart card, in an untrusted or semi-trusted environment. An application module, operating in an untrusted or semi-trusted environment can be denied access to sensitive data. The application module can determine a preliminary command to be sent to the credential and transmit the preliminary command to a broker module. The broker module, operating in a trusted environment, can supply sensitive data and transmit the command to the credential. Subsequently, the broker module can extract sensitive data from a response before it is transmitted to the application module. A verification server can audit the transaction to verify that it was carried out properly.
    Type: Application
    Filed: May 29, 2012
    Publication date: April 10, 2014
    Applicant: Securekey Technologies Inc.
    Inventors: Troy Jacob Ronda, Andre Boysen, Afshin Rezayee, Malcolm Ronald Smith, Mikhael Khaymov, Kshitiz Vadera, Murat Cat
  • Publication number: 20130169416
    Abstract: Methods and devices for receiving a data signal transmitted via load modulation, by detecting current supplied in an amplifier feeding the antenna of the device which transmits the carrier signal.
    Type: Application
    Filed: July 9, 2012
    Publication date: July 4, 2013
    Inventor: Afshin Rezayee
  • Patent number: 8472560
    Abstract: A mixed-mode signal detection apparatus suitable for ISO/IEC 14443 Type A and Type B RFID proximity card applications. The apparatus combines switched capacitor sampling and digital post processing to recover information from Amplitude Shift Keying (ASK) modulated signals. A phase detector triggers a pulse generator, which is used to signal sample and hold units that store the peak value of each carrier signal cycle. The samples are used to form a discrete version of the modulation signal and are post-processed digitally to recover encoded signal information.
    Type: Grant
    Filed: November 2, 2010
    Date of Patent: June 25, 2013
    Assignee: SecureKey Technologies Inc.
    Inventors: Afshin Rezayee, Yue Yang
  • Publication number: 20120201289
    Abstract: A decision feedback equalizer, transceiver, and method are provided, the equalizer having at least one comparator, the at least one comparator comprising a first stage, comprising a main branch having two track switches with a resistive load, an offset cancellation branch, a plurality of tap branches with transistor sizes smaller than the main branch, in which previous decisions of the equalizer are mixed with the tap weights using current-mode switching, and a cross coupled latch branch; and a second stage, comprising a comparator module for making decisions based on the outputs of the first stage and a clock input, and a plurality of flip-flops for storing the output of the comparator module.
    Type: Application
    Filed: September 13, 2011
    Publication date: August 9, 2012
    Inventors: Mohamed ABDALLA, Afshin REZAYEE, David CASSAN, Marcus VAN IERSSEL, Chris HOLDENRIED, Saman SADR
  • Publication number: 20120105211
    Abstract: A mixed-mode signal detection apparatus suitable for ISO/IEC 14443 Type A and Type B RFID proximity card applications. The apparatus combines switched capacitor sampling and digital post processing to recover information from Amplitude Shift Keying (ASK) modulated signals. A phase detector triggers a pulse generator, which is used to signal sample and hold units that store the peak value of each carrier signal cycle. The samples are used to form a discrete version of the modulation signal and are post-processed digitally to recover encoded signal information.
    Type: Application
    Filed: November 2, 2010
    Publication date: May 3, 2012
    Inventors: Afshin Rezayee, Yue Yang
  • Patent number: 7450050
    Abstract: An analog digital converter with switched-capacitor reset architecture. The analog to digital converter (ADC) includes a plurality of pipelined stages, each stage including an analog to digital converter comprising a pair of comparators outputting signals to a multiplying digital to analog converter (MDAC). The MDAC includes an opamp and a reset circuit connected to inputs of the opamp, the reset circuit including first and second capacitors and switching circuitry for precharging each of the first and second capacitors to a difference between the input and output common-mode voltages of the opamp, and during a reset phase of the MDAC, connecting the first capacitor between a positive input and a negative output of the opamp and connecting the second capacitor between a negative input and a positive output of the opamp to reset the opamp.
    Type: Grant
    Filed: April 5, 2007
    Date of Patent: November 11, 2008
    Assignee: Snowbush, Inc.
    Inventors: Afshin Rezayee, Ken Martin, Aaron Buchwald
  • Publication number: 20070247348
    Abstract: An analog digital converter with switched-capacitor reset architecture. The analog to digital converter (ADC) includes a plurality of pipelined stages, each stage including an analog to digital converter comprising a pair of comparators outputting signals to a multiplying digital to analog converter (MDAC). The MDAC includes an opamp and a reset circuit connected to inputs of the opamp, the reset circuit including first and second capacitors and switching circuitry for precharging each of the first and second capacitors to a difference between the input and output common-mode voltages of the opamp, and during a reset phase of the MDAC, connecting the first capacitor between a positive input and a negative output of the opamp and connecting the second capacitor between a negative input and a positive output of the opamp to reset the opamp.
    Type: Application
    Filed: April 5, 2007
    Publication date: October 25, 2007
    Inventors: Afshin Rezayee, Ken Martin, Aaron Buchwald