Patents by Inventor Agostino Galluzzo

Agostino Galluzzo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6839467
    Abstract: A method compresses a digital image including a matrix of elements each one including a plurality of digital components of different type representing a pixel. The method includes the steps of providing an incomplete digital image wherein at least one component is missing in each element, obtaining the digital image from the incomplete digital image, splitting the digital image into a plurality of blocks and calculating, for each block, a group of DCT coefficients for the components of each type, and quantizing the DCT coefficients of each group using a corresponding quantization table scaled by a gain factor for achieving a target compression factor. The method further comprises the steps of determining an energy measure of the incomplete digital image and estimating the gain factor as a function of the energy measure, the function being determined experimentally according to the target compression factor.
    Type: Grant
    Filed: July 10, 2001
    Date of Patent: January 4, 2005
    Assignee: STMicroelectronics S.r.l.
    Inventors: Arcangelo Bruna, Massimo Mancuso, Agostino Galluzzo
  • Publication number: 20040223517
    Abstract: In a first step, slot synchronization may be obtained by setting in correlation the received signal with a primary sequence, which represents the primary channel, and storing the received signal. During a second step, the correlator may be re-used for correlating the received signal with a secondary sequence corresponding to the secondary synchronization codes. The correlator may include a first filter and a second filter connected in series, which receive a first secondary sequence and a second secondary sequence, which may include Golay sequences. Architectures of parallel and serial types, as well as architectures designed for re-using further circuit parts are also disclosed. The invention is particularly application in mobile communication systems based upon standards such as UMTS, CDMA2000, IS95, and WBCDMA.
    Type: Application
    Filed: January 30, 2004
    Publication date: November 11, 2004
    Applicant: STMicroelectronics S.r.l.
    Inventors: Francesco Rimi, Giuseppe Avellone, Francesco Pappalardo, Filippo Speziali, Agostino Galluzzo
  • Publication number: 20040132471
    Abstract: To obtain frame synchronization and identify the cell codegroup in a cellular communication system (such as a system based upon the standard 3GPP FDD), there are available the synchronization codes organized in chips or letters transmitted at the beginning of respective slots. Slot synchronization is obtained previously in a first step of the operation of cell search. During a second step, there are acquired, by means of correlation or fast Hadamard transform, the energy values corresponding to the respective individual letters with reference to the possible starting positions of the corresponding frame within the respective slot. Operating in a serial way at the end of acquisition of the aforesaid energy values of the individual letters, or else operating in parallel, the energies of the corresponding words are determined. Of these energies only the maximum word-energy value and the information for the corresponding starting position are stored in a memory structure.
    Type: Application
    Filed: October 10, 2003
    Publication date: July 8, 2004
    Applicant: STMicroelectronics S.r.l.
    Inventors: Francesco Pappalardo, Giuseppe Avellone, Elena Salurso, Agostino Galluzzo
  • Publication number: 20040131009
    Abstract: Described herein is a method for parallel generating Walsh-Hadamard (WH) channelization codes and Orthogonal Variable Spreading Factor (OVSF) channelization codes, which are channelization codes formed by a plurality of strings of antipodal digits, each having a given length L and being identifiable by respective indices I formed by strings of binary digits, each having a given length N equal to the logarithm in base two of the length L of the channelization codes, the antipodal digits of the channelization codes assuming the values +1 and −1 and the binary digits of said indices I assuming the values 0 and 1.
    Type: Application
    Filed: September 23, 2003
    Publication date: July 8, 2004
    Applicant: STMicroelectronics S.r.l.
    Inventors: Francesco Pappalardo, Daniele Lo Iacono, Giuseppe Avellone, Agostino Galluzzo
  • Publication number: 20040117419
    Abstract: Once slot synchronization has been obtained in a first step, during a second step there is acquired, by means of correlation of the received signal (r) with the synchronization codes, the information corresponding to the codegroup and to the fine slot synchronization. The synchronization codes are split into codesets. In a first step, a synchronization code identifying a corresponding codeset (CS) is identified by means of correlation and search for the maximum value of correlation energy. In a second step, the received signal (r) is correlated with the remaining codes belonging to the codeset identified. The information thus obtained, which corresponds to all the synchronization codes comprised in the codeset identified, is used for obtaining frame synchronization and codegroup identification. Preferential application is in mobile communication systems based upon standards, such as UMTS, CDMA2000, IS95 or WBCDMA.
    Type: Application
    Filed: November 18, 2003
    Publication date: June 17, 2004
    Inventors: Giuseppe Avellone, Francesco Rimi, Francesco Pappalardo, Agostino Galluzzo, Giuseppe Visalli
  • Publication number: 20030223397
    Abstract: To generate the main scrambling code of order N and the secondary scrambling code of order K within the set identified by the primary scrambling code of order N, a first m-sequence and a second m-sequence are generated using Fibonacci linear feedback shift registers. The first m-sequence and the second m-sequence are modulo-2 added to form the I branch of the primary scrambling code. A first T-bit masking word and a second T-bit masking word of rank 0 are generated that correspond to the polynomial time shifts, and the intermediate taps of the X and y registers respectively chosen by the masking words are modulo-2 added so as to generate a third sequence and a fourth sequence, which are modulo-2 added together to form the Q branch of the primary scrambling code.
    Type: Application
    Filed: March 7, 2003
    Publication date: December 4, 2003
    Applicant: STMicroelectronics S.r.l.
    Inventors: Daniele Lo Iacono, Ettore Messina, Giuseppe Avellone, Agostino Galluzzo
  • Publication number: 20030063807
    Abstract: A method compresses a digital image including a matrix of elements each one including a plurality of digital components of different type representing a pixel. The method includes the steps of providing an incomplete digital image wherein at least one component is missing in each element, obtaining the digital image from the incomplete digital image, splitting the digital image into a plurality of blocks and calculating, for each block, a group of DCT coefficients for the components of each type, and quantizing the DCT coefficients of each group using a corresponding quantization table scaled by a gain factor for achieving a target compression factor. The method further comprises the steps of determining an energy measure of the incomplete digital image and estimating the gain factor as a function of the energy measure, the function being determined experimentally according to the target compression factor.
    Type: Application
    Filed: July 10, 2001
    Publication date: April 3, 2003
    Applicant: STMicroelectronics S.r.l.
    Inventors: Arcangelo Bruna, Massimo Mancuso, Agostino Galluzzo
  • Publication number: 20020080856
    Abstract: The device can be used for generating, in the framework of a CDMA communications terminal, both Walsh-Hadamard channeling codes and OVSF channeling codes. The device comprises a code generator preferably configured for generating Walsh-Hadamard codes. When the device is used for generating Walsh-Hadamard codes, the corresponding index values, applied to an input of the device, are sent to the input of the code generator. Generation of OVSF codes envisages, instead, that the corresponding indices, sent to an input of the device, undergo mapping, which enables generation, starting from the OVSF code, of the corresponding index identifying a string of symbols that is identical within the Walsh-Hadamard code. In this way each string of OVSF code symbols is generated, so producing, by means of the code generator, the generation of the identical string of symbols included in the Walsh-Hadamard code.
    Type: Application
    Filed: September 13, 2001
    Publication date: June 27, 2002
    Applicant: STMicroelectronics S.r.l.
    Inventors: Alessandro Lattuca, Giuseppe Avellone, Ettore Messina, Agostino Galluzzo
  • Publication number: 20020041716
    Abstract: A method is for compressing a digital image that is made up of a matrix of elements, with each element including a plurality of digital components of different types for representing a pixel. The method includes splitting the digital image into a plurality of blocks, and calculating for each block a group of DCT coefficients for the components of each type, and quantizing the DCT coefficients of each block using a corresponding quantization table scaled by a gain factor for achieving a target compression factor. The method further includes determining at least one energy measure of the digital image, and estimating the gain factor as a function of the at least one energy measure. The function is determined experimentally according to the target compression factor.
    Type: Application
    Filed: July 10, 2001
    Publication date: April 11, 2002
    Applicant: STMicroelectronics S.r.l.
    Inventors: Arcangelo Bruna, Massimo Mancuso, Agostino Galluzzo
  • Publication number: 20020039451
    Abstract: A method is for compressing a digital image including a matrix of elements, with each element including at least one component of a different type for representing a pixel. The method includes splitting the digital image into a plurality of blocks, and calculating for each block a group of discrete cosine transform (DCT) coefficients for the components of each type, and quantizing the DCT coefficients of each group using a corresponding quantization table scaled by a gain factor for achieving a target compression factor. The method also includes further quantizing the DCT coefficients of each group using the corresponding quantization table scaled by a pre-set factor, and arranging the further quantized DCT coefficients in a zig-zig vector.
    Type: Application
    Filed: July 9, 2001
    Publication date: April 4, 2002
    Applicant: STMicroelectronics S.r.l
    Inventors: Arcangelo Bruna, Massimo Mancuso, Agostino Galluzzo