Patents by Inventor Akhilesh P. Rallabandi

Akhilesh P. Rallabandi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230197565
    Abstract: A thermal management solution in a mobile computing system is bonded to an integrated circuit component by a thermal interface material layer (TIM layer) that does not require the application of a permanent force to ensure a reliable thermally conductive connection. A leaf spring or other loading mechanism that can apply a permanent force to a TIM layer can be secured to a printed circuit board by fasteners that extend through holes in the board in the vicinity of the integrated circuit component. These holes consume area that could otherwise be used for signal routing. In devices that use a TIM layer that does not require the application of a permanent force, the thermal management solution can be attached to a printed circuit board or chassis at a location remote to the integrated circuit component, where the attachment mechanism does not or minimally interferes with integrated circuit component signal routing.
    Type: Application
    Filed: December 28, 2022
    Publication date: June 22, 2023
    Inventors: Jerrod P. Peterson, Kyle J. Arrington, Ellann Cohen, Mark A. MacDonald, Christopher Michael Moore, Akhilesh P. Rallabandi
  • Patent number: 11251103
    Abstract: Particular embodiments described herein provide for an electronic device that can be configured to enable a segmented heatsink. The electronic device can include a printed circuit board, a substrate, where the substrate is over the printed circuit board, at least two heat sources over the substrate, and a segmented heatsink secured to the printed circuit board, where the segmented heatsink has at least two independent heatsink segments, where each heatsink segment corresponds to at least one heat source and is configured to draw heat from the corresponding heat source. In an example, the heat sources are at a different height.
    Type: Grant
    Filed: March 29, 2019
    Date of Patent: February 15, 2022
    Assignee: Intel Corporation
    Inventors: Jerrod Peterson, Carin Lundquist Ruiz, Akhilesh P. Rallabandi
  • Publication number: 20210059073
    Abstract: Heterogeneous heat pipe solutions provide both low thermal resistance and a high Qmax. Some heterogeneous heat pipe solutions comprise multiple homogenous heat pipes operating in parallel, with each homogeneous heat pipe having its thermal performance tailored to handle a processor operating in a particular power mode. Other heterogeneous heat pipe solutions comprise one or more heterogeneous heat pipes, each heterogeneous heat pipe having more than wick, each wick having a different set of wick characteristics (wick material, wick thickness, etc.). Heterogeneous heat pipes can provide a thermal management solution for processors over their full operating power range.
    Type: Application
    Filed: November 5, 2020
    Publication date: February 25, 2021
    Applicant: Intel Corporation
    Inventors: Gaurav Patankar, Ruander Cardenas, Mark MacDonald, Akhilesh P. Rallabandi
  • Publication number: 20200363104
    Abstract: In one embodiment, a computing device includes a processor, a water block, a thermoelectric cooler, and a thermal space transformer. The thermoelectric cooler is disposed in series between the processor and the water block, and the thermoelectric cooler includes a heated surface and a cooled surface. The heated surface is thermally coupled to the water block, and the cooled surface is thermally coupled to the processor via the thermal space transformer. The thermal space transformer transfers thermal energy between the processor and the cooled surface of the thermoelectric cooler. The thermal space transformer includes a smaller surface and a larger surface. The smaller surface is thermally coupled to the processor and the larger surface is thermally coupled to the cooled surface of the thermoelectric cooler.
    Type: Application
    Filed: July 31, 2020
    Publication date: November 19, 2020
    Applicant: Intel Corporation
    Inventors: Mark MacDonald, Akhilesh P. Rallabandi, Genevieve L. Gaudin, Daniel J. Ragland, Rodny Rodriguez, Felipe Gonzalez, Hui Xiong, Sai Goutham Ponnada, Christoph Jechlitschek
  • Publication number: 20190252286
    Abstract: Particular embodiments described herein provide for an electronic device that can be configured to enable a segmented heatsink. The electronic device can include a printed circuit board, a substrate, where the substrate is over the printed circuit board, at least two heat sources over the substrate, and a segmented heatsink secured to the printed circuit board, where the segmented heatsink has at least two independent heatsink segments, where each heatsink segment corresponds to at least one heat source and is configured to draw heat from the corresponding heat source. In an example, the heat sources are at a different height.
    Type: Application
    Filed: March 29, 2019
    Publication date: August 15, 2019
    Applicant: INTEL CORPORATION
    Inventors: Jerrod Peterson, Carin Lundquist Ruiz, Akhilesh P. Rallabandi
  • Patent number: 10281521
    Abstract: Techniques for thermal management of a device under test are discussed. In an example, an apparatus may include a pedestal having a device-specific surface configured to exchange heat with the integrated circuit while the device-specific surface is in contact with a surface of the integrated circuit or separated from the surface of the integrated circuit by a layer of thermally conductive material, and a heat generating element configured to heat the device-specific surface. In certain examples, the pedestal may include a plurality of channels configured to couple to a manifold and to route thermal material from the manifold through an interior of the pedestal for maintaining temperature control of the surface of an integrated circuit under test.
    Type: Grant
    Filed: December 2, 2016
    Date of Patent: May 7, 2019
    Assignee: Intel Corporation
    Inventors: David Won-jun Song, James R. Hastings, Akhilesh P. Rallabandi, Morten S. Jensen, Christopher Wade Ackerman, Christopher R. Schroeder, Nader N. Abazarnia, John C. Johnson
  • Publication number: 20180156863
    Abstract: Techniques for thermal management of a device under test are discussed. In an example, an apparatus may include a pedestal having a device-specific surface configured to exchange heat with the integrated circuit while the device-specific surface is in contact with a surface of the integrated circuit or separated from the surface of the integrated circuit by a layer of thermally conductive material, and a heat generating element configured to heat the device-specific surface. In certain examples, the pedestal may include a plurality of channels configured to couple to a manifold and to route thermal material from the manifold through an interior of the pedestal for maintaining temperature control of the surface of an integrated circuit under test.
    Type: Application
    Filed: December 2, 2016
    Publication date: June 7, 2018
    Inventors: David Won-jun Song, James R. Hastings, Akhilesh P. Rallabandi, Morten S. Jensen, Christopher Wade Ackerman, Christopher R. Schroeder, Nader N. Abazarnia, John C. Johnson