Patents by Inventor Akifumi Gawase

Akifumi Gawase has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240097044
    Abstract: According to one embodiment, a semiconductor device includes a first conductive layer between first and second insulating layers with an oxide semiconductor column extending in the first direction through these layers. A third insulating layer covers the column. The column has a first semiconductor portion at a first position matching the first insulating layer, a second semiconductor portion at a second position matching second insulating layer, and a third semiconductor portion at a third position matching the first conductive layer. The first semiconductor portion is continuous along a second direction between the third insulating layer, the second semiconductor portion is continuous along the second direction between the third insulating layer, but the third semiconductor portion is not continuous between the third insulating layer.
    Type: Application
    Filed: August 25, 2023
    Publication date: March 21, 2024
    Inventors: Yusuke KASAHARA, Kappei IMAMURA, Akifumi GAWASE, Shinji MORI, Akihiro KAJITA
  • Publication number: 20240098962
    Abstract: A semiconductor device including a first electrode, a second electrode, an oxide semiconductor disposed between the first electrode and the second electrode, and a first oxide layer containing a predetermined element, oxygen, and an additional element and disposed between the first electrode and the oxide semiconductor, wherein the predetermined element is at least one of tantalum, boron, hafnium, silicon, zirconium, or niobium, and the additional element is at least one of phosphorus, sulfur, copper, zinc, gallium, germanium, arsenic, selenium, silver, indium, tin, antimony, tellurium, or bismuth.
    Type: Application
    Filed: February 7, 2023
    Publication date: March 21, 2024
    Applicant: Kioxia Corporation
    Inventors: Daisuke WATANABE, Akifumi GAWASE, Takeshi IWASAKI, Kazuhiro KATONO, Yusuke MUTO, Yusuke MIKI, Akinori KIMURA
  • Publication number: 20240084456
    Abstract: In one embodiment, a film forming apparatus includes a chamber configured to load a substrate, a stage configured to support the substrate, and a gas supplier configured to supply a gas into the chamber to form a film on the substrate. The device further includes a first detector configured to detect a first value that varies depending on at least pressure of a first portion above the stage in the chamber, and a controller configured to control a process of forming the film on the substrate based on the first value.
    Type: Application
    Filed: June 9, 2023
    Publication date: March 14, 2024
    Applicant: Kioxia Corporation
    Inventors: Kazuhiro KATONO, Kazuhiro MATSUO, Yusuke MIKI, Kenichiro TORATANI, Akifumi GAWASE
  • Patent number: 11883926
    Abstract: A polishing pad is described. The polishing pad includes a surface having plural recess portions, and a substrate is polished by the surface. In the pad, an average width of the recess portions at one area of the surface in a direction parallel to the surface is 20 ?m or less, and an average density of the recess portions at one area of the surface is 1,300/mm2 or more.
    Type: Grant
    Filed: May 13, 2021
    Date of Patent: January 30, 2024
    Assignee: KIOXIA CORPORATION
    Inventors: Takahiko Kawasaki, Yukiteru Matsui, Akifumi Gawase
  • Publication number: 20230413530
    Abstract: According to one embodiment, a semiconductor device includes first and second electrodes comprising a metal oxide an oxide semiconductor layer between the first and second electrodes, a gate electrode surrounding the oxide semiconductor layer, a gate insulating layer, a first insulating layer between the first and gate electrodes, a second insulating layer between the second and gate electrodes, a first conductive layer contacting the surface of the first electrode, a second conductive layer contacting the surface of second electrode, a first layer surrounding the first electrode, a second layer surrounding the second electrode, a third insulating layer between the first electrode and the first insulating layer and contacting the gate insulating layer and the first layer, and a fourth insulating layer between the second electrode and the second insulating layer and contacting the gate insulating layer and the second layer.
    Type: Application
    Filed: March 3, 2023
    Publication date: December 21, 2023
    Inventors: Akifumi GAWASE, Shuntaro YAMASHITA
  • Publication number: 20230307358
    Abstract: A semiconductor device includes first conductive layers, a width in a first direction thereof being a first width, a second conductive layer arranged with first conductive layers, a smaller one of a width in the first direction thereof and a width in a second direction thereof being a second width that is larger than the first width, a third conductive layer in contact with one end portion of at least one of first conductive layers, and a fourth conductive layer in contact with one end portion of the second conductive layer. The at least one of first conductive layers and the second conductive layer contain a first metal, a second metal, and oxygen (O). A concentration of the first metal of the at least one of first conductive layers is higher than a concentration of the first metal of the second conductive layer.
    Type: Application
    Filed: September 9, 2022
    Publication date: September 28, 2023
    Applicant: Kioxia Corporation
    Inventors: Akifumi GAWASE, Yimin LIU
  • Publication number: 20230200050
    Abstract: A semiconductor device of embodiments includes: a first electrode; a second electrode; an oxide semiconductor layer between the first electrode and the second electrode; a gate electrode surrounding the oxide semiconductor layer; a gate insulating layer between the gate electrode and the oxide semiconductor layer; a first insulating layer provided between the first electrode and the gate electrode; and a second insulating layer provided between the second electrode and the gate electrode. In a cross section parallel to a first direction from the first electrode to the second electrode, a first portion of the oxide semiconductor layer is provided between the gate insulating layer and the first electrode. In the cross section, a second portion of the oxide semiconductor layer is provided between the gate insulating layer and the second electrode.
    Type: Application
    Filed: June 15, 2022
    Publication date: June 22, 2023
    Applicant: Kioxia Corporation
    Inventors: Akifumi GAWASE, Ha HOANG, Atsuko SAKATA, Yuta KAMIYA, Kazuhiro MATSUO, Keiichi SAWA, Kota TAKAHASHI, Kenichiro TORATANI, Yimin LIU
  • Publication number: 20230085635
    Abstract: A resistance change device of an embodiment includes a first electrode, a second electrode, and a layer disposed between the first electrode and the second electrode and containing a resistance change material. In the resistance change device of the embodiment, the resistance change material contains: a first element including Sb and Te; a second element including at least one element selected from the group consisting of Ge and In; a third element including at least one element selected from the group consisting of Si, N, B, C, Al, and Ti; and a fourth element including at least one element selected from the group consisting of Sc, Y, La, Gd, Zr, and Hf.
    Type: Application
    Filed: March 7, 2022
    Publication date: March 23, 2023
    Applicant: Kioxia Corporation
    Inventors: Hiroki KAWAI, Kasumi YASUDA, Hiroki TOKUHIRA, Kazuhiro KATONO, Akifumi GAWASE, Katsuyoshi KOMATSU, Tadaomi DAIBOU
  • Publication number: 20230030121
    Abstract: Provided is a semiconductor device of the embodiment including: an oxide semiconductor layer; a gate electrode; a first electrode electrically connected to one portion of the oxide semiconductor layer, the first electrode including a first region, second region, a third region, and a fourth region, the first region disposed between the first portion and the second region, the first region disposed between the third region and the fourth region, the first region containing at least one element of In, Zn, Sn or Cd, and oxygen, the second region containing at least one metal element of Ti, Ta, W, or Ru, the third region and the fourth region containing the at least one metal element and oxygen, the third region and the fourth region having an atomic concentration of oxygen higher than that of the second region; and a second electrode electrically connected to another portion of the oxide semiconductor layer.
    Type: Application
    Filed: October 12, 2022
    Publication date: February 2, 2023
    Applicant: Kioxia Corporation
    Inventors: Akifumi GAWASE, Atsuko SAKATA
  • Patent number: 11534886
    Abstract: According to one embodiment, a polishing apparatus includes a holder for holding a polishing pad for polishing a surface of a substrate. A plurality of pressing members are configured to press a back surface side of the polishing pad while held by the holder. A driving unit is configured to selectively move pressing members in a direction towards the surface of the substrate so as to press the back surface side of the polishing pad.
    Type: Grant
    Filed: March 2, 2020
    Date of Patent: December 27, 2022
    Assignee: KIOXIA CORPORATION
    Inventors: Mikiya Sakashita, Yukiteru Matsui, Akifumi Gawase
  • Patent number: 11502204
    Abstract: Provided is a semiconductor device of the embodiment including: an oxide semiconductor layer; a gate electrode; a first electrode electrically connected to one portion of the oxide semiconductor layer, the first electrode including a first region, second region, a third region, and a fourth region, the first region disposed between the first portion and the second region, the first region disposed between the third region and the fourth region, the first region containing at least one element of In, Zn, Sn or Cd, and oxygen, the second region containing at least one metal element of Ti, Ta, W, or Ru, the third region and the fourth region containing the at least one metal element and oxygen, the third region and the fourth region having an atomic concentration of oxygen higher than that of the second region; and a second electrode electrically connected to another portion of the oxide semiconductor layer.
    Type: Grant
    Filed: September 10, 2021
    Date of Patent: November 15, 2022
    Assignee: Kioxia Corporation
    Inventors: Akifumi Gawase, Atsuko Sakata
  • Publication number: 20220302320
    Abstract: Provided is a semiconductor device of the embodiment including: an oxide semiconductor layer; a gate electrode; a first electrode electrically connected to one portion of the oxide semiconductor layer, the first electrode including a first region, second region, a third region, and a fourth region, the first region disposed between the first portion and the second region, the first region disposed between the third region and the fourth region, the first region containing at least one element of In, Zn, Sn or Cd, and oxygen, the second region containing at least one metal element of Ti, Ta, W, or Ru, the third region and the fourth region containing the at least one metal element and oxygen, the third region and the fourth region having an atomic concentration of oxygen higher than that of the second region; and a second electrode electrically connected to another portion of the oxide semiconductor layer.
    Type: Application
    Filed: September 10, 2021
    Publication date: September 22, 2022
    Applicant: Kioxia Corporation
    Inventors: Akifumi GAWASE, Atsuko SAKATA
  • Publication number: 20220262954
    Abstract: A semiconductor device of an embodiment includes a first electrode, a second electrode, a first metallic region provided between the first electrode and the second electrode and includes at least one metallic element selected from the group consisting of indium (In), gallium (Ga), zinc (Zn), aluminum (Al), magnesium (Mg), manganese (Mn), titanium (Ti), tungsten (W), molybdenum (Mo), and tin (Sn), a second metallic region provided between the first metallic region and the second electrode and includes the at least one metallic element, a semiconductor region provided between the first metallic region and the second metallic region and includes the at least one metallic element and oxygen (O), an insulating region provided between the first metallic region and the second metallic region and is surrounded by the semiconductor region, a gate electrode surrounding the semiconductor region, and a gate insulating layer provided between the semiconductor region and the gate electrode.
    Type: Application
    Filed: May 2, 2022
    Publication date: August 18, 2022
    Applicant: Kioxia Corporation
    Inventors: Tomoki ISHIMARU, Shinji MORI, Kazuhiro MATSUO, Keiichi SAWA, Akifumi GAWASE
  • Patent number: 11349033
    Abstract: A semiconductor device of an embodiment includes a first electrode, a second electrode, a first metallic region provided between the first electrode and the second electrode and includes at least one metallic element selected from the group consisting of indium (In), gallium (Ga), zinc (Zn), aluminum (Al), magnesium (Mg), manganese (Mn), titanium (Ti), tungsten (W), molybdenum (Mo), and tin (Sn), a second metallic region provided between the first metallic region and the second electrode and includes the at least one metallic element, a semiconductor region provided between the first metallic region and the second metallic region and includes the at least one metallic element and oxygen (O), an insulating region provided between the first metallic region and the second metallic region and is surrounded by the semiconductor region, a gate electrode surrounding the semiconductor region, and a gate insulating layer provided between the semiconductor region and the gate electrode.
    Type: Grant
    Filed: September 16, 2020
    Date of Patent: May 31, 2022
    Assignee: Kioxia Corporation
    Inventors: Tomoki Ishimaru, Shinji Mori, Kazuhiro Matsuo, Keiichi Sawa, Akifumi Gawase
  • Publication number: 20220048155
    Abstract: A polishing apparatus includes a first substrate holder capable of holding a substrate coated with a film. The apparatus also includes a first pad holder capable of holding a first pad. The apparatus further includes a first driver configured to translate the first pad on a surface of the film so as to cause the first pad to polish the film.
    Type: Application
    Filed: February 25, 2021
    Publication date: February 17, 2022
    Applicant: Kioxia Corporation
    Inventors: Mikiya SAKASHITA, Akifumi GAWASE, Kohei NAKAMURA, Yukiteru MATSUI
  • Publication number: 20210305431
    Abstract: A semiconductor device of an embodiment includes a first electrode, a second electrode, a first metallic region provided between the first electrode and the second electrode and includes at least one metallic element selected from the group consisting of indium (In), gallium (Ga), zinc (Zn), aluminum (Al), magnesium (Mg), manganese (Mn), titanium (Ti), tungsten (W), molybdenum (Mo), and tin (Sn), a second metallic region provided between the first metallic region and the second electrode and includes the at least one metallic element, a semiconductor region provided between the first metallic region and the second metallic region and includes the at least one metallic element and oxygen (O), an insulating region provided between the first metallic region and the second metallic region and is surrounded by the semiconductor region, a gate electrode surrounding the semiconductor region, and a gate insulating layer provided between the semiconductor region and the gate electrode.
    Type: Application
    Filed: September 16, 2020
    Publication date: September 30, 2021
    Applicant: Kioxia Corporation
    Inventors: Tomoki ISHIMARU, Shinji MORI, Kazuhiro MATSUO, Keiichi SAWA, Akifumi GAWASE
  • Publication number: 20210260719
    Abstract: A polishing pad is described. The polishing pad includes a surface having plural recess portions, and a substrate is polished by the surface. In the pad, an average width of the recess portions at one area of the surface in a direction parallel to the surface is 20 ?m or less, and an average density of the recess portions at one area of the surface is 1,300/mm2 or more.
    Type: Application
    Filed: May 13, 2021
    Publication date: August 26, 2021
    Applicant: TOSHIBA MEMORY CORPORATION
    Inventors: Takahiko KAWASAKI, Yukiteru MATSUI, Akifumi GAWASE
  • Publication number: 20210170542
    Abstract: According to one embodiment, a polishing apparatus includes a holder for holding a polishing pad for polishing a surface of a substrate. A plurality of pressing members are configured to press a back surface side of the polishing pad while held by the holder. A driving unit is configured to selectively move pressing members in a direction towards the surface of the substrate so as to press the back surface side of the polishing pad.
    Type: Application
    Filed: March 2, 2020
    Publication date: June 10, 2021
    Inventors: Mikiya SAKASHITA, Yukiteru MATSUI, Akifumi GAWASE
  • Patent number: 10998283
    Abstract: A semiconductor device production method includes forming a first recess portion in a first insulating film formed on a first substrate and a first conductive layer on the front surface of the first insulating film located inside and outside the first recess portion. In the first recess portion, a first pad is formed having a width of 3 ?m or less and including the first conductive layer by performing a first polishing the first conductive layer at a first polishing rate and, after the first polishing, a second polishing the first conductive layer at a second polishing rate lower than the first polishing rate. The first pad of the first substrate and a second pad of a second substrate are joined together by annealing the first substrate and the second substrate. The selection ratio of the first conductive layer to the first insulating film is 0.3 to 0.4.
    Type: Grant
    Filed: February 28, 2019
    Date of Patent: May 4, 2021
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Takahiko Kawasaki, Yukiteru Matsui, Akifumi Gawase
  • Patent number: 10991588
    Abstract: In accordance with an embodiment, a manufacturing method of a semiconductor device includes bringing a first catalyst into contact with a workpiece to form an oxide film on a surface of the workpiece, and bringing a second catalyst different from the first catalyst and the oxide film into contact with each other or moving the second catalyst and the oxide film closer to each other to elute the oxide film into a treatment liquid.
    Type: Grant
    Filed: November 6, 2017
    Date of Patent: April 27, 2021
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Akifumi Gawase, Yukiteru Matsui, Takahiko Kawasaki