Patents by Inventor Akifumi Suzuki

Akifumi Suzuki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10955609
    Abstract: A display device includes a display panel, and a supporting unit that supports the display panel, the supporting unit having a first protruding portion within a predetermined distance from a center portion of the display panel, the first protruding portion having an overall rectangular shape with a step part at at least one corner of the overall rectangular shape.
    Type: Grant
    Filed: January 6, 2020
    Date of Patent: March 23, 2021
    Assignee: FUNAI ELECTRIC CO., LTD.
    Inventors: Akira Yokawa, Yuki Kita, Akihiro Fujikawa, Yasuyuki Fukumoto, Yasuhiro Mori, Yuto Suzuki, Hirofumi Horiuchi, Hirohiko Tsuji, Takahito Yamanaka, Hideo Yonezawa, Akifumi Kono
  • Patent number: 10914888
    Abstract: A display device comprises a display panel, a light source, an optical member, and a frame. The optical member reflects light from the light source towards the display panel. The frame has a protruding portion that supports the optical member and is disposed near a periphery of the display panel.
    Type: Grant
    Filed: April 7, 2017
    Date of Patent: February 9, 2021
    Assignee: FUNAI ELECTRIC CO., LTD.
    Inventors: Akira Yokawa, Yuki Kita, Akihiro Fujikawa, Yasuyuki Fukumoto, Yasuhiro Mori, Yuto Suzuki, Hirofumi Horiuchi, Hirohiko Tsuji, Takahito Yamanaka, Hideo Yonezawa, Akifumi Kono
  • Patent number: 10908988
    Abstract: A storage apparatus includes: a controller; and a plurality of storage drives, wherein the controller issues a read command for specifying a value associated with an error correction mode to a first storage drive of the plurality of storage drives, the first storage drive selects the error correction mode associated with the value specified by the read command from a plurality of error correction modes, the plurality of error correction modes include a first error correction mode and a second error correction mode with a higher correcting capability and a longer maximum delay time than those of the first error correction mode, and the first storage drive executes a read of data from a storage medium in the selected error correction mode.
    Type: Grant
    Filed: April 3, 2017
    Date of Patent: February 2, 2021
    Assignee: Hitachi, Ltd.
    Inventors: Mitsuo Date, Hideyuki Koseki, Akifumi Suzuki, Masahiro Tsuruya
  • Patent number: 10901401
    Abstract: Provided are a correlation determination unit to set, as a first apparatus, one apparatus among a plurality of apparatuses, set, as a first quality value, a quality value indicating a quality of an intermediate product processed by the first apparatus, set, as a second apparatus, an apparatus among the plurality of apparatuses that belongs to a process prior to the process to which the first apparatus belongs, set, as a second quality value, a quality value of an intermediate product processed by the second apparatus and determine whether correlation exists between the first quality value and the second quality value; a set determination unit to determine, using a quality standard value BQ indicating a standard of quality of the intermediate product, whether the first apparatus and the second apparatus are a set of apparatuses for which a first error between the first quality value and the quality standard value BQ and a second error between the second quality value and the quality standard value BQ cancel ea
    Type: Grant
    Filed: January 15, 2016
    Date of Patent: January 26, 2021
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Mitsuteru Shiba, Akifumi Suzuki
  • Patent number: 10896700
    Abstract: A system including a first storage drive and a superior device superior to the first storage drive, wherein the superior device specifies a first allowable environmental temperature that makes the remaining lifetime of the first storage drive longer than the remaining operation schedule period of the first storage drive, and controls an environmental temperature adjusting device that adjusts the environmental temperature of the first storage drive on the basis of the first allowable environmental temperature.
    Type: Grant
    Filed: April 19, 2017
    Date of Patent: January 19, 2021
    Assignee: HITACHI, LTD.
    Inventors: Masahiro Tsuruya, Masahiro Arai, Akifumi Suzuki, Shimpei Nomura
  • Patent number: 10884630
    Abstract: A storage system includes a controller and a nonvolatile memory drive, in which the controller transmits a write request that designates a volume identifier of a volume to be provided to a host, to the nonvolatile memory drive; the nonvolatile memory drive exclusively allocates a free block selected from a plurality of blocks to the volume identifier; write data of the write request is written to the free block; when the write data is update write data, an area that stores data to be updated is changed to an invalid data area; and after valid data of a block including the invalid data area is migrated to another block, all data of the block including the invalid data area is erased.
    Type: Grant
    Filed: April 13, 2017
    Date of Patent: January 5, 2021
    Assignee: Hitachi, Ltd.
    Inventors: Koji Hosogi, Naoya Okada, Akifumi Suzuki, Hideyuki Koseki, Masahiro Tsuruya
  • Publication number: 20200394256
    Abstract: A storage system that performs irreversible compression on time-series data using a compressor/decompressor based on machine learning calculates a statistical amount value of each of one or more kinds of statistical amounts based on one or more parameters in relation to original data (time-series data input to a compressor/decompressor) and calculates a statistical amount value of each of the one or more kinds of statistical amounts based on the one or more kinds of parameters in relation to decompressed data (time-series data output from the compressor/decompressor) corresponding to the original data. The machine learning of the compressor/decompressor is performed based on the statistical amount value calculated for each of the one or more kinds of statistical amounts in relation to the original data and the statistical amount value calculated for each of the one or more kinds of statistical amounts in relation to the decompressed data.
    Type: Application
    Filed: March 18, 2020
    Publication date: December 17, 2020
    Inventors: Takahiro NARUKO, Hiroaki AKUTSU, Akifumi SUZUKI
  • Patent number: 10860577
    Abstract: An intermediate device is disposed between a host and a search target. Search requests of m-multiplicity (requests involving a data transfer amount that is unknown to the host) for at least one among n-processes (n is an integer equal to or more than 1) to be executed by the host are issued as requests from the host to the intermediate device. A temporary area associated with the search requests is allocated in the host. For each of the search requests, the intermediate device recognizes a hit data volume in accordance with the search request within a search scope. For each of the search, the hit data is written in an area of the temporary area that corresponds to a write destination address. The write destination address is updated for each of the search requests on the basis of the recognized hit data volume.
    Type: Grant
    Filed: December 24, 2015
    Date of Patent: December 8, 2020
    Assignee: HITACHI, LTD.
    Inventors: Koji Hosogi, Akifumi Suzuki, Kazuyoshi Serizawa, Akira Yamamoto
  • Patent number: 10850363
    Abstract: In accordance with an embodiment, a manufacturing method of a semiconductor device includes detecting elastic waves, and detecting or predicting an abnormality of the processing object occurring during polishing of the processing object. The elastic waves are generated from the processing object during the polishing. The abnormality is detected or predicted by analyzing the detected elastic waves.
    Type: Grant
    Filed: September 2, 2015
    Date of Patent: December 1, 2020
    Assignee: Toshiba Memory Corporation
    Inventors: Yukiteru Matsui, Takahiko Kawasaki, Akifumi Gawase, Shuji Suzuki, Tsutomu Miki
  • Publication number: 20200365411
    Abstract: A dry etching method according to the present invention includes etching silicon nitride by bringing a mixed gas containing hydrogen fluoride and a fluorine-containing carboxylic acid into contact with the silicon nitride in a plasma-less process at a temperature lower than 100° C. Preferably, the amount of the fluorine-containing carboxylic acid contained is 0.01 vol % or more based on the total amount of the hydrogen fluoride and the fluorine-containing carboxylic acid. Examples of the fluorine-containing carboxylic acid are monofluoroacetic acid, difluoroacetic acid, trifluoroacetic acid, difluoropropionic acid, pentafluoropropionic acid, pentafluorobutyric acid and the like. This dry etching method enables etching of the silicon nitride at a high etching rate and shows a high selectivity ratio of the silicon nitride to silicon oxide and polycrystalline silicon while preventing damage to the silicon oxide.
    Type: Application
    Filed: October 24, 2018
    Publication date: November 19, 2020
    Inventors: Shoi SUZUKI, Akifumi YAO
  • Publication number: 20200361241
    Abstract: A plurality of belt layers are laminated in a radial direction. The belt layer includes a plurality of steel cords arranged in parallel and aligned in a row, and rubber. The steel cords have a 1×4 structure in which 4 filaments are stranded. [Tensile rigidity]×[number of ends] is 10,000 N/% or greater and 20,000 N/% or less, and an interface rigidity is 2.5 MPa or higher and 5.0 MPa or lower.
    Type: Application
    Filed: October 26, 2017
    Publication date: November 19, 2020
    Inventors: Akifumi MATSUOKA, Masumi SUZUKI, Koji FUJISAWA
  • Patent number: 10838628
    Abstract: A storage system includes a flash storage in which a plurality of flash chips are accommodated and a storage controller that reads/writes data from and on the flash storage in response to a request from a high-order device, the flash chip capable of changing a mode of a cell of the flash chip to a first mode and a second mode in which an amount of storable information is less but a lifetime is longer than in the first mode, and a control method of the storage system is provided. The storage system includes: a prediction unit; a determination unit; and a mode change.
    Type: Grant
    Filed: August 31, 2018
    Date of Patent: November 17, 2020
    Assignee: HITACHI, LTD.
    Inventors: Akira Yamamoto, Akifumi Suzuki
  • Publication number: 20200340089
    Abstract: To perform blast quenching for a plurality of solution-treated workpieces in a uniform manner for a group of the workpieces to allow the group of the workpieces to have a uniform quality, there is provided a quenching apparatus configured to perform quenching treatment on a solution-treated workpiece unloaded from a solution treatment furnace. The solution treatment furnace includes a plurality of workpiece storage chambers arranged horizontally into an annular shape and stacked in a vertical direction and a plurality of workpiece unloading ports corresponding to the workpiece storage chambers. The quenching apparatus is provided so as to be movable in accordance with the positions of the workpiece unloading ports.
    Type: Application
    Filed: April 17, 2020
    Publication date: October 29, 2020
    Inventors: Akifumi SUZUKI, Hitoshi SAKAMOTO
  • Publication number: 20200338928
    Abstract: A tire includes a steel cord having a plated coating layer, rubber covering the steel cord, the plated coating layer including Cu and Zn, and a bonding layer including Cu2S and CuS provided closer to the rubber than an interface between the steel cord and the rubber, wherein a molar ratio Cu2S/CuS of Cu2S and CuS included in the bonding layer is 1.0 or higher.
    Type: Application
    Filed: December 20, 2018
    Publication date: October 29, 2020
    Inventors: Tetsuya NAKAJIMA, Hiroyuki FUJIOKA, Akifumi MATSUOKA, Kenichi YAMASHITA, Shinei TAKAMURA, Masumi SUZUKI, Koji FUJISAWA
  • Patent number: 10803972
    Abstract: A flash memory module includes a flash memory and a controller. The controller acquires information indicating reliability of monitoring target data of the flash memory, specifies a first cell, which is a cell having a threshold voltage level lower than a threshold voltage level of a corresponding cell in expected value data obtained by correcting an error bit of the monitoring target data, among cells in which error bits have occurred of the monitoring target data when it is determined that the reliability indicated by the acquired information is lower than a predetermined condition, and transmits rewrite correction target cell data, which is data corresponding to data of the first cell in the expected value data, to the flash memory. The flash memory injects an electron into the first cell based on a threshold voltage indicated by the rewrite correction target cell data.
    Type: Grant
    Filed: March 6, 2017
    Date of Patent: October 13, 2020
    Assignee: Hitachi, Ltd.
    Inventors: Akifumi Suzuki, Junji Ogawa
  • Publication number: 20200310655
    Abstract: Provided is a storage system that can store various types of and large amounts of sensor data while accurately compressing the sensor data without wasting storage resources. The storage system includes: a storage that records sensor data output from a plurality of sensors; a processor that controls recording of sensor data in the storage; and a memory that records parameters of the plurality of sensors. The processor reads parameters assigned to the sensors that output the sensor data from the memory, normalizes the sensor data based on the parameters, compresses the normalized sensor data, and records the compressed sensor data in the storage.
    Type: Application
    Filed: March 5, 2020
    Publication date: October 1, 2020
    Inventors: Akifumi SUZUKI, Hiroaki AKUTSU, Takahiro NARUKO
  • Publication number: 20200301595
    Abstract: An object of the invention is to optimize a storage cost for data. There is provided a storage system including a storage device, a memory, and a processor configured to control input and output of data to and from the storage device. The processor monitors a storage amount that is at least one of a write amount (a total amount of data received as a write target) and a physical use amount (a total amount of data physically stored in the storage device), and a read amount (a total amount of data that is read), and calculates a fee as a storage cost that is a cost related to use of the storage device in a target period, based on a storage amount and a read amount in the target period in accordance with a monitoring result.
    Type: Application
    Filed: March 9, 2020
    Publication date: September 24, 2020
    Inventors: Hiroaki AKUTSU, Takahiro NARUKO, Akifumi SUZUKI
  • Patent number: 10768838
    Abstract: When a logical capacity of a nonvolatile semiconductor memory is increased, after a logical capacity which is allocated to a RAID group but unused is released, the RAID group is reconfigured to include the released logical capacity and the increased logical capacity. When the logical capacity of the nonvolatile semiconductor memory is reduced, after the reduced logical capacity is released from the RAID group, the RAID group is reconfigured with the released logical capacity.
    Type: Grant
    Filed: January 12, 2017
    Date of Patent: September 8, 2020
    Assignee: HITACHI, LTD.
    Inventors: Shimpei Nomura, Masahiro Tsuruya, Akifumi Suzuki
  • Publication number: 20200274569
    Abstract: A communication system including a transmission device and a reception device which wirelessly communicate with each other. The transmission device includes a transmission circuit that performs: cyclical transmission of a wake-up signal including a specific pattern; and transmission of data. The reception device includes: a standby circuit that receives a signal, and outputs a detection signal indicating reception of the wake up signal when detecting that the specific pattern is cyclically included in the signal received; and a reception circuit that receives the data from the transmission device after the detection signal is output from the standby circuit.
    Type: Application
    Filed: May 14, 2020
    Publication date: August 27, 2020
    Inventors: Kenichi HOSHI, Ryoichi SUZUKI, Akifumi NAGAO, Kentaro WATANABE
  • Patent number: 10725865
    Abstract: A storage unit includes a plurality of storage devices that form a RAID group, that are coupled to the same bus, and that communicate with each other. Each of the plurality of storage devices includes a device controller and a storage medium. The plurality of storage devices store each of data and parities generated on the basis of the data, the data and the parities being included in RAID stripes. A first device controller of a first storage device included in the RAID group transmits, to the plurality of storage devices included in the RAID group other than the first storage device, an instruction to transfer the data and/or the parities included in the RAID stripes and restores the data or the parity corresponding to the first storage device of the RAID stripes on the basis of the transferred data and the transferred parities.
    Type: Grant
    Filed: February 25, 2015
    Date of Patent: July 28, 2020
    Assignee: HITACHI LTD.
    Inventors: Mitsuhiro Okada, Akifumi Suzuki, Satoshi Morishita, Akira Yamamoto