Patents by Inventor Akihiko Chiba
Akihiko Chiba has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250087274Abstract: A semiconductor storage device includes a first semiconductor substrate, a second semiconductor substrate, a first memory cell and a second memory cell provided between the first semiconductor substrate and the second semiconductor substrate, a first word line electrically connected to the first memory cell, a second word line electrically connected to the second memory cell, a first transistor that is provided on the first semiconductor substrate and electrically connected between the first word line and a first wiring through which a voltage is applied to the first word line, and a second transistor that is provided on the semiconductor substrate and electrically connected between the second word line and a second wiring through which a voltage is applied to the second word line.Type: ApplicationFiled: November 26, 2024Publication date: March 13, 2025Inventors: Hiroyuki TAKENAKA, Akihiko CHIBA, Teppei HIGASHITSUJI, Kiyofumi SAKURAI, Hiroaki NAKASA, Youichi MAGOME
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Patent number: 12215396Abstract: An iron-based alloy has excellent corrosion resistance and high strength and a method of manufacturing the iron-based alloy. The iron-based alloy includes Cr: 10 to 22 mass %, W: 1 to 12 mass %, and C: 0.1 to 2.3 mass %, with the remainder being unavoidable impurities and Fe, and is composed of a cast material having a structure composed mainly of austenite or a quenched material having a structure composed mainly of martensite and in which carbides are precipitated. The iron-based alloy may further include Cu: 0.5 to 6 mass % and/or Ni: 0.5 to 2.5 mass %, and may further include at least one of Al, Mo, and Si in an amount of 1 to 3 mass %.Type: GrantFiled: September 2, 2019Date of Patent: February 4, 2025Assignee: TOHOKU UNIVERSITYInventors: Kenta Yamanaka, Akihiko Chiba
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Patent number: 12183401Abstract: A semiconductor storage device includes a first semiconductor substrate, a second semiconductor substrate, a first memory cell and a second memory cell provided between the first semiconductor substrate and the second semiconductor substrate, a first word line electrically connected to the first memory cell, a second word line electrically connected to the second memory cell, a first transistor that is provided on the first semiconductor substrate and electrically connected between the first word line and a first wiring through which a voltage is applied to the first word line, and a second transistor that is provided on the semiconductor substrate and electrically connected between the second word line and a second wiring through which a voltage is applied to the second word line.Type: GrantFiled: October 3, 2023Date of Patent: December 31, 2024Assignee: Kioxia CorporationInventors: Hiroyuki Takenaka, Akihiko Chiba, Teppei Higashitsuji, Kiyofumi Sakurai, Hiroaki Nakasa, Youichi Magome
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Patent number: 12152289Abstract: A titanium alloy additive manufacturing product contains 5.50 to 6.75 wt % of Al, 3.50 to 4.50 wt % of V, 0.20 wt % or less of O, 0.40 wt % or less of Fe, 0.015 wt % or less of H, 0.08 wt % or less of C, 0.05 wt % or less of N, and inevitable impurities, in which a pore content is 0.05 number/mm2 or less, and a tensile strength is 855 MPa or more.Type: GrantFiled: January 31, 2020Date of Patent: November 26, 2024Assignees: TOHOKU UNIVERSITY, JAMPT CORPORATIONInventors: Akihiko Chiba, Noritaka Yasuda
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Publication number: 20240231310Abstract: An information processing apparatus for controlling additive manufacturing of a powder bed method includes an acquirer that acquires roughness data indicating a roughness of a manufacturing surface after melting, and defect determiner that divides the manufacturing surface into small regions each having a predetermined size, and compares the roughness data with a predetermined threshold for each small region, thereby determining whether a defect exists in the small region. If an unmolten region is included in the small region, the defect determiner replaces data of the manufacturing surface in the unmolten region using data of the manufacturing surface in the small region, and determines whether a defect exists in the small region including the unmolten region. Also, the manufacturing defect detection method further includes a defect repair instructor that instructs remelting of a region that is determined by the defect determiner to have a defect.Type: ApplicationFiled: February 26, 2021Publication date: July 11, 2024Applicant: TECHNOLOGY RESEARCH ASSOCIATION FOR FUTURE ADDITIVE MANUFACTURINGInventors: Kenta AOYAGI, Akihiko CHIBA
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Publication number: 20240139815Abstract: An additive manufacturing development method includes predicting a defect that occurs in a product based on a combination of a plurality of design data and a plurality of manufacturing conditions, collecting defect detection data for defect detection by monitoring the product during manufacturing in accordance with the combination of the plurality of design data and the plurality of manufacturing conditions, and generating a process map in which the plurality of manufacturing conditions are plotted using the predicted defect and the collected defect detection data. The method further includes collecting defect repair data for defect repair by monitoring the product during manufacturing and repairing a defect detected from the product, and storing the defect and the defect repair data in association with each other using the defect repair data and a repair result.Type: ApplicationFiled: February 26, 2021Publication date: May 2, 2024Applicant: TECHNOLOGY RESEARCH ASSOCIATION FOR FUTURE ADDITIVE MANUFACTURINGInventors: Kenta AOYAGI, Akihiko CHIBA, Hideki KYOGOKU, Shin-ichi KITAMURA, Michiaki HASHITANI
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Publication number: 20240134343Abstract: An information processing apparatus for controlling additive manufacturing of a powder bed method includes an acquirer that acquires roughness data indicating a roughness of a manufacturing surface after melting, and defect determiner that divides the manufacturing surface into small regions each having a predetermined size, and compares the roughness data with a predetermined threshold for each small region, thereby determining whether a defect exists in the small region. If an unmolten region is included in the small region, the defect determiner replaces data of the manufacturing surface in the unmolten region using data of the manufacturing surface in the small region, and determines whether a defect exists in the small region including the unmolten region. Also, the manufacturing defect detection method further includes a defect repair instructor that instructs remelting of a region that is determined by the defect determiner to have a defect.Type: ApplicationFiled: February 26, 2021Publication date: April 25, 2024Applicant: TECHNOLOGY RESEARCH ASSOCIATION FOR FUTURE ADDITIVE MANUFACTURINGInventors: Kenta AOYAGI, Akihiko CHIBA
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Publication number: 20240074214Abstract: A semiconductor memory device includes a plurality of transistors arranged in a first direction, and arranged in a second direction and a first wiring layer disposed between a semiconductor substrate and a plurality of voltage supply wirings. Each of the plurality of transistors includes a source region and a drain region. The first wiring layer includes a plurality of first connecting portions disposed at positions overlapping with the plurality of source regions when viewed in a third direction and electrically connected to the plurality of source regions and the plurality of voltage supply wirings, a plurality of second connecting portions disposed at positions overlapping with the plurality of source regions when viewed in the third direction and electrically connected to a plurality of the drain regions and a plurality of conductive layers, and a passing wiring region disposed between a pair of the second connecting portions.Type: ApplicationFiled: August 25, 2023Publication date: February 29, 2024Applicant: KIOXIA CORPORATIONInventors: Nobuaki OKADA, Akihiko CHIBA, Kenichi MATOBA, Haruna SUGIURA
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Publication number: 20240029797Abstract: A semiconductor storage device includes a first semiconductor substrate, a second semiconductor substrate, a first memory cell and a second memory cell provided between the first semiconductor substrate and the second semiconductor substrate, a first word line electrically connected to the first memory cell, a second word line electrically connected to the second memory cell, a first transistor that is provided on the first semiconductor substrate and electrically connected between the first word line and a first wiring through which a voltage is applied to the first word line, and a second transistor that is provided on the semiconductor substrate and electrically connected between the second word line and a second wiring through which a voltage is applied to the second word line.Type: ApplicationFiled: October 3, 2023Publication date: January 25, 2024Inventors: Hiroyuki TAKENAKA, Akihiko CHIBA, Teppei HIGASHITSUJI, Kiyofumi SAKURAI, Hiroaki NAKASA, Youichi MAGOME
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Patent number: 11872647Abstract: A production method of an additive manufactured object is provided. The method is an EB-based additive manufacturing method of spreading a pure copper powder, preheating the pure copper powder and thereafter partially melting the pure copper powder by scanning the pure copper powder with an electron beam, solidifying the pure copper powder to form a first layer, newly spreading a pure copper powder on the first layer, preheating the pure copper powder and thereafter partially melting the pure copper powder by scanning the pure copper powder with an electron beam, solidifying the pure copper powder to form a second layer, and repeating the foregoing process to add layers. The pure copper powder is a pure copper powder with a Si coating formed thereon, and the preheating temperature is set to be 400° C. or higher and less than 800° C.Type: GrantFiled: December 26, 2019Date of Patent: January 16, 2024Assignee: JX METALS CORPORATIONInventors: Hirofumi Watanabe, Hiroyoshi Yamamoto, Yoshitaka Shibuya, Kenji Sato, Satoru Morioka, Akihiko Chiba, Kenta Aoyagi
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Patent number: 11810620Abstract: A semiconductor storage device includes a first semiconductor substrate, a second semiconductor substrate, a first memory cell and a second memory cell provided between the first semiconductor substrate and the second semiconductor substrate, a first word line electrically connected to the first memory cell, a second word line electrically connected to the second memory cell, a first transistor that is provided on the first semiconductor substrate and electrically connected between the first word line and a first wiring through which a voltage is applied to the first word line, and a second transistor that is provided on the semiconductor substrate and electrically connected between the second word line and a second wiring through which a voltage is applied to the second word line.Type: GrantFiled: August 26, 2021Date of Patent: November 7, 2023Assignee: Kioxia CorporationInventors: Hiroyuki Takenaka, Akihiko Chiba, Teppei Higashitsuji, Kiyofumi Sakurai, Hiroaki Nakasa, Youichi Magome
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Publication number: 20230175101Abstract: A method for producing a TiAl alloy member includes a molding step (S10) of laminating a solidified body obtained by melting and solidifying or sintering powder of a TiAl alloy by irradiation of the powder with a beam, to mold a laminated body; and a heat treatment step (S12) of heating the laminated body at a setting temperature that is equal to or higher than a temperature at which a phase transformation to an ? phase is initiated, to produce a TiAl alloy member. By the method for producing a TiAl alloy member, the TiAl alloy member can be easily molded with a decrease in high temperature properties suppressed.Type: ApplicationFiled: May 23, 2019Publication date: June 8, 2023Applicants: MITSUBISHI HEAVY INDUSTRIES ENGINE & TURBOCHARGER, LTD., TOHOKU UNIVERSITYInventors: Keisuke SHINZAWA, Atsushi TAKITA, Akihiko CHIBA
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Publication number: 20230143183Abstract: An object of the present invention is to provide an additive manufactured object which is free of solidification cracking due to, e.g., heat shrinkage during additive manufacturing of an aluminum alloy; which is free of anisotropy in strength, and has high strength and ductility. An aluminum alloy powder for additive manufacturing includes aluminum alloy particles in which not less than 0.01% by mass and not more than 1% by mass of a grain refiner is trapped. This grain refiner is at least one selected from the borides and carbides of group 4 elements.Type: ApplicationFiled: March 22, 2021Publication date: May 11, 2023Inventors: Yoshiki HASHIZUME, Isao MURAKAMI, Kenta ISHIGAMI, Sotaro AKIYAMA, Akihiko CHIBA, Kenta AOYAGI
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Patent number: 11626394Abstract: A semiconductor storage device includes a first semiconductor chip having a first bonding surface; and a second semiconductor chip having a second bonding surface, the second bonding surface being bonded to the first bonding surface. The first semiconductor chip includes a control circuit, a first power line connected to the control circuit and extending in a first direction, and a first pad electrode disposed on the first bonding surface. The second semiconductor chip includes a second power line extending in a second direction, a third power line connected to the second power line and extending in the first direction, a second pad electrode connected to the third power line, and a third pad electrode disposed on the second bonding surface.Type: GrantFiled: February 25, 2021Date of Patent: April 11, 2023Assignee: KIOXIA CORPORATIONInventors: Akihiko Chiba, Takahiro Tsurudo, Kenichi Matoba, Yoshifumi Shimamura, Hiroaki Nakasa, Hiroyuki Takenaka
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Publication number: 20220246196Abstract: A semiconductor storage device includes a first semiconductor substrate, a second semiconductor substrate, a first memory cell and a second memory cell provided between the first semiconductor substrate and the second semiconductor substrate, a first word line electrically connected to the first memory cell, a second word line electrically connected to the second memory cell, a first transistor that is provided on the first semiconductor substrate and electrically connected between the first word line and a first wiring through which a voltage is applied to the first word line, and a second transistor that is provided on the semiconductor substrate and electrically connected between the second word line and a second wiring through which a voltage is applied to the second word line.Type: ApplicationFiled: August 26, 2021Publication date: August 4, 2022Inventors: Hiroyuki TAKENAKA, Akihiko CHIBA, Teppei HIGASHITSUJI, Kiyofumi SAKURAI, Hiroaki NAKASA, Youichi MAGOME
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Publication number: 20220226900Abstract: Provided is a laminated body molding method for molding a laminated body by irradiating powder fed onto a stage with a beam and thereby fusing and solidifying the powder or sintering the powder. The laminated body molding method includes: a moving distance setting step S22 of setting a moving distance of the stage to a length that is a certain proportion of a particle diameter of the powder; and a molding step S24 of molding the laminated body by repeating a process of moving the stage downward by the moving distance, feeding the powder onto the stage thus moved, and irradiating the fed powder with the beam to fuse and solidify the powder or sinter the powder. With this laminated body molding method, impairment of capabilities of the laminated body can be prevented.Type: ApplicationFiled: May 23, 2019Publication date: July 21, 2022Applicants: MITSUBISHI HEAVY INDUSTRIES ENGINE & TURBOCHARGER, LTD., TOHOKU UNIVERSITYInventors: Keisuke SHINZAWA, Atsushi TAKITA, Akihiko CHIBA
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Publication number: 20220127698Abstract: A titanium alloy additive manufacturing product contains 5.50 to 6.75 wt % of Al, 3.50 to 4.50 wt % of V, 0.20 wt % or less of 0, 0.40 wt % or less of Fe, 0.015 wt % or less of H, 0.08 wt % or less of C, 0.05 wt % or less of N, and inevitable impurities, in which a pore content is 0.05 number/mm2 or less, and a tensile strength is 855 MPa or more.Type: ApplicationFiled: January 31, 2020Publication date: April 28, 2022Applicants: TOHOKU UNIVERSITY, JAMPT CORPORATIONInventors: Akihiko CHIBA, Noritaka YASUDA
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Publication number: 20220077128Abstract: A semiconductor storage device includes a first semiconductor chip having a first bonding surface; and a second semiconductor chip having a second bonding surface, the second bonding surface being bonded to the first bonding surface. The first semiconductor chip includes a control circuit, a first power line connected to the control circuit and extending in a first direction, and a first pad electrode disposed on the first bonding surface. The second semiconductor chip includes a second power line extending in a second direction, a third power line connected to the second power line and extending in the first direction, a second pad electrode connected to the third power line, and a third pad electrode disposed on the second bonding surface.Type: ApplicationFiled: February 25, 2021Publication date: March 10, 2022Applicant: Kioxia CorporationInventors: Akihiko CHIBA, Takahiro TSURUDO, Kenichi MATOBA, Yoshifumi SHIMAMURA, Hiroaki NAKASA, Hiroyuki TAKENAKA
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Publication number: 20210346954Abstract: This invention provides, by simple mechanical treatment, a metal powder that generates no smoke phenomenon when laminating and shaping a metal object even when decreasing a preheating temperature. In the metal powder, a solidification structure including a dendritic structure on the surface of the metal powder has been flattened. The solidification structure including the dendritic structure has been flattened by mechanical treatment including collision treatment of the metal powder. The mechanical treatment is performed by heating the metal powder to 100° C. to 300° C. The metal powder is a metal powder that is heated to a predetermined temperature and whose capacitance component of a measured impedance becomes zero. This metal powder is a powder of a metal alloy produced by an atomization process or a plasma rotation electrode process. The metal alloy includes a nickel-based alloy, a cobalt-chrome alloy, an iron-based alloy, an aluminum alloy, and a titanium alloy.Type: ApplicationFiled: March 14, 2019Publication date: November 11, 2021Applicant: TECHNOLOGY RESEARCH ASSOCIATION FOR FUTURE ADDITIVE MANUFACTURINGInventors: Akihiko CHIBA, Takahiro KUDO, Youhei DAINO, Kenta AOYAGI
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Patent number: 11152037Abstract: A semiconductor memory device includes first and second wirings extending in a first direction and spaced apart from each other in the first direction, third wirings above the first and second wirings and extending in a second direction, fourth and fifth wirings above the third wirings, extending in the first direction, and spaced apart from each other in the second direction, a plurality of memory cells between each third wiring and each of first, second, fourth, and fifth wirings, voltage application circuits, connection conductors between the voltage application circuits and the wirings, and connection wirings that electrically connect the fourth and fifth wirings to the voltage application circuits. The voltage application circuits are arranged so that a non-selected voltage application circuit is under a space between the first and second wirings, and a selected voltage application circuit is under the first wiring.Type: GrantFiled: February 27, 2020Date of Patent: October 19, 2021Assignee: KIOXIA CORPORATIONInventors: Hiroyuki Hara, Hiroyuki Takenaka, Akihiko Chiba