Patents by Inventor Akihiko Sato

Akihiko Sato has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100326354
    Abstract: A substrate processing system includes a processing unit, a substrate loading unit, a substrate unloading unit, and a carrying unit. A carrying device has a constitution in which a suction portion suctioning and holding a substrate is rotatable about an arm portion provided in a base portion and the substrate is rotated in the state where the substrate is held by a holding portion. A coating device has a constitution in which a liquid material is ejected from a nozzle to both surfaces of the substrate rotating in an upright state.
    Type: Application
    Filed: September 8, 2010
    Publication date: December 30, 2010
    Applicant: TOKYO OHKA KOGYO CO., LTD.
    Inventors: Tsutomu SAHODA, Futoshi SHIMAI, Akihiko SATO
  • Publication number: 20100297352
    Abstract: A coating device includes a coating mechanism which includes nozzles for ejecting a liquid material onto front and rear surfaces of a substrate while rotating the substrate; and an adjusting mechanism which adjusts the coating state of the liquid material at the outer periphery of the substrate; wherein the adjusting mechanism includes a dip portion which dips the outer periphery of the substrate in a solution while rotating the substrate and dissolves; and a suction portion which suctions the vicinity of the outer periphery of the substrate after dipping in the solution.
    Type: Application
    Filed: May 10, 2010
    Publication date: November 25, 2010
    Applicant: TOKYO OHKA KOGYO CO., LTD.
    Inventors: Tsutomu SAHODA, Futoshi SHIMAI, Akihiko SATO
  • Publication number: 20100297353
    Abstract: A coating device includes a coating mechanism which includes nozzles for ejecting a liquid material onto front and rear surfaces of a substrate while rotating the substrate; and an adjusting mechanism which adjusts the coating state of the liquid material at the outer periphery of the substrate; wherein the adjusting mechanism includes a dip portion which dips the outer periphery of the substrate in a solution while rotating the substrate and dissolves and removes a thin film formed on the outer periphery of the substrate; and a suction portion which suctions the vicinity of the outer periphery of the substrate after dipping in the solution.
    Type: Application
    Filed: July 30, 2010
    Publication date: November 25, 2010
    Applicant: TOKYO OHKA KOGYO CO., LTD.
    Inventors: Tsutomu SAHODA, Futoshi SHIMAI, Akihiko SATO
  • Publication number: 20100289120
    Abstract: In a semiconductor device comprising a capacitive element, an area of the capacitive element is reduced without impairing performance, and further, without addition of an extra step in a manufacturing process.
    Type: Application
    Filed: July 26, 2010
    Publication date: November 18, 2010
    Inventor: AKIHIKO SATO
  • Patent number: 7745903
    Abstract: A technique is provided which permits formation within a single chip both a field effect transistor of high reliability capable of suppressing the occurrence of a crystal defect and a field effect transistor of a high integration degree. In a mask ROM section having an element isolation region with an isolation width of smaller than 0.3 ?m, a planar shape of each active region ACT is made polygonal by cutting off the corners of a quadrangle, thereby suppressing the occurrence of a crystal defect in the active region ACT and diminishing a leakage current flowing between the source and drain of a field effect transistor. In a sense amplifier data latch section which is required to have a layout of a small margin in the alignment between a gate G of a field effect transistor and the active region ACT, the field effect transistor is disposed at a narrow pitch by making the active region ACT quadrangular.
    Type: Grant
    Filed: July 15, 2009
    Date of Patent: June 29, 2010
    Assignee: Renesas Electronics Corp.
    Inventors: Tetsuo Adachi, Akihiko Sato
  • Publication number: 20100050940
    Abstract: A substrate processing system includes a processing unit, a substrate loading unit, a substrate unloading unit, and a carrying unit. A carrying device has a constitution in which a suction portion suctioning and holding a substrate is rotatable about an arm portion provided in a base portion and the substrate is rotated in the state where the substrate is held by a holding portion. A coating device has a constitution in which a liquid material is ejected from a nozzle to both surfaces of the substrate rotating in an upright state.
    Type: Application
    Filed: August 25, 2009
    Publication date: March 4, 2010
    Applicant: TOKYO OHKA KOGYO CO., LTD.
    Inventors: Tsutomu Sahoda, Futoshi Shimai, Akihiko Sato
  • Publication number: 20090319791
    Abstract: According to one embodiment, a copyright-protected chip includes a selector which connects a host controller to a circuit in the copyright-protected chip, a second register in which a encrypted content key, decryption key generation information, and shared classified information stored in a storage device are stored, and a communication circuit which communicates with the host controller and transmits the encrypted content key and the decryption key generation information stored in the register to the host controller when an access module accesses content obtained by decrypting the encrypted content stored in a hard disk.
    Type: Application
    Filed: May 20, 2009
    Publication date: December 24, 2009
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Toshihiro Aiyoshi, Akihiko Sato
  • Publication number: 20090273038
    Abstract: A technique is provided which permits formation within a single chip both a field effect transistor of high reliability capable of suppressing the occurrence of a crystal defect and a field effect transistor of a high integration degree. In a mask ROM section having an element isolation region with an isolation width of smaller than 0.3 ?m, a planar shape of each active region ACT is made polygonal by cutting off the corners of a quadrangle, thereby suppressing the occurrence of a crystal defect in the active region ACT and diminishing a leakage current flowing between the source and drain of a field effect transistor. In a sense amplifier data latch section which is required to have a layout of a small margin in the alignment between a gate G of a field effect transistor and the active region ACT, the field effect transistor is disposed at a narrow pitch by making the active region ACT quadrangular.
    Type: Application
    Filed: July 15, 2009
    Publication date: November 5, 2009
    Inventors: Tetsuo ADACHI, Akihiko SATO
  • Patent number: 7599632
    Abstract: An image forming apparatus configured to carry out development using a light toner and a dark toner having substantially the same hue, includes a pattern forming unit configured to form a pattern using a dark toner and a light toner, a pattern reading unit configured to read the density of the pattern formed on a sheet of recording paper after the pattern has been fixed, and a gradation correction unit configured to correct the gradation characteristics of image data for the light toner by changing the slope of the gradation characteristics with zero level as a base point. The changing of the slope is based on the density characteristics of the pattern read by the pattern reading unit and the ratio of the amounts of the light toner and the dark toner that have been used.
    Type: Grant
    Filed: November 6, 2008
    Date of Patent: October 6, 2009
    Assignee: Canon Kabushiki Kaisha
    Inventor: Akihiko Sato
  • Patent number: 7585745
    Abstract: A technique is provided which permits formation within a single chip both a field effect transistor of high reliability capable of suppressing the occurrence of a crystal defect and a field effect transistor of a high integration degree. In a mask ROM section having an element isolation region with an isolation width of smaller than 0.3 ?m, a planar shape of each active region ACT is made polygonal by cutting off the corners of a quadrangle, thereby suppressing the occurrence of a crystal defect in the active region ACT and diminishing a leakage current flowing between the source and drain of a field effect transistor. In a sense amplifier data latch section which is required to have a layout of a small margin in the alignment between a gate G of a field effect transistor and the active region ACT, the field effect transistor is disposed at a narrow pitch by making the active region ACT quadrangular.
    Type: Grant
    Filed: December 9, 2005
    Date of Patent: September 8, 2009
    Assignee: Renesas Technology Corp.
    Inventors: Tetsuo Adachi, Akihiko Sato
  • Publication number: 20090129803
    Abstract: An image forming apparatus configured to carry out development using a light toner and a dark toner having substantially the same hue, includes a pattern forming unit configured to form a pattern using a dark toner and a light toner, a pattern reading unit configured to read the density of the pattern formed on a sheet of recording paper after the pattern has been fixed, and a gradation correction unit configured to correct the gradation characteristics of image data for the light toner by changing the slope of the gradation characteristics with zero level as a base point. The changing of the slope is based on the density characteristics of the pattern read by the pattern reading unit and the ratio of the amounts of the light toner and the dark toner that have been used.
    Type: Application
    Filed: November 6, 2008
    Publication date: May 21, 2009
    Applicant: CANON KABUSHIKI KAISHA
    Inventor: Akihiko Sato
  • Publication number: 20090090948
    Abstract: In a semiconductor device comprising a capacitive element, an area of the capacitive element is reduced without impairing performance, and further, without addition of an extra step in a manufacturing process.
    Type: Application
    Filed: September 29, 2008
    Publication date: April 9, 2009
    Inventor: AKIHIKO SATO
  • Patent number: 7450866
    Abstract: An image forming apparatus configured to carry out development using a light toner and a dark toner having substantially the same hue, includes a pattern forming unit configured to form a pattern using a dark toner and a light toner, a pattern reading unit configured to read the density of the pattern formed on a sheet of recording paper after the pattern has been fixed, and a gradation correction unit configured to correct the gradation characteristics of image data for the light toner by changing the slope of the gradation characteristics with zero level as a base point. The changing of the slope is based on the density characteristics of the pattern read by the pattern reading unit and the ratio of the amounts of the light toner and the dark toner that have been used.
    Type: Grant
    Filed: December 2, 2005
    Date of Patent: November 11, 2008
    Assignee: Canon Kabushiki Kaisha
    Inventor: Akihiko Sato
  • Patent number: 7434905
    Abstract: An image forming apparatus that is capable of carrying out image formation on a recording medium such as plain paper without increasing the FCOT (First Copy Out Time) and is also capable of carrying out optimal image formation on a recording medium, such as thick paper, for which the processing speed is reduced with no registration misalignment between the leading ends of toner images and the leading end of the recording medium. An image is primarily transferred onto a rotatively driven image carrier, and the image on the image carrier is secondarily transferred onto a recording medium. An image writing reference position signal for starting image formation is issued based on the circumference of the image carrier which is the length of the image carrier in the direction of rotation thereof or based on a detected reference position on the image carrier.
    Type: Grant
    Filed: February 17, 2007
    Date of Patent: October 14, 2008
    Assignee: Canon Kabushiki Kaisha
    Inventors: Shigemichi Hamano, Hideyuki Nagata, Akihiko Sato, Toru Ono, Yushi Oka
  • Patent number: 7266315
    Abstract: An image forming apparatus reduces the wait time before completion of an image stabilization process executed for preparation for image formation while ensuring image quality. In the image forming apparatus, image formation is performed using developers having four colors respectively (yellow, magenta, cyan, and black). The image forming apparatus has a monochrome mode in which only black color is used, a full color mode in which four colors are used and an automatic color selection (ACS) mode in which one of the monochrome mode and the full color mode is selected by automatically recognizing image data and image formation is carried out in the selected mode. One of the monochrome mode, the full color mode, and the ACS mode is set to a default mode upon turning on the image forming apparatus. The image stabilization process is then executed based on the default mode.
    Type: Grant
    Filed: March 1, 2005
    Date of Patent: September 4, 2007
    Assignee: Canon Kabushiki Kaisha
    Inventor: Akihiko Sato
  • Publication number: 20070140750
    Abstract: An image forming apparatus that is capable of carrying out image formation on a recording medium such as plain paper without increasing the FCOT (First Copy Out Time) and is also capable of carrying out optimal image formation on a recording medium, such as thick paper, for which the processing speed is reduced with no registration misalignment between the leading ends of toner images and the leading end of the recording medium. An image is primarily transferred onto a rotatively driven image carrier, and the image on the image carrier is secondarily transferred onto a recording medium. An image writing reference position signal for starting image formation is issued based on the circumference of the image carrier which is the length of the image carrier in the direction of rotation thereof or based on a detected reference position on the image carrier.
    Type: Application
    Filed: February 17, 2007
    Publication date: June 21, 2007
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Shigemichi HAMANO, Hideyuki NAGATA, Akihiko SATO, Toru ONO, Yushi OKA
  • Patent number: 7209159
    Abstract: An image forming apparatus that is capable of carrying out image formation on a recording medium such as plain paper without increasing the FCOT (First Copy Out Time) and is also capable of carrying out optimal image formation on a recording medium, such as thick paper, for which the processing speed is reduced with no registration misalignment between the leading ends of toner images and the leading end of the recording medium. An image is primarily transferred onto a rotatively driven image carrier, and the image on the image carrier is secondarily transferred onto a recording medium. An image writing reference position signal for starting image formation is issued based on the circumference of the image carrier which is the length of the image carrier in the direction of rotation thereof or based on a detected reference position on the image carrier.
    Type: Grant
    Filed: February 9, 2004
    Date of Patent: April 24, 2007
    Assignee: Canon Kabushiki Kaisha
    Inventors: Shigemichi Hamano, Hideyuki Nagata, Akihiko Sato, Toru Ono, Yushi Oka
  • Publication number: 20070034937
    Abstract: A method of manufacturing a semiconductor device comprises forming a side wall spacer on side walls of an auxiliary gate in such a way that a CVD method using dichlorosilane as a staring material is carried out for deposition of a so-called high temperature oxide film (HTO film) at a high temperature of approximately 800° C. After the film formation, the film is post-annealed at temperatures higher than the film-forming temperature. In this way, the resulting side wall spacer becomes more dense than a silicon oxide film constituting part of a cap insulating film. Moreover, processing (double etching) of a control gate and a floating gate is performed by anisotropic dry etching and wet etching. Thus, the shape failure of the floating gate can be prevented, thereby preventing decrease in reliability and production yield.
    Type: Application
    Filed: July 26, 2006
    Publication date: February 15, 2007
    Inventor: Akihiko Sato
  • Patent number: 7098201
    Abstract: A compound of the formula (I): wherein X is hydroxy, protected hydroxy or optionally substituted amino; Y is —COORA wherein RA is hydrogen or ester residue, —CONRBRC wherein RB and RC each is independently hydrogen or amide residue, optionally substituted aryl or optionally substituted heteroaryl; and A1 is optionally substituted heteroaryl; provided that a compound wherein Y and/or A1 is optionally substituted indol-3-yl is excluded, a tautomer, a prodrug, a pharmaceutically acceptable salt or a hydrate thereof has an inhibitory activity against an integrase.
    Type: Grant
    Filed: June 18, 2003
    Date of Patent: August 29, 2006
    Assignee: Shionogi & Co., Ltd.
    Inventors: Toshio Fujishita, Tomokazu Yoshinaga, Akihiko Sato
  • Patent number: 7095965
    Abstract: When a plurality of toner containers mounted on a developing rotary unit are simultaneously determined as toner-absent toner containers, toner container replacement may not be efficient because toner containers are replaced at a replacement position. Therefore, when the toner containers mounted on the developing rotary unit are simultaneously determined as toner-absent toner containers, a toner container to be preferentially replaced is selected so as to be able to be placed at a replacement position by considering the usability of the toner containers.
    Type: Grant
    Filed: March 8, 2004
    Date of Patent: August 22, 2006
    Assignee: Canon Kabushiki Kaisha
    Inventors: Shigemichi Hamano, Akihiko Sato, Shinichi Takata, Toru Ono, Yushi Oka