Patents by Inventor Akihiro HANADA

Akihiro HANADA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180286890
    Abstract: The purpose of the invention is to improve reliability of the TFT of the oxide semiconductor. The invention is characterized as follows. A display device comprising: a substrate including a display area where plural pixels are formed, the pixel includes a first TFT of a first oxide semiconductor; a first gate insulating film is formed on the first oxide semiconductor, a gate electrode is formed on the first gate insulating film, an interlayer insulating film is formed over the gate electrode; the gate insulating film includes a first silicon oxide film, the gate electrode includes a first gate layer made of a second oxide semiconductor and a second gate layer made of metal or alloy; the interlayer insulating film has a first interlayer insulating film including a second silicon oxide film, and a second interlayer insulating film including a first aluminum oxide film on the first interlayer insulating film.
    Type: Application
    Filed: March 16, 2018
    Publication date: October 4, 2018
    Applicant: Japan Display Inc.
    Inventors: Isao Suzumura, Yohei Yamaguchi, Hajime Watakabe, Akihiro Hanada, Hirokazu Watanabe, Marina Shiokawa
  • Publication number: 20180122835
    Abstract: A display device comprising: a first TFT using silicon (Si) and a second TFT using oxide semiconductor are formed on a substrate, a distance between the silicon (Si) and the substrate is smaller than a distance between the oxide semiconductor and the substrate, a drain source electrode of the first TFT connects with the silicon (Si) via a first through hole, a drain source electrode of the second TFT connects with the oxide semiconductor via a second through hole, metal films are made on the oxide semiconductor sandwiching a channel of the oxide semiconductor in a plan view, the channel has a channel width, an ALO layer is formed on the metal films and the oxide semiconductor, the second source drain electrode and the metal films are connected via the second through hole formed in the AlO layer.
    Type: Application
    Filed: October 3, 2017
    Publication date: May 3, 2018
    Inventors: Hajime WATAKABE, Isao SUZUMURA, Hirokazu WATANABE, Akihiro HANADA
  • Patent number: 9947795
    Abstract: According to one embodiment, a thin-film transistor includes a first insulating film, an oxide semiconductor layer provided on the first insulating film and a second insulating film provided on the oxide semiconductor layer, and at least one of the first insulating film and the second insulating film includes a first region in contact with the oxide semiconductor layer and a second region further distant from the oxide semiconductor layer than the first region, and the second region has an argon concentration higher than that of the first region.
    Type: Grant
    Filed: December 22, 2016
    Date of Patent: April 17, 2018
    Assignee: Japan Display Inc.
    Inventors: Hajime Watakabe, Tomoyuki Ariyoshi, Akihiro Hanada
  • Publication number: 20180083076
    Abstract: The purpose of the present invention is to form both LTPS TFT and semiconductor TFT in a same substrate. The feature of the display device to realize the above purpose is that: a display device having a display area containing a pixel comprising: the pixel includes a first TFT having an oxide semiconductor, a gate insulating film is formed on the oxide semiconductor, a first gate electrode is formed on the gate insulating film, a first source/drain electrode formed by a metal or an alloy contacts a source or a drain of the semiconductor the first gate electrode and the first source/drain electrode are formed by the same material.
    Type: Application
    Filed: August 25, 2017
    Publication date: March 22, 2018
    Inventor: Akihiro HANADA
  • Publication number: 20180076239
    Abstract: The purpose of the present invention is to form both LTPS TFT and Ply-Si TFT on a same substrate. The feature of the display device to realize the above purpose is that: a display device comprising: a substrate including a first TFT having an oxide semiconductor layer and a second TFT having a Poly-Si layer, an undercoat is formed on the substrate, the oxide semiconductor layer is formed on or above the undercoat, a first interlayer insulating film is formed on or above the oxide semiconductor layer, the Poly-Si layer is formed on or above the first interlayer insulating film.
    Type: Application
    Filed: August 16, 2017
    Publication date: March 15, 2018
    Inventors: Isao SUZUMURA, Hajime Watakabe, Akihiro Hanada, Hirokazu Watanabe
  • Patent number: 9911859
    Abstract: According to one embodiment, a thin-film transistor and a method of manufacturing the same achieve size reduction of the thin-film transistor while using an oxide semiconductor layer. The oxide semiconductor layer includes a channel region, a source region, and a drain region. A gate electrode is arranged at a position spaced from the channel region of the oxide semiconductor layer so as to face the channel region. A source electrode is electrically connected to the source region of the oxide semiconductor layer. A drain electrode is electrically connected to the drain region of the oxide semiconductor layer. An undercoat layer adjoins the source region and the drain region of the oxide semiconductor layer. A hydrogen blocking layer has a hydrogen concentration lower than that in the undercoat layer and separates the undercoat layer and the channel region of the oxide semiconductor layer.
    Type: Grant
    Filed: November 18, 2015
    Date of Patent: March 6, 2018
    Assignee: Japan Display Inc.
    Inventors: Hajime Watakabe, Arichika Ishida, Takashi Okada, Masayoshi Fuchi, Akihiro Hanada
  • Publication number: 20170365624
    Abstract: A semiconductor device includes a oxide semiconductor layer, a gate electrode arranged above the oxide semiconductor layer, a gate insulation layer between the oxide semiconductor layer and the gate electrode, a first insulation layer arranged above the oxide semiconductor layer and arranged with a first aperture part, wiring including an aluminum layer arranged above the first insulation layer, the wiring being electrically connected to the oxide semiconductor layer via the first aperture part, a barrier layer including aluminum oxide above the first insulation layer, above the wiring and covering a side surface of the wiring, and an organic insulation layer arranged above the barrier layer.
    Type: Application
    Filed: June 12, 2017
    Publication date: December 21, 2017
    Inventors: Toshinari Sasaki, Hajime Watakabe, Akihiro Hanada, Marina Shiokawa
  • Publication number: 20170358606
    Abstract: According to one embodiment, a semiconductor device includes an insulating substrate, a first semiconductor layer located above the insulating substrate, a second semiconductor layer located above the insulating substrate, an insulating layer which covers the first semiconductor layer and the second semiconductor layer, and includes a first contact hole reaching the first semiconductor layer and a second contact hole reaching the second semiconductor layer, a barrier layer which covers one of the first semiconductor layer inside the first contact hole and the second semiconductor layer inside the second contact hole, and a first conductive layer which is in contact with the barrier layer.
    Type: Application
    Filed: June 8, 2017
    Publication date: December 14, 2017
    Applicant: Japan Display Inc.
    Inventors: Akihiro HANADA, Masayoshi FUCHI
  • Patent number: 9780227
    Abstract: According to one embodiment, a thin-film transistor and a method of manufacturing the thin-film transistor provided herein achieve enhanced reliability by preventing a disconnection in a gate insulating film at a position corresponding to an end surface of an oxide semiconductor layer. The oxide semiconductor layer includes a channel region, a source region, and a drain region. The channel region is placed between the source region and the drain region. The gate insulating film covers the oxide semiconductor layer in a range from at least a part of an upper surface to an end surface continuous with the upper surface of the oxide semiconductor layer. The oxide semiconductor layer is formed so as to have an oxygen concentration that becomes lower from a top side to a bottom side and the end surface is inclined so as to diverge from the top side to the bottom side.
    Type: Grant
    Filed: November 18, 2015
    Date of Patent: October 3, 2017
    Assignee: Japan Display Inc.
    Inventors: Akihiro Hanada, Masayoshi Fuchi, Hajime Watakabe, Takashi Okada, Arichika Ishida
  • Publication number: 20170207245
    Abstract: According to one embodiment, a semiconductor device includes an insulating substrate, a first semiconductor layer formed of silicon and positioned above the insulating substrate, a second semiconductor layer formed of a metal oxide and positioned above the first semiconductor layer, a first insulating film formed of a silicon nitride and positioned between the first semiconductor layer and the second semiconductor layer, and a block layer positioned between the first semiconductor film and the second semiconductor layer, the block layer hydrogen diffusion of which is lower than that of the first insulating film.
    Type: Application
    Filed: January 13, 2017
    Publication date: July 20, 2017
    Applicant: Japan Display Inc.
    Inventors: Akihiro HANADA, Hajime WATAKABE, Kazufumi WATABE
  • Publication number: 20170200829
    Abstract: According to one embodiment, a thin-film transistor includes a first insulating film, an oxide semiconductor layer provided on the first insulating film and a second insulating film provided on the oxide semiconductor layer, and at least one of the first insulating film and the second insulating film includes a first region in contact with the oxide semiconductor layer and a second region further distant from the oxide semiconductor layer than the first region, and the second region has an argon concentration higher than that of the first region.
    Type: Application
    Filed: December 22, 2016
    Publication date: July 13, 2017
    Applicant: Japan Display Inc.
    Inventors: Hajime WATAKABE, Tomoyuki ARIYOSHI, Akihiro HANADA
  • Publication number: 20170162715
    Abstract: According to one embodiment, a method of manufacturing a thin film transistor, includes forming an island-like first insulating layer containing oxygen above an insulating substrate, forming an oxide semiconductor layer above the insulating substrate and the first insulating layer and in contact with the first insulating layer, and performing heat treatment to supply oxygen from the first insulating layer to an overlapping area of the oxide semiconductor layer, which is overlaid on the first insulating layer.
    Type: Application
    Filed: December 7, 2016
    Publication date: June 8, 2017
    Applicant: Japan Display Inc.
    Inventors: Takashi OKADA, Masayoshi FUCHI, Hajime WATAKABE, Akihiro HANADA
  • Publication number: 20160149046
    Abstract: According to one embodiment, a thin-film transistor and a method of manufacturing the thin-film transistor provided herein achieve enhanced reliability by preventing a disconnection in a gate insulating film at a position corresponding to an end surface of an oxide semiconductor layer. The oxide semiconductor layer includes a channel region, a source region, and a drain region. The channel region is placed between the source region and the drain region. The gate insulating film covers the oxide semiconductor layer in a range from at least a part of an upper surface to an end surface continuous with the upper surface of the oxide semiconductor layer. The oxide semiconductor layer is formed so as to have an oxygen concentration that becomes lower from a top side to a bottom side and the end surface is inclined so as to diverge from the top side to the bottom side.
    Type: Application
    Filed: November 18, 2015
    Publication date: May 26, 2016
    Applicant: Japan Display Inc.
    Inventors: Akihiro HANADA, Masayoshi Fuchi, Hajime Watakabe, Takashi Okada, Arichika Ishiba
  • Publication number: 20160149047
    Abstract: According to one embodiment, a thin-film transistor and a method of manufacturing the same achieve size reduction of the thin-film transistor while using an oxide semiconductor layer. The oxide semiconductor layer includes a channel region, a source region, and a drain region. A gate electrode is arranged at a position spaced from the channel region of the oxide semiconductor layer so as to face the channel region. A source electrode is electrically connected to the source region of the oxide semiconductor layer. A drain electrode is electrically connected to the drain region of the oxide semiconductor layer. An undercoat layer adjoins the source region and the drain region of the oxide semiconductor layer. A hydrogen blocking layer has a hydrogen concentration lower than that in the undercoat layer and separates the undercoat layer and the channel region of the oxide semiconductor layer.
    Type: Application
    Filed: November 18, 2015
    Publication date: May 26, 2016
    Applicant: Japan Display Inc.
    Inventors: Hajime Watakabe, Arichika Ishida, Takashi Okada, Masayoshi Fuchi, Akihiro Hanada