Patents by Inventor Akihiro Motoki

Akihiro Motoki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170222117
    Abstract: A monolithic ceramic electronic component includes a ceramic body including a stack of ceramic layers. Inner electrodes are disposed within the ceramic body and include exposed portions at the end surfaces of the ceramic body. A pair of outer electrodes is arranged on the end surfaces of the ceramic body so as to extend from the end surfaces to the main surfaces and side surfaces of the ceramic body. Each of the outer electrodes includes a lower electrode layer provided on the ceramic body, an intermediate electrode layer located on the lower electrode layer and defined by a plated Ni layer, and an upper electrode layer located on the intermediate electrode layer and defined by a plated Pd layer. A thickness of the intermediate electrode layer on the main surfaces and the side surfaces of the ceramic body is larger than a thickness of the intermediate electrode layer on the end surfaces of the ceramic body.
    Type: Application
    Filed: April 18, 2017
    Publication date: August 3, 2017
    Inventors: Seiji KATSUTA, Yasuaki KAINUMA, Tatsuya NAGAOKA, Akihiro MOTOKI, Satoshi KODAMA
  • Patent number: 9704649
    Abstract: In order to prevent the ingress of moisture into a void section of a component main body of a ceramic electronic component, at least the component main body of the ceramic electronic component is provided with water repellency using a water repellent agent. The water repellent agent is dissolved in a supercritical fluid such as, a supercritical CO2 fluid, as a solvent to provide at least the component main body with water repellency. After providing the water repellency, the water repellent agent on the outer surface of the component main body is removed. As the water repellent agent, a silane coupling agent may be used.
    Type: Grant
    Filed: May 12, 2011
    Date of Patent: July 11, 2017
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Junichi Saito, Toshihiko Kobayashi, Makoto Ogawa, Akihiro Motoki, Kenichi Kawasaki, Tatsuo Kunishi
  • Patent number: 9659689
    Abstract: A monolithic ceramic electronic component includes a ceramic body including a stack of ceramic layers. Inner electrodes are disposed within the ceramic body and include exposed portions at the end surfaces of the ceramic body. A pair of outer electrodes is arranged on the end surfaces of the ceramic body so as to extend from the end surfaces to the main surfaces and side surfaces of the ceramic body. Each of the outer electrodes includes a lower electrode layer provided on the ceramic body, an intermediate electrode layer located on the lower electrode layer and defined by a plated Ni layer, and an upper electrode layer located on the intermediate electrode layer and defined by a plated Pd layer. A thickness of the intermediate electrode layer on the main surfaces and the side surfaces of the ceramic body is larger than a thickness of the intermediate electrode layer on the end surfaces of the ceramic body.
    Type: Grant
    Filed: June 23, 2014
    Date of Patent: May 23, 2017
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Seiji Katsuta, Yasuaki Kainuma, Tatsuya Nagaoka, Akihiro Motoki, Satoshi Kodama
  • Patent number: 9607763
    Abstract: A monolithic ceramic electronic component includes a component body and outer electrodes. The component body includes a plurality of stacked ceramic layers and a plurality of inner electrodes which extend between the ceramic layers, which contain Ni, and which include exposed ends exposed on predetermined surfaces of the component body. The outer electrodes are electrically connected to the exposed ends of the inner electrodes and are formed on the predetermined surfaces of the component body by plating. The inner electrodes include Mg—Ni coexistence regions where Mg and Ni coexist.
    Type: Grant
    Filed: January 22, 2014
    Date of Patent: March 28, 2017
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Takehisa Sasabayashi, Akihiro Motoki, Makoto Ogawa
  • Patent number: 9536643
    Abstract: A method for manufacturing a multilayer electronic component includes the steps of preparing a laminate including a plurality of laminated insulating layers and a plurality of internal electrodes disposed along interfaces between the insulating layers, edges of the internal electrodes being exposed at a predetermined surface of the laminate, and forming an external electrode on the predetermined surface to electrically connect exposed the edges of the internal electrodes. The step of forming an external electrode includes a plating step of forming a continuous plating film by depositing plating deposits on the edges of the internal electrodes exposed at the predetermined surface and by performing plating growth to be connected to each other, and a heat treatment step of performing a heat treatment at an oxygen partial pressure of about 5 ppm or less and at a temperature of about 600° C. or more.
    Type: Grant
    Filed: February 11, 2014
    Date of Patent: January 3, 2017
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Akihiro Motoki, Makoto Ogawa, Kenichi Kawasaki, Shunsuke Takeuchi, Shigeyuki Kuroda
  • Patent number: 9536669
    Abstract: In a method of forming a plating layer for an external terminal electrode by applying, for example, copper plating to an end surface of a component main body with respective ends of internal electrodes exposed, and then applying a heat treatment at a temperature of about 1000° C. or more in order to improve the adhesion strength and moisture resistance of the external terminal electrode, the plating layer may be partially melted to decrease the bonding strength of the plating layer. In the step of applying a heat treatment at a temperature of about 1000° C. or more to a component main body with plating layers formed thereon, the average rate of temperature increase from room temperature to the temperature of about 1000° C. or more is set to about 100° C./minute or more. This average rate of temperature increase maintains a moderate eutectic state in the plating layer and ensures a sufficient bonding strength of the plating layer.
    Type: Grant
    Filed: July 22, 2015
    Date of Patent: January 3, 2017
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Akihiro Motoki, Syunsuke Takeuchi, Makoto Ogawa, Seiichi Nishihara, Kenichi Kawasaki, Shuji Matsumoto
  • Patent number: 9519516
    Abstract: The present invention addresses the problem of providing a migration system and a migration method by which a completion timing of a live migration of virtual machines can be adjusted. The migration system (1) comprises: a transfer means (61A) for transmitting memory data of the virtual machines from a transfer source physical host (31) to a transfer destination physical host (32) to synchronize data of the virtual machines on the physical host (31) and the virtual machines on the physical host (32); a determination means (51A) for determining, for each of the virtual machines, whether the data of the virtual machine (81A) on the transfer source physical host (31) is synchronized with the data of the virtual machine (81B); and a control means (10) for issuing an instruction of switching from the virtual machines on the physical host (31) to the virtual machines on the physical host (32), if the data of all the virtual machines is synchronized based on the determination result.
    Type: Grant
    Filed: July 5, 2013
    Date of Patent: December 13, 2016
    Assignee: NEC CORPORATION
    Inventor: Akihiro Motoki
  • Patent number: 9489224
    Abstract: A domain management apparatus instructs physical nodes about the configuration of virtual nodes and virtual links of virtual networks. The physical nodes assign a virtual machine to a virtual node based on the definition of the virtual node contained in an instruction from the domain management apparatus. The physical nodes write a configuration associating virtual interfaces in the virtual node definition with virtual NICs on the virtual machine into a configuration file of the operating system to be started up on the virtual machine before the start-up of the virtual machine and, then, start up the virtual machine. Therefore, it is possible to recognize the correspondence relation between the virtual interface in the virtual node definition and the virtual NIC in the virtual machine without referring to the virtual network assignment result and without waiting for the start-up of the virtual machine.
    Type: Grant
    Filed: October 4, 2011
    Date of Patent: November 8, 2016
    Assignee: NEC Corporation
    Inventor: Akihiro Motoki
  • Patent number: 9490066
    Abstract: In order to prevent the ingress of moisture into a void section of a component main body of a ceramic electronic component, at least the component main body of the ceramic electronic component is provided with water repellency using a water repellent agent. The water repellent agent is dissolved in a supercritical fluid such as, a supercritical CO2 fluid, as a solvent to provide at least the component main body with water repellency. After providing the water repellency, the water repellent agent on the outer surface of the component main body is removed. As the water repellent agent, a silane coupling agent may be used.
    Type: Grant
    Filed: January 25, 2013
    Date of Patent: November 8, 2016
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Junichi Saito, Toshihiko Kobayashi, Makoto Ogawa, Akihiro Motoki, Kenichi Kawasaki, Tatsuo Kunishi
  • Patent number: 9437365
    Abstract: An electronic component including an electronic component element with an external electrode, a Ni plating film on the external electrode, and a Sn plating film covering the Ni plating film. The Sn plating film has Sn—Ni alloy flakes therein, the Sn—Ni alloy flakes are present in the range from a surface of the Sn plating film on the Ni plating film to 50% or less of the thickness of the Sn plating film, and when Sn is removed from the Sn plating film to leave only the Sn—Ni alloy flakes, an observed planar view of a region occupied by the Sn—Ni alloy flakes falls within the range from 15% to 60% of the observed planar region.
    Type: Grant
    Filed: July 7, 2014
    Date of Patent: September 6, 2016
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Akira Saito, Makoto Ogawa, Akihiro Motoki
  • Patent number: 9418790
    Abstract: A multilayer ceramic electronic component including thin external terminal electrodes each having a superior bonding force to a ceramic base body is provided. In order to form the external terminal electrodes, after Cu plating films are deposited on exposed portions of internal electrodes by direct plating on a ceramic base body, a Cu liquid phase, an O2-containing liquid phase, and a Cu solid phase are generated between the Cu plating film and the ceramic base body by a heat treatment, so that Cu oxides are dispersed in the Cu plating film, at least near an interface with the ceramic base body. Since the Cu oxides function as an adhesive, a bonding force of the Cu plating film to the ceramic base body can be increased, and hence the external terminal electrode having a superior bonding force to the ceramic base body can be obtained.
    Type: Grant
    Filed: March 29, 2012
    Date of Patent: August 16, 2016
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Shunsuke Takeuchi, Kenichi Kawasaki, Akihiro Motoki, Makoto Ogawa, Shuji Matsumoto, Seiichi Nishihara
  • Publication number: 20160212850
    Abstract: An electronic component includes an electronic component body and an external electrode. The external electrode is disposed on the electronic component body. The external electrode includes a Pd plating layer and a Ni plating layer. The Pd plating layer defines an outermost layer. The Ni plating layer is disposed inside the Pd plating layer. The Ni plating layer is partly exposed from the Pd plating layer.
    Type: Application
    Filed: January 6, 2016
    Publication date: July 21, 2016
    Inventors: Yasuaki KAINUMA, Seiji KATSUTA, Akihiro MOTOKI
  • Patent number: 9343234
    Abstract: A monolithic ceramic electronic component includes an outer electrode including a first plating layer formed directly on a component body by electroless plating so as to cover an exposed portion distribution region including exposed portions of a plurality of inner electrodes and a second plating layer formed by electrolytic plating so as to cover the first plating layer. An amount of extension of the first plating E1 and an amount of extension of the second plating E2 satisfy the relationship E1/(E1+E2)?20%, where E1 represents a distance from an edge of the exposed portion distribution region to an edge of the first plating layer, and E2 represents a distance from the edge of the first plating layer to an edge of the second plating layer.
    Type: Grant
    Filed: March 28, 2014
    Date of Patent: May 17, 2016
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Takehisa Sasabayashi, Akihiro Motoki, Makoto Ogawa
  • Publication number: 20150325374
    Abstract: In a method of forming a plating layer for an external terminal electrode by applying, for example, copper plating to an end surface of a component main body with respective ends of internal electrodes exposed, and then applying a heat treatment at a temperature of about 1000° C. or more in order to improve the adhesion strength and moisture resistance of the external terminal electrode, the plating layer may be partially melted to decrease the bonding strength of the plating layer. In the step of applying a heat treatment at a temperature of about 1000° C. or more to a component main body with plating layers formed thereon, the average rate of temperature increase from room temperature to the temperature of about 1000° C. or more is set to about 100° C./minute or more. This average rate of temperature increase maintains a moderate eutectic state in the plating layer and ensures a sufficient bonding strength of the plating layer.
    Type: Application
    Filed: July 22, 2015
    Publication date: November 12, 2015
    Inventors: Akihiro MOTOKI, Syunsuke TAKEUCHI, Makoto OGAWA, Seiichi NISHIHARA, Kenichi KAWASAKI, Shuji MATSUMOTO
  • Patent number: 9171671
    Abstract: In a method of manufacturing a laminate type electronic component, while the distance between adjacent exposed ends of a plurality of internal electrodes is adjusted preferably to be about 50 ?m or less, a plurality of conductive particles composed of Pd, Pt, Cu, Au, or Ag are provided on the surface of a component main body. The conductive particles have an average particle size of about 0.1 nm to about 100 nm, which are distributed in island-shaped configurations over the entire surface of the component main body, while the average distance between the respective conductive particles is adjusted to fall within the range of about 10 nm to about 100 nm. The component main body is subjected to electrolytic plating such that plating growth develops in and around a region including the respective exposed ends of the plurality of internal electrodes.
    Type: Grant
    Filed: December 9, 2011
    Date of Patent: October 27, 2015
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Akihiro Motoki, Makoto Ogawa
  • Patent number: 9165714
    Abstract: An electronic component, preferably in the form of a laminated ceramic capacitor, which suppresses the growth of whiskers and has excellent solderability, includes an electronic component element in the shape of, for example, a rectangular parallelepiped. External electrodes of terminal electrodes are located on first and second end surfaces of the electronic component element. First plated films including plated Ni are located on the surfaces of the external electrodes. Second plated films are located on the surfaces of the first plated films. The second plated films have stacked structures including first plated layers and second plated layers. The second plated layers have lower degrees of densification than the first plated layers.
    Type: Grant
    Filed: May 24, 2012
    Date of Patent: October 20, 2015
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Makoto Ogawa, Akihiro Motoki, Atsuko Saito, Kenji Masuko, Toshinobu Fujiwara
  • Patent number: 9147525
    Abstract: A multilayer coil component is provided to have high reliability and in which internal stress arising from the difference in firing shrinkage behavior and/or thermal expansion coefficient between ferrite layers and internal conductor layers is alleviated without forming conventional voids between the ferrite layers and the internal conductor layers. A method of manufacturing a multilayer coil includes a step of isolating interfaces between internal conductors and surrounding ferrite by allowing a complexing agent solution to reach interfaces between the internal conductors and the surrounding ferrite through side gap portions from side surfaces of a ferrite element including a helical coil. The complexing agent solution contains at least one selected from the group consisting of an aminocarboxylic acid, a salt of the aminocarboxylic acid, an oxycarboxylic acid, a salt of the oxycarboxylic acid, an amine, phosphoric acid, a salt of phosphoric acid, and a lactone compound.
    Type: Grant
    Filed: February 25, 2013
    Date of Patent: September 29, 2015
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Mitsuru Odahara, Akihiro Motoki, Akihiro Ono
  • Patent number: 9123469
    Abstract: In a method of forming a plating layer for an external terminal electrode by applying, for example, copper plating to an end surface of a component main body with respective ends of internal electrodes exposed, and then applying a heat treatment at a temperature of about 1000° C. or more in order to improve the adhesion strength and moisture resistance of the external terminal electrode, the plating layer may be partially melted to decrease the bonding strength of the plating layer. In the step of applying a heat treatment at a temperature of about 1000° C. or more to a component main body with plating layers formed thereon, the average rate of temperature increase from room temperature to the temperature of about 1000° C. or more is set to about 100° C./minute or more. This average rate of temperature increase maintains a moderate eutectic state in the plating layer and ensures a sufficient bonding strength of the plating layer.
    Type: Grant
    Filed: March 18, 2011
    Date of Patent: September 1, 2015
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Akihiro Motoki, Syunsuke Takeuchi, Makoto Ogawa, Seiichi Nishihara, Kenichi Kawasaki, Shuji Matsumoto
  • Patent number: 9111690
    Abstract: A method is used to manufacture a multilayer electronic component including a multilayer composite including internal electrodes having ends that are exposed at a predetermined surface of the multilayer composite. In the method, the exposed ends of the internal electrodes are coated with a metal film primarily composed of at least one metal selected from the group consisting of Pd, Au, Pt and Ag and having a thickness of at least about 0.1 ?m by immersing the multilayer composite in a liquid containing a metal ion or a metal complex. Then, a continuous plating layer is formed by depositing a plating metal on the ends of the internal electrodes exposed at the predetermined surface of the multilayer composite, and subsequently growing the deposits of the plating metal so as to be connected to each other. Thus, exposed ends of the internal electrodes are electrically connected to each other.
    Type: Grant
    Filed: August 19, 2009
    Date of Patent: August 18, 2015
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Akihiro Motoki, Makoto Ogawa, Toshiyuki Iwanaga, Akihiro Yoshida, Takayuki Kayatani
  • Publication number: 20150205638
    Abstract: The present invention addresses the problem of providing a migration system and a migration method by which a completion timing of a live migration of virtual machines can be adjusted. The migration system (1) comprises: a transfer means (61A) for transmitting memory data of the virtual machines from a transfer source physical host (31) to a transfer destination physical host (32) to synchronize data of the virtual machines on the physical host (31) and the virtual machines on the physical host (32); a determination means (51A) for determining, for each of the virtual machines, whether the data of the virtual machine (81A) on the transfer source physical host (31) is synchronized with the data of the virtual machine (81B); and a control means (10) for issuing an instruction of switching from the virtual machines on the physical host (31) to the virtual machines on the physical host (32), if the data of all the virtual machines is synchronized based on the determination result.
    Type: Application
    Filed: July 5, 2013
    Publication date: July 23, 2015
    Inventor: Akihiro Motoki