Patents by Inventor Akihiro Tsuru

Akihiro Tsuru has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230197340
    Abstract: An electronic component includes a laminate in which a plurality of dielectric layers and a plurality of internal electrodes are alternately laminated and external electrodes electrically connected to the internal electrodes. A side margin portion as a region in which the plurality of internal electrodes is not provided when a section of the laminate having the length direction and the width direction is viewed from the laminating direction includes a plurality of side margin layers laminated in the width direction. An outer layer portion as a region in which the plurality of internal electrodes is not provided except for the side margin portion when a section of the laminate including the laminating direction and the width direction is viewed from the length direction includes a plurality of layer-margin layers laminated in the laminating direction.
    Type: Application
    Filed: February 16, 2023
    Publication date: June 22, 2023
    Applicant: Murata Manufacturing Co., Ltd.
    Inventors: Daiki FUKUNAGA, Hideaki TANAKA, Masahiro WAKASHIMA, Daisuke HAMADA, Hironori TSUTSUMI, Satoshi MAENO, Ryota ASO, Koji MORIYAMA, Akihiro TSURU
  • Patent number: 11610736
    Abstract: An electronic component includes a laminate in which a plurality of dielectric layers and a plurality of internal electrodes are alternately laminated and external electrodes electrically connected to the internal electrodes. A side margin portion as a region in which the plurality of internal electrodes is not provided when a section of the laminate having the length direction and the width direction is viewed from the laminating direction includes a plurality of side margin layers laminated in the width direction. An outer layer portion as a region in which the plurality of internal electrodes is not provided except for the side margin portion when a section of the laminate including the laminating direction and the width direction is viewed from the length direction includes a plurality of layer-margin layers laminated in the laminating direction.
    Type: Grant
    Filed: July 7, 2021
    Date of Patent: March 21, 2023
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Daiki Fukunaga, Hideaki Tanaka, Masahiro Wakashima, Daisuke Hamada, Hironori Tsutsumi, Satoshi Maeno, Ryota Aso, Koji Moriyama, Akihiro Tsuru
  • Patent number: 11532438
    Abstract: A multilayer electronic component includes a multilayer body including dielectric layers and inner electrode layers. Each of the dielectric layers includes first crystal grains defining and functioning as plate-shaped objects that have an average thickness of less than or equal to about 300 nm and an average aspect ratio of more than or equal to about 5, each of the inner electrode layers includes second crystal grains defining and functioning as plate-shaped objects that have an average thickness of less than or equal to about 150 nm and an average aspect ratio of more than or equal to about 5, where an aspect ratio is represented by a ratio of a major axis of each plate-shaped object to a thickness of the plate-shaped object with the major axis of the plate-shaped object being orthogonal or substantially orthogonal to a thickness direction of the plate-shaped object.
    Type: Grant
    Filed: July 16, 2020
    Date of Patent: December 20, 2022
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Takehisa Sasabayashi, Kiyoshiro Ishibe, Kenji Ueno, Ai Fukumori, Akihiro Tsuru, Daisuke Hamada
  • Patent number: 11264174
    Abstract: A multilayer ceramic capacitor that includes a ceramic body including a stack of a plurality of dielectric layers and a plurality of first and second internal electrodes; and first and second external electrodes provided at each of both end faces of the ceramic body. Each of the plurality of dielectric layers contain Ba, Ti, P and Si. The plurality of dielectric layers include an outer dielectric layer located on an outermost side in the stacking direction; an inner dielectric layer located between the first and second internal electrodes; and a side margin portion in a region where the first and second internal electrodes do not exist. In at least one of the outer dielectric layer, the inner dielectric layer and the side margin portion, the P and the Si segregate in at least one of grain-boundary triple points of three ceramic particles.
    Type: Grant
    Filed: March 13, 2020
    Date of Patent: March 1, 2022
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Akihiro Tsuru, Kazuhisa Uchida
  • Publication number: 20220028620
    Abstract: A multilayer ceramic capacitor that includes a ceramic body including a stack of a plurality of dielectric layers and a plurality of first and second internal electrodes; and first and second external electrodes provided at each of both end faces of the ceramic body. Each of the plurality of dielectric layers contain Ba, Ti, P and Si. The plurality of dielectric layers include an outer dielectric layer located on an outermost side in the stacking direction; an inner dielectric layer located between the first and second internal electrodes; and a side margin portion in a region where the first and second internal electrodes do not exist. In at least one of the outer dielectric layer, the inner dielectric layer and the side margin portion, the P and the Si segregate in at least one of grain-boundary triple points of three ceramic particles.
    Type: Application
    Filed: October 12, 2021
    Publication date: January 27, 2022
    Inventors: Akihiro Tsuru, Kazuhisa Uchida
  • Publication number: 20210350983
    Abstract: An electronic component includes a laminate in which a plurality of dielectric layers and a plurality of internal electrodes are alternately laminated and external electrodes electrically connected to the internal electrodes. A side margin portion as a region in which the plurality of internal electrodes is not provided when a section of the laminate having the length direction and the width direction is viewed from the laminating direction includes a plurality of side margin layers laminated in the width direction. An outer layer portion as a region in which the plurality of internal electrodes is not provided except for the side margin portion when a section of the laminate including the laminating direction and the width direction is viewed from the length direction includes a plurality of layer-margin layers laminated in the laminating direction.
    Type: Application
    Filed: July 7, 2021
    Publication date: November 11, 2021
    Inventors: Daiki FUKUNAGA, Hideaki TANAKA, Masahiro WAKASHIMA, Daisuke HAMADA, Hironori TSUTSUMI, Satoshi MAENO, Ryota ASO, Koji MORIYAMA, Akihiro TSURU
  • Patent number: 11094464
    Abstract: An electronic component includes a laminate in which a plurality of dielectric layers and a plurality of internal electrodes are alternately laminated and external electrodes electrically connected to the internal electrodes. A side margin portion as a region in which the plurality of internal electrodes is not provided when a section of the laminate having the length direction and the width direction is viewed from the laminating direction includes a plurality of side margin layers laminated in the width direction. An outer layer portion as a region in which the plurality of internal electrodes is not provided except for the side margin portion when a section of the laminate including the laminating direction and the width direction is viewed from the length direction includes a plurality of layer-margin layers laminated in the laminating direction.
    Type: Grant
    Filed: August 22, 2019
    Date of Patent: August 17, 2021
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Daiki Fukunaga, Hideaki Tanaka, Masahiro Wakashima, Daisuke Hamada, Hironori Tsutsumi, Satoshi Maeno, Ryota Aso, Koji Moriyama, Akihiro Tsuru
  • Publication number: 20210020380
    Abstract: A multilayer electronic component includes a multilayer body including dielectric layers and inner electrode layers. Each of the dielectric layers includes first crystal grains defining and functioning as plate-shaped objects that have an average thickness of less than or equal to about 300 nm and an average aspect ratio of more than or equal to about 5, each of the inner electrode layers includes second crystal grains defining and functioning as plate-shaped objects that have an average thickness of less than or equal to about 150 nm and an average aspect ratio of more than or equal to about 5, where an aspect ratio is represented by a ratio of a major axis of each plate-shaped object to a thickness of the plate-shaped object with the major axis of the plate-shaped object being orthogonal or substantially orthogonal to a thickness direction of the plate-shaped object.
    Type: Application
    Filed: July 16, 2020
    Publication date: January 21, 2021
    Inventors: Takehisa SASABAYASHI, Kiyoshiro ISHIBE, Kenji UENO, Ai FUKUMORI, Akihiro TSURU, Daisuke HAMADA
  • Publication number: 20200303125
    Abstract: A multilayer ceramic capacitor that includes a ceramic body including a stack of a plurality of dielectric layers and a plurality of first and second internal electrodes; and first and second external electrodes provided at each of both end faces of the ceramic body. Each of the plurality of dielectric layers contain Ba, Ti, P and Si. The plurality of dielectric layers include an outer dielectric layer located on an outermost side in the stacking direction; an inner dielectric layer located between the first and second internal electrodes; and a side margin portion in a region where the first and second internal electrodes do not exist. In at least one of the outer dielectric layer, the inner dielectric layer and the side margin portion, the P and the Si segregate in at least one of grain-boundary triple points of three ceramic particles.
    Type: Application
    Filed: March 13, 2020
    Publication date: September 24, 2020
    Inventors: Akihiro Tsuru, Kazuhisa Uchida
  • Publication number: 20200066446
    Abstract: An electronic component includes a laminate in which a plurality of dielectric layers and a plurality of internal electrodes are alternately laminated and external electrodes electrically connected to the internal electrodes. A side margin portion as a region in which the plurality of internal electrodes is not provided when a section of the laminate having the length direction and the width direction is viewed from the laminating direction includes a plurality of side margin layers laminated in the width direction. An outer layer portion as a region in which the plurality of internal electrodes is not provided except for the side margin portion when a section of the laminate including the laminating direction and the width direction is viewed from the length direction includes a plurality of layer-margin layers laminated in the laminating direction.
    Type: Application
    Filed: August 22, 2019
    Publication date: February 27, 2020
    Inventors: Daiki FUKUNAGA, Hideaki TANAKA, Masahiro WAKASHIMA, Daisuke HAMADA, Hironori TSUTSUMI, Satoshi MAENO, Ryota ASO, Koji MORIYAMA, Akihiro TSURU
  • Patent number: 10546691
    Abstract: A capacitor that includes a conductive base material with high specific surface area, a dielectric layer covering the conductive base material with high specific surface area, and an upper electrode covering the dielectric layer, in which the conductive base material with high specific surface area is formed of a metal sintered body as a whole.
    Type: Grant
    Filed: February 5, 2018
    Date of Patent: January 28, 2020
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Noriyuki Inoue, Takeo Arakawa, Kensuke Aoki, Hiromasa Saeki, Koichi Kanryo, Akihiro Tsuru, Haruhiko Mori
  • Publication number: 20180158610
    Abstract: A capacitor that includes a conductive base material with high specific surface area, a dielectric layer covering the conductive base material with high specific surface area, and an upper electrode covering the dielectric layer, in which the conductive base material with high specific surface area is formed of a metal sintered body as a whole.
    Type: Application
    Filed: February 5, 2018
    Publication date: June 7, 2018
    Inventors: NORIYUKI INOUE, Takeo Arakawa, Kensuke Aoki, Hiromasa Saeki, Koichi Kanryo, Akihiro Tsuru, Haruhiko Mori
  • Patent number: 9959973
    Abstract: A multilayer ceramic capacitor that includes a layered body in which dielectric layers and internal electrode layers are layered alternately, an external electrode on a surface of the layered body and a plating layer on a surface of the external electrode. The external electrode contains Cu, and a protective layer containing Cu2O is provided at a joining portion between the external electrode and the plating layer. When heat is applied to the layered body after the external electrode is removed, a ratio of an arithmetic mean value Xa of a quantity of hydrogen generated per unit temperature in a range higher than or equal to 350° C. with respect to an arithmetic mean value Y of a quantity of hydrogen generated per unit temperature in a range higher than or equal to 230° C. and lower than or equal to 250° C. (Xa/Y) is less than or equal to 0.66.
    Type: Grant
    Filed: September 14, 2015
    Date of Patent: May 1, 2018
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Yoshito Saito, Yasuhiro Nishisaka, Makoto Ogawa, Akihiro Tsuru
  • Patent number: 9928960
    Abstract: A monolithic ceramic capacitor that contains a perovskite compound including Ba and Ti and at least one type of element selected from Gd, Tb, and Dy, and contains elements selected from Y, Si, Mn, Mg, and Zr. The content a of at least one element selected from Gd, Tb, and Dy satisfies 0.2?a?0.8, the content b of Y satisfies 0.0?b?0.5, the content c of Si satisfies 0.0?c?2.5, the content d of Mn satisfies 0.0?d?0.25, the content e of Mg satisfies 0.0?e?1.2, the content f of Zr satisfies 0.0?f?0.5, and the molar ratio m of the content of Ba/(f+the content of Ti) satisfies 0.99?m?1.01, where the total content of Ti is 100 parts by mole.
    Type: Grant
    Filed: June 19, 2015
    Date of Patent: March 27, 2018
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Toru Nakanishi, Toshihiro Okamatsu, Akihiro Tsuru, Hiroyuki Wada
  • Patent number: 9738806
    Abstract: An inkjet ink that contains a functional particle having a BET-equivalent particle diameter of 50 to 1000 nm, a rheology-controlling particle having a BET-equivalent particle diameter of 4 to 40 nm, and an organic vehicle. The ink has a viscosity of 1 to 50 mPa·s at a shear rate of 1000 s?1. At a shear rate of 0.1 s?1, the ink has a viscosity equal to or higher than a viscosity ? calculated using the following equation: ?=(D)2×?/104/2+80 [where ? is the viscosity (mPa·s) at a shear rate of 0.1 s?1, D is the BET-equivalent particle diameter (nm) of the functional particle, and ? is the specific gravity of the functional particle].
    Type: Grant
    Filed: November 18, 2014
    Date of Patent: August 22, 2017
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Akihiro Tsuru, Taketsugu Ogura, Naoaki Ogata
  • Publication number: 20160086733
    Abstract: A multilayer ceramic capacitor that includes a layered body in which dielectric layers and internal electrode layers are layered alternately, an external electrode on a surface of the layered body and a plating layer on a surface of the external electrode. The external electrode contains Cu, and a protective layer containing Cu2O is provided at a joining portion between the external electrode and the plating layer. When heat is applied to the layered body after the external electrode is removed, a ratio of an arithmetic mean value Xa of a quantity of hydrogen generated per unit temperature in a range higher than or equal to 350° C. with respect to an arithmetic mean value Y of a quantity of hydrogen generated per unit temperature in a range higher than or equal to 230° C. and lower than or equal to 250° C. (Xa/Y) is less than or equal to 0.66.
    Type: Application
    Filed: September 14, 2015
    Publication date: March 24, 2016
    Inventors: Yoshito Saito, Yasuhiro Nishisaka, Makoto Ogawa, Akihiro Tsuru
  • Publication number: 20160035490
    Abstract: A method for producing a composite oxide-coated metal powder that includes a first step of coating a metal powder with a metal oxide by a hydrolysis reaction of a water-soluble metal compound in an aqueous solvent, and a second step of turning the metal oxide into a composite oxide. In the first step, the water-soluble metal compound containing a tetravalent metal element dissolved in a solvent including at least water is added to a slurry including the metal powder dispersed in the solvent to deposit the metal oxide containing the tetravalent metal element and produce a metal oxide-coated metal powder slurry. In the second step, a solution or powder containing at least one divalent element is added to the metal oxide-coated metal powder slurry to react the metal oxide present on the surface of the metal powder with the divalent element, thereby providing the composite oxide-coated metal powder.
    Type: Application
    Filed: October 15, 2015
    Publication date: February 4, 2016
    Inventors: Akihiro Tsuru, Toru Nakanishi
  • Publication number: 20150287535
    Abstract: A monolithic ceramic capacitor that contains a perovskite compound including Ba and Ti and at least one type of element selected from Gd, Tb, and Dy, and contains elements selected from Y, Si, Mn, Mg, and Zr. The content a of at least one element selected from Gd, Tb, and Dy satisfies 0.2?a?0.8, the content b of Y satisfies 0.0?b?0.5, the content c of Si satisfies 0.0?c?2.5, the content d of Mn satisfies 0.0?d?0.25, the content e of Mg satisfies 0.0?e?1.2, the content f of Zr satisfies 0.0?f?0.5, and the molar ratio m of the content of Ba/(f+the content of Ti) satisfies 0.99?m?1.01, where the total content of Ti is 100 parts by mole.
    Type: Application
    Filed: June 19, 2015
    Publication date: October 8, 2015
    Inventors: Toru Nakanishi, Toshihiro Okamatsu, Akihiro Tsuru, Hiroyuki Wada
  • Publication number: 20150070818
    Abstract: An inkjet ink that contains a functional particle having a BET-equivalent particle diameter of 50 to 1000 nm, a rheology-controlling particle having a BET-equivalent particle diameter of 4 to 40 nm, and an organic vehicle. The ink has a viscosity of 1 to 50 mPa·s at a shear rate of 1000 s?1. At a shear rate of 0.1 s?1, the ink has a viscosity equal to or higher than a viscosity ? calculated using the following equation: ?=(D)2×?/104/2+80 [where ? is the viscosity (mPa·s) at a shear rate of 0.1 s?1, D is the BET-equivalent particle diameter (nm) of the functional particle, and ? is the specific gravity of the functional particle].
    Type: Application
    Filed: November 18, 2014
    Publication date: March 12, 2015
    Inventors: Akihiro Tsuru, Taketsugu Ogura, Naoaki Ogata
  • Patent number: 6134397
    Abstract: A toner supply bias voltage that is a vibrating voltage comprising an a.c. voltage and a d.c. voltage is applied to a toner supply roller. The d.c. voltage of toner supply bias voltage is changed in dependence upon a variation in the value of developing bias voltage. The lowering in the density at the leading end part of an image, the lowering in the density at the trailing end part of an image, and the uneven developing can be eliminated by satisfying the relationships100.ltoreq..vertline.VB.vertline..ltoreq..vertline.VSR.vertline.,2(.vertline.VSR-VB.vertline.+50).ltoreq..vertline.VPP.vertline..ltoreq.2.ve rtline.VSR.vertline. andf.gtoreq.v/lare satisfied, where VB is a developing bias voltage (unit: Volt), VSR is a d.c. voltage of the toner supply bias voltage (unit: Volt), VPP is a peak-to-peak value of the a.c.
    Type: Grant
    Filed: April 5, 1999
    Date of Patent: October 17, 2000
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hiromitsu Shimazaki, Akihiro Tsuru, Hironori Taguchi, Kazuhiko Noda