Abstract: A generation unit generates a background separation image in which regions of a captured image are classified as a foreground region, a background region, and an unknown region, based on distance distribution information obtained from a plurality of parallax images. An output unit outputs the captured image and the background separation image. A region in which a distance in the distance distribution information is within a first range is classified as the foreground region. A region in which a distance in the distance distribution information is outside a second range broader than the first range is classified as the background region. A region in which a distance in the distance distribution information is outside the first range and inside the second range is classified as the unknown region.

Abstract: A semiconductor device includes an interposer, a semiconductor chip mounted on the interposer, a first wiring pattern formed on the interposer, the first wiring pattern including a first contact coupled to a bonding wire from the semiconductor chip and a second contact coupled to an external terminal of the interposer, and a second wiring pattern formed adjacent to the first wiring pattern on the interposer, the second wiring pattern including a third contact coupled to another bonding wire from the semiconductor chip and a fourth contact coupled to another external terminal of the interposer. The first contact is closer to the semiconductor chip than the third contact.

Abstract: A difference in delay of signal transmission due to the wiring within a board is minimized. A wiring board includes wiring for connecting terminals included in one of a plurality of semiconductor chips to terminals included in another one of the plurality of semiconductor chips, through branch points. Each of the plurality of semiconductor chips includes first and second terminals. Moreover, a first wiring up to the first terminals and a second wiring up to the second terminals are in a positional relationship of being shifted parallel to each other in a planar direction of the wiring board so as not to come into electrical contact with each other.

Abstract: A semiconductor device suppresses a magnetic field caused by a current loop formed by a signal wiring and a return path wiring, to reduce transmission loss of a high-speed signal. The semiconductor device includes a signal current path connected from a signal pad to a first external terminal via a first bonding wire and an interposer, and a current return path connected from a second external terminal provided adjacent to the first external terminal to a second pad provided adjacent to the signal pad via the interposer essentially on the same plane. The signal current path and the current return path are positioned so that they intersect with each other, thereby reversing the direction of a loop through which the current flows, and as a result, magnetic fields caused by the current loop formed by the signal current path and the current return path cancel each other.

Abstract: A difference in delay of signal transmission due to the wiring within a board is minimized. A wiring board includes wiring for connecting terminals included in one of a plurality of semiconductor chips to terminals included in another one of the plurality of semiconductor chips, through branch points. Each of the plurality of semiconductor chips includes first and second terminals. Moreover, a first wiring up to the first terminals and a second wiring up to the second terminals are in a positional relationship of being shifted parallel to each other in a planar direction of the wiring board so as not to come into electrical contact with each other.

Abstract: A plurality of film insulators having conductive patterns that are formed on surfaces and conductive vias that pass through the film insulators in the direction of thickness are stacked together and collectively subjected to pressure and heat to be formed as a single unit. On one outermost layer of the multilayer board that has been thus formed, a plurality of connection terminals are exposed to the outside, connection bumps of an LSI chip being secured to these connection terminals. On the outermost layer of the opposite side, a multiplicity of metal pads are provided, and a solder ball is secured on each metal pad to form a ball grid array (BGA) structure for connecting to a motherboard.

Abstract: In a printed board having a land as an electrode, a colored thermoplastic resin film is arranged on a land forming surface of a thermoplastic resin member so as to set a difference in light reflectivity between the land and the colored thermoplastic resin film, to be greater than that between the land and the thermoplastic resin member. An opening portion is provided in the colored thermoplastic resin film so that at least a part of the land is exposed from the opening portion. Because the colored thermoplastic resin film is positioned on the circumference portion of the opening portion, the difference in light reflectivity of the land with respect to its circumference portion can be effectively increased. As a result, a recognition ratio of the land can be effectively improved.

Abstract: In a printed board having a land as an electrode, a colored thermoplastic resin film is arranged on a land forming surface of a thermoplastic resin member so as to set a difference in light reflectivity between the land and the colored thermoplastic resin film, to be greater than that between the land and the thermoplastic resin member. An opening portion is provided in the colored thermoplastic resin film so that at least a part of the land is exposed from the opening portion. Because the colored thermoplastic resin film is positioned on the circumference portion of the opening portion, the difference in light reflectivity of the land with respect to its circumference portion can be effectively increased. As a result, a recognition ratio of the land can be effectively improved.

Abstract: A plurality of film insulators having conductive patterns that are formed on surfaces and conductive vias that pass through the film insulators in the direction of thickness are stacked together and collectively subjected to pressure and heat to be formed as a single unit. On one outermost layer of the multilayer board that has been thus formed, a plurality of connection terminals are exposed to the outside, connection bumps of an LSI chip being secured to these connection terminals. On the outermost layer of the opposite side, a multiplicity of metal pads are provided, and a solder ball is secured on each metal pad to form a ball grid array (BGA) structure for connecting to a motherboard.