Patents by Inventor Akinobu Shibuya
Akinobu Shibuya has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230267901Abstract: According to an embodiment, a signal generation device includes a memory storing a program and a processor communicatively connected to the memory and executing the program to function as a signal generating unit and a sound generation control unit. The signal generating unit generates a sound signal in response to operation of a plurality of operators. The plurality of operators includes a first operator and a second operator. The sound generation control unit controls a sound generation form of a second sound signal generated in response to a second operation of the second operator following a first operation, based on a duration of the first operation of the first operator.Type: ApplicationFiled: May 2, 2023Publication date: August 24, 2023Inventor: Akinobu SHIBUYA
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Publication number: 20230077215Abstract: Disclosed is a sintered body comprising (a) a matrix material comprising at least one selected from ZnS and ZnSe, (b) an oxide that is present in a form of islands in the matrix material, comprising at least one metal selected from the group consisting of Ca, Sr and Ba, and (c) pores that are present in a form of islands in the matrix material. The sintered body has sufficient strength and an infrared stealth effect in an infrared region such as a MWIR and LWIR region.Type: ApplicationFiled: August 17, 2022Publication date: March 9, 2023Applicant: NEC CorporationInventors: Akinobu SHIBUYA, Taizo Shibuya
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Publication number: 20220229215Abstract: A radiation suppression film includes a porous body containing a material transparent to a long wavelength infrared ray as a base material.Type: ApplicationFiled: May 20, 2020Publication date: July 21, 2022Applicant: NEC CorporationInventors: Taizo SHIBUYA, Akinobu SHIBUYA
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Patent number: 11326071Abstract: A coating material includes a ceramic particle and binder. The ceramic particle includes a compound represented by a compositional formula of any of AaRbAlcO4, AaRbGacO4, RxAlyO12, and RxGayO12. A is one or more elements selected from a group consisting of Ca, Sr, and Ba, and R is one or more elements selected from a group consisting of rare earth elements. a is equal to or greater than 0.9 and equal to or less than 1.1, b is equal to or greater than 0.9 and equal to or less than 1.1, c is equal to or greater than 0.9 and equal to or less than 1.1, x is equal to or greater than 2.9 and equal to or less than 3.1, and y is equal to or greater than 4.9 and equal to or less than 5.1. The ceramic particle includes a pore and the porosity of the ceramic particle is equal to or greater than 20% and equal to or less than 40%.Type: GrantFiled: October 19, 2017Date of Patent: May 10, 2022Assignee: NEC CORPORATIONInventor: Akinobu Shibuya
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Publication number: 20210284860Abstract: A coating material (20) includes a ceramic particle (22) and a binder (24). The ceramic particle (22) includes a compound represented by a compositional formula of any of AaRbAlcO4, AaRbGacO4, RxAlyO12, and RxGayO12. Here, A is one or more elements selected from a group consisting of Ca, Sr, and Ba, and R is one or more elements selected from a group consisting of rare earth elements. a is equal to or greater than 0.9 and equal to or less than 1.1, b is equal to or greater than 0.9 and equal to or less than 1.1, c is equal to or greater than 0.9 and equal to or less than 1.1, x is equal to or greater than 2.9 and equal to or less than 3.1, and y is equal to or greater than 4.9 and equal to or less than 5.1. The ceramic particle (22) includes a pore and the porosity of the ceramic particle (22) is equal to or greater than 20% and equal to or less than 40%.Type: ApplicationFiled: October 19, 2017Publication date: September 16, 2021Applicant: NEC CORPORATIONInventor: Akinobu SHIBUYA
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Patent number: 10908078Abstract: An infrared ray radiated from a region of a surface of an object to which a coating film (20) of a coating material is provided is detected by an infrared sensor (42). The coating film (20) includes a porous ceramic particle (22) and a binder (24), and the ceramic particle (22) includes a compound represented by a compositional formula of any of AaRbAlcO4, AaRbGacO4, Rx, AlyO12, and RxGayO12. Here, A is one or more elements selected from a group consisting of Ca, Sr, and Ba, and R is one or more elements selected from a group consisting of rare earth elements. Also, a is equal to or greater than 0.9 and equal to or less than 1.1, b is equal to or greater than 0.9 and equal to or less than 1.1, c is equal to or greater than 0.9 and equal to or less than 1.1, x is equal to or greater than 2.9 and equal to or less than 3.1, and y is equal to or greater than 4.9 and equal to or less than 5.1. A porosity of the ceramic particle (22) is equal to or greater than 20% and equal to or less than 40%.Type: GrantFiled: October 19, 2017Date of Patent: February 2, 2021Assignee: NEC CORPORATIONInventor: Akinobu Shibuya
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Publication number: 20200064257Abstract: An infrared ray radiated from a region of a surface of an object to which a coating film (20) of a coating material is provided is detected by an infrared sensor (42). The coating film (20) includes a porous ceramic particle (22) and a binder (24), and the ceramic particle (22) includes a compound represented by a compositional formula of any of AaRbAlcO4, AaRbGacO4, Rx, AlyO12, and RxGayO12. Here, A is one or more elements selected from a group consisting of Ca, Sr, and Ba, and R is one or more elements selected from a group consisting of rare earth elements. Also, a is equal to or greater than 0.9 and equal to or less than 1.1, b is equal to or greater than 0.9 and equal to or less than 1.1, c is equal to or greater than 0.9 and equal to or less than 1.1, x is equal to or greater than 2.9 and equal to or less than 3.1, and y is equal to or greater than 4.9 and equal to or less than 5.1. A porosity of the ceramic particle (22) is equal to or greater than 20% and equal to or less than 40%.Type: ApplicationFiled: October 19, 2017Publication date: February 27, 2020Applicant: NEC CORPORATIONInventor: Akinobu SHIBUYA
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Patent number: 10544363Abstract: [Objective] To provide a ceramic emitter that exhibits high radiation intensity and excellent wavelength selectivity. [Solution] A ceramic emitter includes a polycrystalline body that has a garnet structure represented by a compositional formula R3Al5O12 (R: rare-earth element) or R3Ga5O12 (R: rare-earth element) and has pores with a porosity of 20-40%. The pores have a portion where the pores are connected to one another but not linearly continuous, inside the polycrystalline body.Type: GrantFiled: September 11, 2015Date of Patent: January 28, 2020Assignee: NEC CorporationInventor: Akinobu Shibuya
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Publication number: 20170253797Abstract: [Objective] To provide a ceramic emitter that exhibits high radiation intensity and excellent wavelength selectivity. [Solution] A ceramic emitter includes a polycrystalline body that has a garnet structure represented by a compositional formula R3Al5O12 (R: rare-earth element) or R3Ga5O12 (R: rare-earth element) and has pores with a porosity of 20-40%. The pores have a portion where the pores are connected to one another but not linearly continuous, inside the polycrystalline body.Type: ApplicationFiled: September 11, 2015Publication date: September 7, 2017Applicant: NEC CorporationInventor: Akinobu SHIBUYA
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Publication number: 20150034373Abstract: A wiring structure includes a substrate, a convexoconcave absorption layer including a convexoconcave portion on the substrate, a conductive layer pattern on at least a concave portion of the convexoconcave absorption layer, and an insulating layer pattern over the conductive layer pattern and the convexoconcave absorption layer, on at least the concave portion. This configuration provides a wiring structure and a manufacturing method thereof which enable to form fine multilayer wiring using microcontact printing or the like.Type: ApplicationFiled: February 13, 2013Publication date: February 5, 2015Applicant: NEC CorporationInventors: Yoshiki Nakashima, Masahiro Kubo, Akinobu Shibuya
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Patent number: 8802496Abstract: Disclosed is a substrate for a semiconductor package in which leakage of radiation noise from a gap between a semiconductor element and a mounting substrate can be prevented. The substrate for the semiconductor package includes a coplanar waveguide including a signal and ground electrodes on the mounting substrate, the signal electrode flip-chip connected to the semiconductor element, the ground electrodes arranged on both sides of the signal electrode with intervals therebetween. A step part is formed in the ground electrodes in an outer circumferential part of a mounting region of the semiconductor element, the step part having a larger distance between upper surfaces of the mounting substrate and the ground electrode in the outer circumferential part of the mounting region than such distance in the mounting region, and an insulator for covering the signal electrode in the outer circumferential part of the mounting region is formed.Type: GrantFiled: August 5, 2013Date of Patent: August 12, 2014Assignee: NEC CorporationInventors: Akinobu Shibuya, Akira Ouchi
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Publication number: 20140068905Abstract: In a capacitor producing method, a bottom electrode, a thin-film dielectric, and a top electrode are deposited on a substrate so as to form a capacitor, wherein defects including particles and electrical short-circuits between the bottom electrode and the top electrode are detected before the capacitor is divided into capacitor cells. Next, defects such as particles and electrical short-circuits between the bottom electrode and the top electrode are removed before the capacitor is divided into capacitor cells.Type: ApplicationFiled: November 15, 2013Publication date: March 13, 2014Applicant: NEC CORPORATIONInventors: Akinobu SHIBUYA, Koichi TAKEMURA, Takashi MANAKO
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Patent number: 8669138Abstract: A substrate and a semiconductor chip are connected by means of flip-chip interconnection. Around connecting pads of the substrate and input/output terminals of the semiconductor chip, an underfill material is injected. The underfill material is a composite material of filler and resin. Also, a first main surface of the substrate, which is not covered with the underfill material, and the side surfaces of the semiconductor chip are encapsulated with a molding material. The molding material is a composite material of filler and resin. An integrated body of the substrate and the semiconductor chip, which are covered with the molding material, is thinned from above and below.Type: GrantFiled: July 13, 2012Date of Patent: March 11, 2014Assignee: NEC CorporationInventors: Akinobu Shibuya, Koichi Takemura, Akira Ouchi, Tomoo Murakami
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Patent number: 8621730Abstract: In a capacitor producing method, a bottom electrode, a thin-film dielectric, and a top electrode are deposited on a substrate so as to form a capacitor, wherein defects including particles and electrical short-circuits between the bottom electrode and the top electrode are detected before the capacitor is divided into capacitor cells. Next, defects such as particles and electrical short-circuits between the bottom electrode and the top electrode are removed before the capacitor is divided into capacitor cells.Type: GrantFiled: February 12, 2010Date of Patent: January 7, 2014Assignee: NEC CorporationInventors: Akinobu Shibuya, Koichi Takemura, Takashi Manako
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Publication number: 20130316495Abstract: Disclosed is a substrate for a semiconductor package in which leakage of radiation noise from a gap between a semiconductor element and a mounting substrate can be prevented. The substrate for the semiconductor package includes a coplanar waveguide including a signal and ground electrodes on the mounting substrate, the signal electrode flip-chip connected to the semiconductor element, the ground electrodes arranged on both sides of the signal electrode with intervals therebetween. A step part is formed in the ground electrodes in an outer circumferential part of a mounting region of the semiconductor element, the step part having a larger distance between upper surfaces of the mounting substrate and the ground electrode in the outer circumferential part of the mounting region than such distance in the mounting region, and an insulator for covering the signal electrode in the outer circumferential part of the mounting region is formed.Type: ApplicationFiled: August 5, 2013Publication date: November 28, 2013Applicant: NEC CORPORATIONInventors: Akinobu SHIBUYA, Akira OUCHI
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Patent number: 8531023Abstract: Disclosed is a substrate for a semiconductor package in which leakage of radiation noise from a gap between a semiconductor element and a mounting substrate can be prevented. The substrate for the semiconductor package includes a coplanar waveguide including a signal and ground electrodes on the mounting substrate, the signal electrode flip-chip connected to the semiconductor element, the ground electrodes arranged on both sides of the signal electrode with intervals therebetween. A step part is formed in the ground electrodes in an outer circumferential part of a mounting region of the semiconductor element, the step part having a larger distance between upper surfaces of the mounting substrate and the ground electrode in the outer circumferential part of the mounting region than such distance in the mounting region, and an insulator for covering the signal electrode in the outer circumferential part of the mounting region is formed.Type: GrantFiled: June 25, 2010Date of Patent: September 10, 2013Assignee: NEC CorporationInventors: Akinobu Shibuya, Akira Ouchi
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Publication number: 20130012145Abstract: Provided is a radio module that includes a radio signal connection portion having a low insertion loss and high reliability. This radio module includes a first wiring substrate 1, and a second wiring substrate 2 which is located opposite to a first face 1a of the first wiring substrate 1. Further, at least one through hole 3 having an inner wall formed of a conductive material is provided inside the second wiring substrate. Moreover, at least one hollow pillar 4 formed of a conductive material is provided at a position corresponding to the at least one through hole 3, on at least one of the first face 1a and a second face 2a of the second wiring substrate 2, the second face 2a being opposite to the first face 1a. Here, an axis-direction height of the at least one hollow pillar 4 formed of a conductive material is smaller than the width of a gap between the first face 1a and the second face 2a.Type: ApplicationFiled: March 15, 2011Publication date: January 10, 2013Inventors: Akinobu Shibuya, Akira Ouchi, Akira Miyata, Ryo Miyazaki, Yoshiaki Wakabayashi
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Publication number: 20130005085Abstract: A substrate and a semiconductor chip are connected by means of flip-chip interconnection. Around connecting pads of the substrate and input/output terminals of the semiconductor chip, an underfill material is injected. The underfill material is a composite material of filler and resin. Also, a first main surface of the substrate, which is not covered with the underfill material, and the side surfaces of the semiconductor chip are encapsulated with a molding material. The molding material is a composite material of filler and resin. An integrated body of the substrate and the semiconductor chip, which are covered with the molding material, is thinned from above and below.Type: ApplicationFiled: July 13, 2012Publication date: January 3, 2013Applicant: NEC CorporationInventors: Akinobu SHIBUYA, Koichi Takemura, Akira Ouchi, Tomoo Murakami
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Patent number: 8237292Abstract: A substrate (1) and a semiconductor chip (5) are connected by means of flip-chip interconnection. Around connecting pads (3) of the substrate (1) and input/output terminals (10) of the semiconductor chip (5), an underfill material (7) is injected. The underfill material (7) is a composite material of filler and resin in which the maximum particle diameter of the filler is 5 ?m or below and whose filler content is 40 to 60 wt %. Also, a first main surface of the substrate (1), which is not covered with the underfill material (7), and the side surfaces of the semiconductor chip (5) are encapsulated with a molding material (8). The molding material (8) is a composite material of filler and resin whose filler content is over 75 wt % and in which the glass transition temperature of the resin is over 180° C. An integrated body of the substrate (1) and the semiconductor chip (5), which are covered with the molding material (8), is thinned from above and below.Type: GrantFiled: February 29, 2008Date of Patent: August 7, 2012Assignee: NEC CorporationInventors: Akinobu Shibuya, Koichi Takemura, Akira Ouchi, Tomoo Murakami
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Publication number: 20120112344Abstract: Disclosed is a substrate for a semiconductor package in which leakage of radiation noise from a gap between a semiconductor element and a mounting substrate can be prevented. The substrate for the semiconductor package includes a coplanar waveguide including a signal and ground electrodes on the mounting substrate, the signal electrode flip-chip connected to the semiconductor element, the ground electrodes arranged on both sides of the signal electrode with intervals therebetween. A step part is formed in the ground electrodes in an outer circumferential part of a mounting region of the semiconductor element, the step part having a larger distance between upper surfaces of the mounting substrate and the ground electrode in the outer circumferential part of the mounting region than such distance in the mounting region, and an insulator for covering the signal electrode in the outer circumferential part of the mounting region is formed.Type: ApplicationFiled: June 25, 2010Publication date: May 10, 2012Applicant: NEC CORPORATIONInventors: Akinobu Shibuya, Akira Ouchi