Patents by Inventor Akira Sobajima

Akira Sobajima has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6829360
    Abstract: A low-pass filter of over-sampling type oversamples an input digital audio signal T1 and filters and removes the low frequency components of the produced aliasing noise. A spectrum analyzer circuit calculates the spectrum intensity of a predetermined band of an output signal from the low-pass filter. An expanded signal generating circuit generates an expanded signal having frequency components of the output signal from the low-pass filter. A level control circuit controls the level of the expanded signal according to the spectrum analyzer circuit. An adder adds the level-controlled expanded signal to the output signal from the low-pass filter thereby to generate a digital audio signal T2.
    Type: Grant
    Filed: January 12, 2001
    Date of Patent: December 7, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kazuya Iwata, Naoki Ejima, Akira Sobajima
  • Publication number: 20040017757
    Abstract: For audio data configured in units of frames with a header at the top and compressed in a way such that data corresponding to a specific frame is also present in a different frame, the present invention executes at least one of the following processing (1) and processing (2) at dividing this compressed audio into two pieces of audio data, i.e., front and rear pieces, at a predetermined position. (1) A step to divide the audio data into front and rear pieces, and a step to add data of a predetermined number of bytes at the beginning of the rear audio data to an end of the front audio data. (2) A step to divide the audio data into front and rear pieces, and a step to add data of a predetermined number bytes from an end of the front audio data to the front of the beginning of the rear audio data. This prevents the generation of abnormal noise even when data is compressed in a way, typically in MP3, such that location of a frame and location of data for that frame do not always match.
    Type: Application
    Filed: August 14, 2003
    Publication date: January 29, 2004
    Inventors: Tetsuhiko Kaneaki, Tomoaki Izumi, Keiichi Kameda, Akira Sobajima, Masahiko Hatanaka, Kiminori Matsuno, Shuji Morita
  • Patent number: 5539403
    Abstract: It purposes to provide a D/A conversion apparatus of a high accuracy oversampling method by noise shaping which is not needed a high frequency clock or accurate working, and a high accuracy A/D conversion apparatus having a configuration to which said D/A conversion technology is applied. It has configuration outputting the digital signal by dividing to plural 1-bit D/A converters, and by using said D/A converters so as to circulate, correlation of the signal and the output value of a specified 1-bit D/A converter is canceled, and noise or distortion due to a relative error of the 1-bit D/A converter is reduced.
    Type: Grant
    Filed: June 6, 1994
    Date of Patent: July 23, 1996
    Assignee: Matsushita Electric Industrial Co, Ltd
    Inventors: Yasunori Tani, Tetsuhiko Kaneaki, Akira Sobajima, Hideaki Hatanaka, Yoshihiko Fukumoto
  • Patent number: 5210709
    Abstract: An offset reducer includes an adder for adding an input signal and an offset cancel signal to reduce an offset component of the input signal. A converter serves to measure a difference between a sum of past periods during which an output signal of the adder was positive and a sum of past periods during which the output signal of the adder was negative. The converter outputs an offset detection signal of a given value which depends on a sign of the measured difference when an absolute value of the measured difference exceeds a given difference. The converter initializes the measured difference to a given initial difference when the offset detection signal is outputted. An integrator serves to accumulate the offset detection signal outputted from the converter. The integrator generates the offset cancel signal in accordance with a result of the accumulating the offset detection signal. The output signal of the adder constitutes an offset-free signal corresponding to the input signal.
    Type: Grant
    Filed: April 28, 1992
    Date of Patent: May 11, 1993
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yasunori Tani, Tetsuhiko Kaneaki, Akira Sobajima