Patents by Inventor Akira Yoshioka

Akira Yoshioka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230001129
    Abstract: To better fulfill a sleep-inducing function for a seated person, a seat device includes a pressing device provided in a seat back and configured to press a back or a waist of a seated person to induce breathing; at least one of a temperature adjusting device configured to change a temperature of a seat cushion and/or the seat back and a shape adjusting device configured to change a surface shape of the seat cushion and/or the seat back; and a controller configured to control the pressing device to press the back or the waist of the seated person at a set cycle corresponding to a breathing cycle of a person at a sleeping time, and control the at least one of the temperature adjusting device and the shape adjusting device.
    Type: Application
    Filed: December 2, 2020
    Publication date: January 5, 2023
    Inventors: Takayoshi ITO, Kensuke MIZOI, Kohei KOWATA, Taro MURAYAMA, Yuki YOSHIOKA, Kazuhiro OHSHIMA, Akira MIYOSHI, Ryuta KASHINO, Hajime YOSHIDA, Yichen LI, Naoya MATSUMOTO
  • Publication number: 20220394095
    Abstract: The multi-agent simulation system includes a plurality of agent simulators provided for each of the plurality of agents and a center controller. The plurality of agent simulators are programmed to simulate a state of each of the plurality of agents while causing the plurality of agents to interact with each other by exchanging messages. The center controller is programmed to manage participation of the plurality of agent simulators in a simulation of the target world and separation of the plurality of agent simulators from the simulation of the target world. The center controller separates an agent simulator whose processing does not keep up with a flow of time in the target world from the simulation of the target world.
    Type: Application
    Filed: May 5, 2022
    Publication date: December 8, 2022
    Inventors: Takatomo TORIGOE, Akira YOSHIOKA
  • Publication number: 20220391661
    Abstract: A multi-agent simulation system performs a simulation of a target world in which a plurality of agents interacting with each other exist. The multi-agent simulation system includes: a plurality of agent simulators configured to perform simulations of the plurality of agents, respectively; and a center controller configured to communicate with the plurality of agent simulators. Operation modes of the center controller include: a first mode that does not perform message filtering; and a second mode that performs the message filtering. When the number of messages that the center controller receives per unit time is equal to or less than a threshold, the center controller selects the first mode. On the other hand, when the number of result messages that the center controller receives per unit time exceeds the threshold, the center controller selects the second mode.
    Type: Application
    Filed: May 3, 2022
    Publication date: December 8, 2022
    Inventors: Takatomo TORIGOE, Akira YOSHIOKA
  • Publication number: 20220391554
    Abstract: The multi-agent simulation system includes a plurality of agent simulators provided for each of a plurality of agents and a center controller. The plurality of agent simulators simulate a state of each of the plurality of agents while causing the plurality of agents to interact with each other by exchange of messages. The center controller relays transmission and reception of messages between the plurality of agent simulators. The plurality of agents include a plurality of types of agents including types having different time granularity. Each of the plurality of agent simulators transmits a message to the center controller at a transmission time interval corresponding to time granularity of a target agent to be simulated.
    Type: Application
    Filed: May 5, 2022
    Publication date: December 8, 2022
    Inventors: Takatomo TORIGOE, Akira YOSHIOKA, Masahiro KUWAHARA, Hiroaki KIMURA
  • Publication number: 20220391558
    Abstract: The multi-agent simulation system includes a plurality of agent simulators provided for each of a plurality of agents and a center controller. The plurality of agent simulators simulate a state of each of the plurality of agents while causing the plurality of agents to interact with each other by exchange of messages. The center controller relays transmission and reception of messages between the plurality of agent simulators. Each of the plurality of agent simulators estimates the current state of an interaction agent from the past state of the interaction agent that interacts with a target agent, simulates the current state of the target agent by using the estimated current state of the interaction agent, and transmits a message created based on the current state of the target agent to the center controller.
    Type: Application
    Filed: May 27, 2022
    Publication date: December 8, 2022
    Inventors: Takatomo TORIGOE, Akira YOSHIOKA, Masahiro KUWAHARA, Hiroaki KIMURA
  • Publication number: 20220391559
    Abstract: A multi-agent simulation system performs a simulation of a target world in which a plurality of agents interacting with each other exist. The multi-agent simulation system includes: a plurality of agent simulators configured to perform simulations of the plurality of agents, respectively; and a center controller configured to communicate with the plurality of agent simulators. The center controller performs message filtering based on a processing time interval of each agent simulator. More specifically, the center controller sets the number of the delivery message delivered per unit time to the agent simulator whose processing time interval is relatively long to be relatively small.
    Type: Application
    Filed: May 27, 2022
    Publication date: December 8, 2022
    Inventors: Takatomo TORIGOE, Akira YOSHIOKA
  • Publication number: 20220394094
    Abstract: The multi-agent simulation system includes a plurality of agent simulators provided for each of the plurality of agents and a center controller. The plurality of agent simulators are programmed to simulate a state of each of the plurality of agents while causing the plurality of agents to interact with each other by exchanging messages. The center controller is programmed to control a speed ratio of a flow of time in the target world to a flow of time in a real world. Each of the plurality of agent simulators calculates an index value corresponding to a remainder time rate. The remainder time rate is a rate of a remainder time to an update time interval for updating a state of a target agent to be simulated. The center controller controls the speed ratio based on the index value calculated by each of the plurality of agent simulators.
    Type: Application
    Filed: May 5, 2022
    Publication date: December 8, 2022
    Inventors: Takatomo TORIGOE, Akira YOSHIOKA
  • Publication number: 20220394096
    Abstract: A multi-agent simulation system performs a simulation of a target world in which a plurality of agents interacting with each other exist. The multi-agent simulation system includes: a plurality of agent simulators configured to perform simulations of the plurality of agents, respectively; and a center controller configured to communicate with the plurality of agent simulators. The center controller performs message filtering based on a distance between the agents. Specifically, the center controller sets a delivery frequency of the delivery message to be low between the agent simulators that perform the simulations of the agents distant from each other. A space of the simulation target world is divided into a plurality of partitions, and the message filtering is performed in units of the partition.
    Type: Application
    Filed: May 23, 2022
    Publication date: December 8, 2022
    Inventors: Takatomo TORIGOE, Akira YOSHIOKA
  • Publication number: 20220393933
    Abstract: The multi-agent simulation system includes a plurality of back-end servers provided for each of a plurality of service systems and a plurality of agent simulators provided for each of the plurality of agents. Each of the plurality of service systems provides a service used in the target world. The plurality of agent simulators are programmed to simulate a state of each of the plurality of agents while causing the plurality of agents to interact with each other by exchange of first messages. The plurality of back-end servers and the plurality of agent simulators are programmed to simultaneously simulate a plurality of services by exchanging second messages different from the first messages.
    Type: Application
    Filed: May 26, 2022
    Publication date: December 8, 2022
    Inventors: Takatomo TORIGOE, Akira YOSHIOKA, Masahiro KUWAHARA, Hiroaki KIMURA
  • Patent number: 11508647
    Abstract: A semiconductor device includes a semiconductor package including an n-type channel normally-off transistor, a normally-on transistor, a first diode, and a Zener diode; a first terminal provided on the semiconductor package; a plurality of second terminals provided on the semiconductor package, and the second terminals being lined up in a first direction; a third terminal provided on the semiconductor package; a plurality of fourth terminals provided on the semiconductor package; and a plurality of fifth terminals provided on the semiconductor package, and the fifth terminals being lined up in the first direction.
    Type: Grant
    Filed: March 10, 2021
    Date of Patent: November 22, 2022
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Toru Sugiyama, Akira Yoshioka, Hung Hung, Yasuhiro Isobe, Hitoshi Kobayashi, Tetsuya Ohno, Naonori Hosokawa, Masaaki Onomura, Masaaki Iwai
  • Publication number: 20220362397
    Abstract: A heterobifunctional monodisperse polyethylene glycol with two adjacent monodisperse polyethylene glycol side chains, in which a peptide linker is degraded by intracellular enzymes to release a drug slowly and effectively mask the hydrophobicity of the drug, and an antibody-drug conjugate in which the antibody and the drug are bound using same is provided. A heterobifunctional monodisperse polyethylene glycol represented by the formula (1): wherein each symbol in the formula (1) is as defined in the DESCRIPTION.
    Type: Application
    Filed: September 25, 2020
    Publication date: November 17, 2022
    Applicant: NOF CORPORATION
    Inventors: Yuki MATSUNO, Hiroki YOSHIOKA, Akira SUZUKI
  • Publication number: 20220310490
    Abstract: A semiconductor device has a first wiring extending in a first direction on a nitride semiconductor layer. A source electrode is electrically connected to the first wiring and extends in a second direction. A drain electrode extends in the second direction and includes a first and second portion extending in the second direction, spaced from each other in the first direction. An element isolation region is in the second nitride semiconductor layer between the first and second portions. A third portion extends in the second direction on the first and second portions. A gate electrode extends in the second direction on the second nitride semiconductor layer between the source electrode and the drain electrode. The portion includes holes therein aligned with each other along the second direction with the spacing between adjacent holes in the second direction increasing with increasing distance in the second direction from the first wiring.
    Type: Application
    Filed: September 2, 2021
    Publication date: September 29, 2022
    Inventors: Akira YOSHIOKA, Hung HUNG, Yasuhiro ISOBE, Toru SUGIYAMA, Hitoshi KOBAYASHI
  • Publication number: 20220293745
    Abstract: A semiconductor device includes a first nitride semiconductor layer, a second nitride semiconductor layer provided on the first nitride semiconductor layer, the second nitride semiconductor layer having a band gap larger than the first nitride semiconductor layer, a first electrode provided on the second nitride semiconductor layer, a second electrode provided on the second nitride semiconductor layer, a first insulating film provided between the first electrode and the second electrode on the second nitride semiconductor layer, the first insulating film being in connect with the second nitride semiconductor layer and including a first insulating material, a second insulating film provided on the second nitride semiconductor layer between the first electrode and the first insulating film, on the first insulating film, and on the second nitride semiconductor layer between the first insulating film and the second electrode, the second insulating film including a second insulating material, a third electrode pro
    Type: Application
    Filed: September 7, 2021
    Publication date: September 15, 2022
    Inventors: Yasuhiro ISOBE, Hung HUNG, Akira YOSHIOKA, Toru SUGIYAMA, Masaaki ONOMURA
  • Publication number: 20220140731
    Abstract: A semiconductor device according to embodiments includes a normally-off transistor having a first electrode, a second electrode, and a first control electrode, a normally-on transistor having a third electrode electrically connected to the second electrode, a fourth electrode, and a second control electrode, a first element having a first end portion electrically connected to the first control electrode and a second end portion electrically connected to the first electrode, and the first element including a first capacitance component; and, a second element having a third end portion electrically connected to the first control electrode and the first end portion and a fourth end portion, and the second element including a second capacitance component, wherein, when a threshold voltage of the normally-off transistor is denoted by Vth, a maximum rated gate voltage of the normally-off transistor is denoted by Vg_max, a voltage of the fourth end portion is denoted by Vg_on, the first capacitance component is deno
    Type: Application
    Filed: January 19, 2022
    Publication date: May 5, 2022
    Applicants: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventors: Akira YOSHIOKA, Toru SUGIYAMA, Masaaki IWAI, Naonori HOSOKAWA, Masaaki ONOMURA, Hung HUNG, Yasuhiro ISOBE
  • Patent number: 11290100
    Abstract: Provided is a semiconductor device including a normally-off transistor having a first electrode, a second electrode, and a first control electrode, a normally-on transistor having a third electrode, a fourth electrode, and a second control electrode, a first capacitor having a first end and a second end, a Zener diode having a first anode and a first cathode, a first resistor having a third end and a fourth end, a first diode having a second anode and a second cathode, a second resistor having a fifth end and a sixth end, a second diode having a third anode and a third cathode, and a second capacitor having a seventh end and an eighth end.
    Type: Grant
    Filed: September 4, 2020
    Date of Patent: March 29, 2022
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Hung Hung, Yasuhiro Isobe, Akira Yoshioka, Toru Sugiyama, Masaaki Iwai, Naonori Hosokawa, Masaaki Onomura, Hitoshi Kobayashi, Tetsuya Ohno
  • Publication number: 20220093747
    Abstract: A semiconductor device has a first and a second nitride semiconductor layer and a first and a second electrode thereon. A gate electrode is between the first and second electrodes. A gate field plate is on the gate electrode. A first field plate is above a position between the gate field plate and the second electrode. A second field plate is between the first field plate and the gate field plate. A distance from the first nitride semiconductor layer to the second field plate is shorter than a distance from the first nitride semiconductor layer to the portion of the gate field plate that protrudes the most towards the second electrode. The distance from the first nitride semiconductor layer to the second field plate is shorter than a distance from the first nitride semiconductor layer to an end surface of the first field plate on a first electrode side.
    Type: Application
    Filed: March 3, 2021
    Publication date: March 24, 2022
    Inventors: Tetsuya OHNO, Akira Yoshioka, Toru Sugiyama, Hung Hung, Yasuhiro Isobe, Hitoshi Kobayashi
  • Publication number: 20220085175
    Abstract: A semiconductor device includes first and second nitride semiconductor layers. The second layer on the first nitride has a first region, a second region, and a third region between the first and second regions. A first gate electrode is in the first region and extends parallel to a surface of a substrate. A first source electrode is in the first region and extends in the first direction. A second gate electrode in the second region and extends in the first direction. A second source electrode is in the second region and extends in the first direction. A drain electrode coupled to a first and a second wiring. The first wiring directly contacts the second nitride semiconductor layer in the first region. The second wiring directly contacts the second nitride semiconductor layer in the second region. An insulation material is in the third region.
    Type: Application
    Filed: March 2, 2021
    Publication date: March 17, 2022
    Inventors: Akira YOSHIOKA, Yasuhiro ISOBE, Hung HUNG, Hitoshi KOBAYASHI, Tetsuya OHNO, Toru SUGIYAMA
  • Publication number: 20220084916
    Abstract: A semiconductor device includes a semiconductor package including an n-type channel normally-off transistor including a first electrode, a second electrode, and a first control electrode, a normally-on transistor including a third electrode electrically connected to the second electrode, a fourth electrode, and a second control electrode, a first diode including a first anode electrically connected to the second control electrode and a first cathode electrically connected to the third electrode, and a Zener diode including a second anode electrically connected to the first electrode and a second cathode electrically connected to the second electrode; a first terminal provided on the semiconductor package, the first terminal being electrically connected to the first electrode; a plurality of second terminals provided on the semiconductor package, the second terminals being electrically connected to the first electrode, and the second terminals being lined up in a first direction; a third terminal provided on t
    Type: Application
    Filed: March 10, 2021
    Publication date: March 17, 2022
    Inventors: Toru Sugiyama, Akira Yoshioka, Hung Hung, Yasuhiro Isobe, Hitoshi Kobayashi, Tetsuya Ohno, Naonori Hosokawa, Masaaki Onomura, Masaaki Iwai
  • Publication number: 20220077131
    Abstract: A semiconductor device according to an embodiment includes: a first nitride semiconductor layer having a first surface and a second surface; a first source electrode provided on the first surface; a first drain electrode provided on the first surface; a first gate electrode provided on the first surface between the first source electrode and the first drain electrode; a second nitride semiconductor layer having a third surface and a fourth surface, the third surface being provided on the second surface and facing the second surface, and the second nitride semiconductor layer having a smaller band gap than the first nitride semiconductor layer; and a first semiconductor device having a fifth surface provided on the fourth surface and facing the fourth surface with a size equal to or smaller than a size of the fourth surface, the first semiconductor device including a first semiconductor material having a smaller band gap than the second nitride semiconductor layer.
    Type: Application
    Filed: September 7, 2021
    Publication date: March 10, 2022
    Inventors: Yasuhiro ISOBE, Hung HUNG, Akira YOSHIOKA, Toru SUGIYAMA, Hitoshi KOBAYASHI, Tetsuya OHNO, Masaaki IWAI, Naonori HOSOKAWA, Masaaki ONOMURA
  • Patent number: 11264899
    Abstract: A semiconductor device according to embodiments includes a normally-off transistor having a first electrode, a second electrode, and a first control electrode, a normally-on transistor having a third electrode electrically connected to the second electrode, a fourth electrode, and a second control electrode, a first element having a first end portion electrically connected to the first control electrode and a second end portion electrically connected to the first electrode, and the first element including a first capacitance component; and, a second element having a third end portion electrically connected to the first control electrode and the first end portion and a fourth end portion, and the second element including a second capacitance component, wherein, when a threshold voltage of the normally-off transistor is denoted by Vth, a maximum rated gate voltage of the normally-off transistor is denoted by Vg_max, a voltage of the fourth end portion is denoted by Vg_on, the first capacitance component is deno
    Type: Grant
    Filed: January 17, 2020
    Date of Patent: March 1, 2022
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventors: Akira Yoshioka, Toru Sugiyama, Masaaki Iwai, Naonori Hosokawa, Masaaki Onomura, Hung Hung, Yasuhiro Isobe