Patents by Inventor Akizumi Fujioka

Akizumi Fujioka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10013939
    Abstract: A display device (1) in accordance with an embodiment of the present invention includes: an LCD driving section (20) and an LCD controller (30) for causing an image based on an image signal to be displayed on an LCD (10); and a CPU (40) for supplying an image signal to the LCD controller (30), the LCD controller (30) being configured to supply, to the CPU (40), a control signal that instructs the CPU (40) to supply an image signal, and the CPU (40) being configured to supply an image signal in a case where the CPU (40) receives a control signal.
    Type: Grant
    Filed: June 30, 2016
    Date of Patent: July 3, 2018
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Kazuki Takahashi, Akizumi Fujioka, Taketoshi Nakano, Toshihiro Yanagi, Kouji Kumada, Noriyuki Tanaka
  • Patent number: 9966024
    Abstract: The occurrence of flicker is effectively suppressed particularly in a liquid crystal display device that performs low-frequency driving. Provided are a gradation-to-voltage value conversion table for converting a gradation to a voltage value, a correction value map for storing a correction value, and a voltage value-to-gradation conversion table for converting a voltage value to a gradation. A gradation of an input image signal is converted to a first voltage value, using the gradation-to-voltage value conversion table. The correction value specified in accordance with a location of a pixel to be processed is added to or subtracted from the first voltage value so that a second voltage value is obtained. The second voltage value is converted to an output gradation, using the voltage value-to-gradation conversion table. A driving video signal is applied to a source bus line, based on the output gradation.
    Type: Grant
    Filed: August 22, 2013
    Date of Patent: May 8, 2018
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Ken Inada, Taketoshi Nakano, Asahi Yamato, Akizumi Fujioka
  • Patent number: 9959826
    Abstract: A liquid crystal display device is provided where deterioration of the liquid crystal panel is prevented while reducing power consumption. A liquid crystal panel (12) includes a display region (26) in which a video is displayed. The display region (26) includes a plurality of sub-regions (26A, 26B, 26C, 26D). A drive unit (14) rewrites the display on at least one of the plurality of sub-regions (26A, 26B, 26C, 26D) based on a video signal. An identification unit (38) identifies the one of the plurality of sub-regions (26A, 26B, 26C, 26D) on which the drive unit (14) has not rewritten the display for a predetermined number of frames. An output unit (40) outputs an interrupt signal for requesting a video signal for rewriting the display on the sub-region identified by the identification unit.
    Type: Grant
    Filed: February 27, 2014
    Date of Patent: May 1, 2018
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Yuta Tanaka, Akizumi Fujioka, Kazuki Takahashi
  • Patent number: 9959825
    Abstract: A liquid crystal display device that performs intermittent driving involving a driving period and an idle period includes a gray scale level control unit that generates, from an input image signal, an image signal for display and an image signal for correction. A signal line control unit writes the image signal for correction to the plurality of signal lines before writing the image signal for display during a driving period. An LUT stores a correction gray scale value associated with a gray scale value of at least a current frame. An adding circuit corrects the input image signal based on the correction gray scale value read from the LUT. The subtracting circuit specifies, in a pixel region, a regular image pattern including at least a first pixel and a second pixel and changes an output from the adding circuit for the first image by a predetermined gray scale width.
    Type: Grant
    Filed: February 21, 2014
    Date of Patent: May 1, 2018
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Fumiyuki Kobayashi, Asahi Yamato, Akizumi Fujioka, Ken Inada
  • Patent number: 9911390
    Abstract: A liquid crystal display device (100) includes: a liquid crystal display panel (10); a scan line driving circuit (20) that supplies a scan signal voltage to each pixel (Px) via a corresponding scan line (11); a signal line driving circuit (30) that supplies a display signal voltage to each pixel via a corresponding signal line (12); and a display control section (40) including a polarity reversal driving switching section (41) that switches a mode of polarity reversal of the display signal voltage.
    Type: Grant
    Filed: August 22, 2014
    Date of Patent: March 6, 2018
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Maremu Yamagishi, Akizumi Fujioka, Kazuki Takahashi
  • Patent number: 9773462
    Abstract: The present invention provides a liquid crystal display device capable of suppressing a decrease in display quality when pause drive is performed in an alternating-voltage drive mode, as well as a method for driving the same. In a first drive frame, overshoot drive is performed using correction values provided by an LUT to apply overshoot voltages whose absolute values are higher than absolute values of signal voltages to data signal lines. Subsequently, in a second drive frame, normal drive is performed to write signal voltages of the same polarity as the overshoot drive voltages to the data signal lines. Thereafter, a pause period in which an image written by normal drive is displayed continues until the start of a drive period in the next pause drive period. As a result, a decrease in luminance immediately after the signal voltages are written during the second drive frame is suppressed significantly, so that the viewer barely recognizes flicker.
    Type: Grant
    Filed: June 13, 2013
    Date of Patent: September 26, 2017
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Ken Inada, Taketoshi Nakano, Akizumi Fujioka, Asahi Yamato
  • Patent number: 9761187
    Abstract: Grayscale values for previous and current frames are different, and therefore, an overshoot voltage, which has a higher absolute value than a signal voltage, are applied to a data signal line. Next, in a second drive frame, normal drive is performed, so that a signal voltage of the same polarity as the overshoot voltage is written to the data signal line. Moreover, in a first drive frame of a third pause drive period, the grayscale values for the previous and current frames are equal, and also greater than or equal to a boundary value, and therefore, undershoot drive is performed. An undershoot voltage, which has a lower absolute value than a signal voltage, is applied to the data signal line. Next, in a second drive frame, normal drive is performed, so that a signal voltage of the same polarity as the undershoot voltage is written to the data signal line.
    Type: Grant
    Filed: July 26, 2013
    Date of Patent: September 12, 2017
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Ken Inada, Taketoshi Nakano, Akizumi Fujioka, Asahi Yamato
  • Patent number: 9646551
    Abstract: A processor determines a drive scheme from among candidates of a plurality of drive schemes having differing schemes for supplying a signal to a signal line of a display panel. A controller stores a scheme drive information in which a drive scheme information and a signal control information in a drive scheme are associated. A controller receives a scheme information from a processor, and controls a signal supplied to a signal line of a display panel, the control being made based on a scheme information and a scheme drive information.
    Type: Grant
    Filed: August 7, 2013
    Date of Patent: May 9, 2017
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Akizumi Fujioka, Atsushi Sakamoto, Kazuo Nakamura
  • Patent number: 9633617
    Abstract: According to a liquid crystal display device (1), a gate driver is controlled to (a) scan all of scan signal lines during at least two driving frames contained in a first driving period and (b) not scan any of the scan signal lines during pausing frames in a pausing period which is (i) secured between the first driving period and a second driving period by which the first driving period is followed and (ii) is longer than each of the first and second driving periods.
    Type: Grant
    Filed: July 2, 2012
    Date of Patent: April 25, 2017
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Jun Nakata, Akizumi Fujioka, Kohzoh Takahashi, Toshihiro Yanagi, Masami Ozaki
  • Patent number: 9607561
    Abstract: An image determination part configured to determine whether or not an image based on an input image signal is an image analogous to a polarity reversal pattern in a reversal driving scheme employed by default and to output a determination result, and a reversal pattern decision part configured to decide a reversal driving scheme based on the determination result are provided as constituent elements anterior to a liquid crystal drive unit. With regard to each unit area where the determination by the image determination part is made, the reversal pattern decision part decides the reversal driving scheme in the unit area, as a reversal driving scheme different from the reversal driving scheme employed by default, when the determination result indicates that the image based on the input image signal is the image analogous to the polarity reversal pattern in the reversal driving scheme employed by default.
    Type: Grant
    Filed: June 21, 2013
    Date of Patent: March 28, 2017
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Ken Inada, Taketoshi Nakano, Asahi Yamato, Akizumi Fujioka
  • Patent number: 9601074
    Abstract: Included are: refresh a rate changing section (15) for changing a refresh rate of a display panel (2) by configuring settings for scan periods during each of which a plurality of gate signal lines (G) of the display panel (2) are sequentially scanned and for pause periods during each of which sequential scanning of the plurality of gate signal lines (G) is suspended; and a drive amount control section (20) for controlling, in accordance with a ratio of the scan periods to the pause periods, drive time during which each of the gate signal lines is driven in each of the scan periods.
    Type: Grant
    Filed: May 20, 2016
    Date of Patent: March 21, 2017
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Akizumi Fujioka, Toshihiro Yanagi, Satoshi Ihida, Kazuki Takahashi, Taketoshi Nakano
  • Patent number: 9564092
    Abstract: In a case where a display device (1) receives an instruction to change a refresh rate of a display panel (2), the display device (1) changes the refresh rate with a timing with which there is a balance between the length of time for which positive source signals are written and the length of time for which negative source signals are written.
    Type: Grant
    Filed: February 13, 2013
    Date of Patent: February 7, 2017
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Akizumi Fujioka, Toshihiro Yanagi, Taketoshi Nakano
  • Publication number: 20160307530
    Abstract: A display device (1) in accordance with an embodiment of the present invention includes: an LCD driving section (20) and an LCD controller (30) for causing an image based on an image signal to be displayed on an LCD (10); and a CPU (40) for supplying an image signal to the LCD controller (30), the LCD controller (30) being configured to supply, to the CPU (40), a control signal that instructs the CPU (40) to supply an image signal, and the CPU (40) being configured to supply an image signal in a case where the CPU (40) receives a control signal.
    Type: Application
    Filed: June 30, 2016
    Publication date: October 20, 2016
    Inventors: Kazuki TAKAHASHI, Akizumi FUJIOKA, Taketoshi NAKANO, Toshihiro YANAGI, Kouji KUMADA, Noriyuki TANAKA
  • Patent number: 9449571
    Abstract: A timing controller carries out display refresh on a display panel in a first frame which comes one frame after a second frame in which (i) an image signal supplied from an interface matches an image signal stored in a frame memory and (ii) a polarity balance value is equal to a reference value. In this case, the image signal, having a polarity opposite to that of pixel applied voltages in the second frame, is supplied to the display panel in the first frame. This makes it possible to prevent a deterioration in the display panel while reducing electric power consumption.
    Type: Grant
    Filed: April 26, 2013
    Date of Patent: September 20, 2016
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Kazuki Takahashi, Akizumi Fujioka, Taketoshi Nakano
  • Publication number: 20160267870
    Abstract: Included are: refresh a rate changing section (15) for changing a refresh rate of a display panel (2) by configuring settings for scan periods during each of which a plurality of gate signal lines (G) of the display panel (2) are sequentially scanned and for pause periods during each of which sequential scanning of the plurality of gate signal lines (G) is suspended; and a drive amount control section (20) for controlling, in accordance with a ratio of the scan periods to the pause periods, drive time during which each of the gate signal lines is driven in each of the scan periods.
    Type: Application
    Filed: May 20, 2016
    Publication date: September 15, 2016
    Inventors: Akizumi FUJIOKA, Toshihiro YANAGI, Satoshi IHIDA, Kazuki TAKAHASHI, Taketoshi NAKANO
  • Patent number: 9418608
    Abstract: A display device (1) in accordance with an embodiment of the present invention includes: an LCD driving section (20) and an LCD controller (30) for causing an image based on an image signal to be displayed on an LCD (10); and a CPU (40) for supplying an image signal to the LCD controller (30), the LCD controller (30) being configured to supply, to the CPU (40), a control signal that instructs the CPU (40) to supply an image signal, and the CPU (40) being configured to supply an image signal in a case where the CPU (40) receives a control signal.
    Type: Grant
    Filed: February 18, 2013
    Date of Patent: August 16, 2016
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Kazuki Takahashi, Akizumi Fujioka, Taketoshi Nakano, Toshihiro Yanagi, Kouji Kumada, Noriyuki Tanaka
  • Publication number: 20160232863
    Abstract: A liquid crystal display device (100) includes: a liquid crystal display panel (10); a scan line driving circuit (20) that supplies a scan signal voltage to each pixel (Px) via a corresponding scan line (11); a signal line driving circuit (30) that supplies a display signal voltage to each pixel via a corresponding signal line (12); and a display control section (40) including a polarity reversal driving switching section (41) that switches a mode of polarity reversal of the display signal voltage.
    Type: Application
    Filed: August 22, 2014
    Publication date: August 11, 2016
    Inventors: Maremu YAMAGISHI, Akizumi FUJIOKA, Kazuki TAKAHASHI
  • Patent number: 9411454
    Abstract: A display device (1) in accordance with the present invention includes a detection section (21) provided along a display panel (11) and detecting an approach or a contact of an object. The detection section (21) detects the approach or the contact of the object in a period which (i) is from a time point when supply of a scanning signal to a gate signal line (G) is started to a time point when supply of the scanning signal to a subsequent gate signal line (G) is started but (ii) excludes a rising period of a source signal supplied to a source signal line (S).
    Type: Grant
    Filed: February 25, 2013
    Date of Patent: August 9, 2016
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Akizumi Fujioka, Toshihiro Yanagi
  • Patent number: 9390686
    Abstract: There is provided a display device capable of suppressing brightness change which can occur at the time of image update in intermission driving. A display control circuit (20) includes a frame memory (101), a coercive refreshing determination section (104), a refreshing circuit (105), and an undershoot circuit (106). The coercive refreshing determination section (104) outputs an active coercive refreshing signal and an active correction instruction signal upon determining that an image is updated. The refreshing circuit (105) receives the active coercive refreshing signal, and then outputs an active output control signal. The frame memory (101) receives the active output control signal, and then outputs an image data. The undershoot circuit (106) performs, if in reception of the active correction instruction signal, a correction by making a subtracting operation to the image data received from the frame memory (101), and then outputs corrected image data.
    Type: Grant
    Filed: July 26, 2013
    Date of Patent: July 12, 2016
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Ken Inada, Taketoshi Nakano, Akizumi Fujioka, Kazuki Takahashi
  • Patent number: 9378697
    Abstract: Included are: refresh a rate changing section (15) for changing a refresh rate of a display panel (2) by configuring settings for scan periods during each of which a plurality of gate signal lines (G) of the display panel (2) are sequentially scanned and for pause periods during each of which sequential scanning of the plurality of gate signal lines (G) is suspended; and a drive amount control section (20) for controlling, in accordance with a ratio of the scan periods to the pause periods, drive time during which each of the gate signal lines is driven in each of the scan periods.
    Type: Grant
    Filed: February 13, 2013
    Date of Patent: June 28, 2016
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Akizumi Fujioka, Toshihiro Yanagi, Satoshi Ihida, Kazuki Takahashi, Taketoshi Nakano