Patents by Inventor Alan G. V. Grace

Alan G. V. Grace has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4712170
    Abstract: A tuned circuit radio frequency power supply is disclosed. A conventional voltage doubler drives a power oscillator having a variable output frequency and variable amplitude input. The power oscillator output is connected to a tuned RLC circuit incorporating a load; a voltmeter coupled to the circuit measures overall phase of the RLC circuit and inputs to a phase comparator within the oscillator. Tuning of the RLC circuit is done by frequency comparison with circuit lead requiring increased oscillator frequency and circuit lag requiring decreased oscillator frequency. A switched resistance network preset for tube length, width and color of neon is placed in series with the oscillator input voltage. This resistance network outputs to an integrating amplifier, through an opto-isolator to control the amplitude of the oscillator input. The amplitude of the oscillator input thus controlled the output voltage of the RLC circuit to maintain optimum voltage for tube length, width and color of neon.
    Type: Grant
    Filed: February 6, 1986
    Date of Patent: December 8, 1987
    Assignee: Power Modifications Incorporated
    Inventor: Alan G. V. Grace
  • Patent number: 4651271
    Abstract: A tuned circuit radio frequency power supply is disclosed. A conventional voltage doubler drives a power oscillator having a variable output frequency and variable duty cycle. The power oscillator output is connected to a tuned RLC circuit incorporating a load. A voltmeter coupled to the circuit measures overall phase of the RLC circuit and inputs to a phase comparator within the oscillator. Tuning of the RLC circuit is done by frequency comparison with circuit lead requiring increased oscillator frequency and circuit lag requiring decreased oscillator frequency. An ammeter is placed in series with the neon circuit and controls the oscillator duty cycle to maintain constant current despite changes in load. Consequently, power is adjusted from the oscillator, preferably by varying trigger level on a ramp voltage generator.
    Type: Grant
    Filed: April 25, 1985
    Date of Patent: March 17, 1987
    Assignee: Power Modifications Incorporated
    Inventor: Alan G. V. Grace
  • Patent number: 4305032
    Abstract: A saturable reactor regulated power supply utilizes a power oscillator to convert line voltage to a higher frequency voltage. The high frequency voltage is passed through the gate windings of a saturable reactor to an output circuit including an output power transformer. A feedback circuit interconnected between the output circuit and control windings of the saturable reactor controls the control winding current in order to pulse modulate the voltage applied to the output circuit. The feedback circuit includes several resistors which are connected to cause a phantom control winding resistance R.sub.c * which is much greater than that of a control winding series resistor R.sub.1. The created phantom resistance R.sub.c * causes the control winding circuit time constant to be substantially less than that which would otherwise be provided by the series resistor R.sub.1 ; whereas, the resistor R.sub.1 determines the control winding power loss.
    Type: Grant
    Filed: June 12, 1979
    Date of Patent: December 8, 1981
    Inventor: Alan G. V. Grace
  • Patent number: 4097695
    Abstract: An asynchronous, addressable multiplex system comprises a master station in parallel communication with a number of slave stations. Both the master and slave stations employ independently clocked UAR/T's (universal asynchronous receiver/transmitter) circuits for simultaneous data receiving and transmitting, the UAR/T's communicating directly with one another. The master station includes means for formatting data to be transmitted by its UAR/T into message blocks each several bytes long and intended for a particular slave station whose address is encoded only in the first byte of the block. The message blocks are transmitted separated from one another by gaps which are two bytes long. Each slave station receives all master station message blocks and has means for recognizing the gaps and for then comparing the address in the first byte thereafter with an assigned slave station address. If the addresses correspond, the entire message block is accepted by the slave station.
    Type: Grant
    Filed: July 11, 1977
    Date of Patent: June 27, 1978
    Inventors: Alan G. V. Grace, Janet C. Wong