Patents by Inventor Alejandro de la Plaza

Alejandro de la Plaza has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4801891
    Abstract: A voltage differential amplifier made with MOS transistors of a single channel polarity and using only two additional transistors besides a differential input pair is exceptionally exempt of problems caused by the normal spread of the parameters of the real components forming the bias current generators of the differential pair.
    Type: Grant
    Filed: October 21, 1987
    Date of Patent: January 31, 1989
    Assignee: SGS Microelettronica S.p.A.
    Inventors: David Novosel, Alejandro de la Plaza
  • Patent number: 4782530
    Abstract: A first and a second input signals, composing a stereophonic pair, are amplified in respective channels, added by adder means in a desired phase relationship, chosen between completely in phase and 180.degree. out of phase, and the sum signal thus produced is processed by a transfer bloc having a desired transfer function, and is superimposed on the signal in the first channel with opposite phase, and is then superimposed on the signal in the second channel with a 180.degree. out of phase or in phase relationship, according to whether the input signals are added respectively in phase or with opposite phase.
    Type: Grant
    Filed: September 8, 1986
    Date of Patent: November 1, 1988
    Assignee: SGS Microelettronica SpA
    Inventors: Guido Torelli, Alejandro De La Plaza
  • Patent number: 4749956
    Abstract: A single-stage fully differential operational amplifier has a high open-loop gain and can be incorporated in a very small area of silicon and has a very small number of bias interconnection lines. The amplifier includes two identical arms each having similar bias and loads, transconductance and common-mode feedback elements. Each of the aforementioned three elements in each branch have the same current flowing therethrough when the amplifier is quiescent.
    Type: Grant
    Filed: July 18, 1986
    Date of Patent: June 7, 1988
    Assignee: SGS Microelettronica SpA
    Inventors: Guido Torelli, Alejandro de la Plaza
  • Patent number: 4746871
    Abstract: A differential switched capacitor type integrator, particularly useful for building analog sampled-data switched capacitor filters, utilizes a single integration capacitor (or array of unitary capacitors connected in parallel) instead of the two distinct integration capacitors required in the known differential integrators. The number of the required capacitors is therefore reduced to one half in comparison to that required in accordance with the prior art.
    Type: Grant
    Filed: October 15, 1986
    Date of Patent: May 24, 1988
    Assignee: SGS Microelettronica S.p.A.
    Inventor: Alejandro de la Plaza
  • Patent number: 4703249
    Abstract: A stabilized generator includes an operational amplifier with capacitive negative feedback whose output signal controls a current regulator which drives the input of a current mirror circuit, the mirrored current from the mirror circuit controlling a feedback circuit adapted to drive the operational amplifier in order to maintain the mirrored current constant.
    Type: Grant
    Filed: July 28, 1986
    Date of Patent: October 27, 1987
    Assignee: SGS Microelettronica S.p.A.
    Inventors: Alejandro De La Plaza, Guido Torelli
  • Patent number: 4695751
    Abstract: Four switches are controlled two by two by clock signal generators without overlapping in such a manner as to connect alternatively a sampling capacitor to an input signal source and in parallel to an integration capacitor between an input of a unitary-gain amplifier and ground.
    Type: Grant
    Filed: November 4, 1986
    Date of Patent: September 22, 1987
    Assignee: SGS Microelettronica S.p.A.
    Inventor: Alejandro De La Plaza
  • Patent number: 4696035
    Abstract: A first and a second input signal, constituting a stereophonic pair are amplified in respective direct amplifier means so as to obtain a first and a second output signal. In order to obtain the expansion of the stereo base, said output signals are added by adder means in a desired phase relationship, chosen between phase coincidence and phase opposition, and the sum signal thus produced is processed by a feedback block having a desired transfer function, and is then superimposed on the first input signal with opposite phase, and is superimposed on said second input signal with opposite or equal phase, according to whether said output signals are added respectively in phase coincidence of phase opposition. The feedback block preferably includes a band pass filter, and its gain is externally programmable.
    Type: Grant
    Filed: July 28, 1986
    Date of Patent: September 22, 1987
    Assignee: SGS Microelectronica S.p.A.
    Inventors: Guido Torelli, Alejandro De La Plaza
  • Patent number: 4275270
    Abstract: A speech detector for use in an adaptive hybrid circuit is disclosed. The speech detector detects the instantaneous sign of current and voltage in a hybrid circuit and thereby determines the direction of power flow in the circuit. The direction of power flow is indicative of the presence or absence of a near end talker. The hybrid circuit enables or disables adaption based upon the presence or absence of the near end talker in the telephone system.
    Type: Grant
    Filed: November 29, 1979
    Date of Patent: June 23, 1981
    Assignee: The Regents of the University of California
    Inventor: Alejandro de la Plaza